Texas Instruments TPA3255EVM User Manual

User's Guide
SLOU441–July 2016

TPA3255EVM

The main contents of this document are:
Hardware descriptions and implementation
Design information Related documents:
TPA3255 Data Sheet (SLASEA8)
Topic ........................................................................................................................... Page
2 Hardware Overview .............................................................................................. 3
3 TPA3255EVM Setup.............................................................................................. 6
4 Using TPA3255EVM in Different Output Configurations............................................ 9
5 Board Layouts, Bill of Materials, and Schematic .................................................... 12
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1 Trademarks

PurePath is a trademark of Texas Instruments.
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2 Hardware Overview

The TPA3255EVM PurePath™ Ultra-HD evaluation module demonstrates the TPA3255DDV integrated circuit from Texas Instruments. The TPA3255DDV is a high-performance high-power class-D amplifier that enables true premium sound quality with high-efficiency class-D technology. It features an advance integrated feedback design and high-speed gate driver error correction (PurePath Ultra-HD), which enables ultra-low distortion across the audio band and superior audio quality. This EVM supports two BTL (stereo 2.0) output channels, one PBTL (mono 0.1) output channel, one BTL plus two SE (2.1) output channels, and four SE (4.0) output channels configurations. The NE5532 is a High Performance Audio Op Amp designed to allow TPA3255DDV operation with differential or single ended input signals to the EVM with differential inputs yielding the optimal performance. TPA3255EVM is a complete 2-Vrms analog input 2 × 315-W stereo/1 × 600-W mono high-power amplifier ready for evaluation and excellent listening experience.
Hardware Overview

2.1 TPA3255EVM Features

The TPA3255EVM has the following features:
Stereo PurePath Ultra-HD evaluation module
Self-contained protection system (short circuit, clip, and thermal)
Standard 4-V
BTL, PBTL, and SE output configuration support
Frequency adjust and oscillator sync interface
Single supply voltage range 14–53.5 V
Double-sided, plated-through, 2-oz. Cu 2-layer PCB layout
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differential input or single-ended line input
RMS
Figure 1. TPA3255EVM
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Hardware Overview

2.2 TPA3255EVM Frequency Adjust

The TPA3255EVM offers hardware trimmed oscillator frequency by external control of the FREQ_ADJ pin. The Frequency adjust can be used to reduce interference problems while using a radio receiver tuned within the AM band, the switching frequency can be changed from nominal to lower values. These values should be chosen such that the nominal and the lower value switching frequencies together results in the fewest cases of interference throughout the AM band. The oscillator frequency can be selected by the value of the FREQ_ADJ resistor connected to GND in master mode according to Table 1.
Table 1. Frequency Adjust Master Mode Selection
Master Mode Resistor to GND
Nominal 30 kΩ
AM1 20 kΩ AM2 10 kΩ
For slave-mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to DVDD. This configures the OSC_I/O pins as inputs to be slaved from an external differential clock. In a master/slave system inter­channel delay is automatically set up between the switching phases of the audio channels, which can be illustrated by no idle channels switching at the same time. This will not influence the audio output, but only the switch timing to minimize noise coupling between audio channels through the power supply. This will optimize audio performance and result in better operating conditions for the power supply. The inter­channel delay will be set up for a slave device depending on the polarity of the OSC_I/O connection such that slave mode 1 is selected by connecting the OSC_I/O of the master device with the OSC_I/O of the slave device with the same polarity (+ to + and – to –), while slave mode 2 is selected by connecting the OSC_I/O's with the inverse polarity (+ to – and – to +).
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2.3 TPA3255EVM Single-Ended and Differential Input

The TPA3255EVM supports both differential and single-ended inputs. For single-ended inputs, J4 and/or J19 jumpers are set to the SE position, so that the TPA3255EVM uses the NE5532 to convert the single­ended input signal to differential to properly drive the differential inputs of the TPA3255. The input RCA jack, J3, is used to provide INA inputs and RCA jack J14 is used to provide INB inputs. RCA jack J18 is used to provide INC inputs and RCA jack J15 is used to provide IND inputs with differential inputs.
For differential input operation, J4 and/or J19 jumpers are set to the DIFF position, and the TPA3255EVM uses the NE5532 to buffer the differential input signal to the differential inputs of the TPA3255. The input RCA jack, J3, is used to provide INA, RCA jack J14 provides INB, RCA jack J18 provides INC, and RCA jack J15 provides IND with differential inputs.
NOTE: Single-ended input settings on the TPA3255EVM should only be used for channels with
output configuration BTL or PBTL, not SE. For SE output configuration J4 and/or J19 jumpers for that channel must be set to the DIFF position, so the input signal INx is mapped directly to OUTx.
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2.4 TPA3255EVM Clip Overtemperature and Fault Indicators

The TPA3255EVM is equipped with LED indicators that illuminate when the FAULT and/or CLIP_OTW pin goes low. See Table 2 and (SLASEA8) for more details.
Table 2. Fault and Clip Overtemperature Status
FAULT CLIP_OTW Description
0 0
0 0 0 1 Overload (OLP) or undervoltage (UVP). Junction temperature lower than 125°C.
1 0 Junction temperature higher than 125°C (overtemperature warning) 1 1 Junction temperature lower than 125°C and no OLP or UVP faults (normal operation)
Overtemperature (OTE) or overload (OLP) or undervoltage (UVP). Junction temperature higher than 125°C (overtemperature warning).
Overload (OLP) or undervoltage (UVP). Junction temperature higher than 125°C (overtemperature warning).
Hardware Overview
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TPA3255EVM
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Power Supply
SE A/B Input DIFF A Input
DIFF B Input
TPA3255
under
Heat Sink
SE C/D Input DIFF C Input
DIFF D Input
3.3-V and 12-V LEDs
Warning LEDs
RESET Switch
OUTD
OUTC
GND
GND
OUTB
OUTA
TPA3255EVM Setup

3 TPA3255EVM Setup

This section describes the TPA3255EVM hardware setup and connection.

3.1 TPA3255EVM Setup

Figure 2 illustrates the TPA3255EVM connection.
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3.2 Hardware Requirements

The following hardware is required for this EVM:
TPA3255EVM (AAP053-001)
Power supply 5–14 A/18–53.5 V
Two 2–8 Ω (300 W) speakers/resistor loads
Four speaker/banana cables
RCA input cables
Analog output audio source
Figure 2. TPA3255EVM Connections
DC
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3.3 Hardware Default Setup BTL (2.0)

BTL (2.0) default hardware setup is as follows:
Remove the EVM from the ESD bag.
Check that jumpers are in their default state as shown in Figure 1 and Table 3 for stereo BTL operation:
Table 3. Stereo BTL Default Jumper States
Jumper Setting Comment
J29 IN PVDD to 15-V BUCK J31 IN 12-V LDO to 12-V TERM J32 IN 3.3-V LDO to 3.3-V TERM J33 IN 3.3-V LDO to 3.3-V TERM J21 IN CSTART SE J16 3 to 4 MASTER MODE
J5 2 to 3 M1 – BTL
J6 2 to 3 M2 – BTL J22 IN OUTA CAP SHUNT J23 IN OUTB CAP SHUNT J24 IN OUTC CAP SHUNT J25 IN OUTD CAP SHUNT J26 2 to 3 INC SELECT J27 2 to 3 IND SELECT
J7 OUT PBTL SELECT INC
J8 OUT PBTL SELECT IND J10 OUT INC/D DIFF INPUT J12 OUT INC/D DIFF INPUT
J4 1 to 2 INA/B SE INPUT J19 1 to 2 INC/D SE INPUT
TPA3255EVM Setup
Set S1 to the RESET position.
Set power supply to 51 V (14–53.5-V range) and current to 10 A (5–14-A range). Do not power up until all connections are completed.
Connect power supply to TPA3255 EVM positive terminal to PVDD (RED) and negative terminal to GND (BLACK).
Connect left channel speaker/power resistor load (4–8 Ω) to TPA3255 EVM positive output terminal to OUTA (RED) and AP analog input channel A positive terminal.
Connect left channel speaker/power resistor load (4–8 Ω) to TPA3255 EVM negative output terminal to OUTB (BLACK) and AP analog input channel A negative terminal.
Connect right channel speaker/power resistor load (4–8 Ω) to TPA3255 EVM positive output terminal to OUTC (RED) and AP analog input channel B positive terminal.
Connect right channel speaker/power resistor load (4–8 Ω) to TPA3255 EVM negative output terminal to OUTD (BLACK) and AP analog input channel B negative terminal.
Be careful not to mix up PVDD, OUTA, and OUTB terminals, since the colors are the same (RED).
For single-ended stereo inputs, connect AP channel A XLR to RCA male jacks to female RCA jacks input A/AB (RED) and AP channel B XLR to RCA male jacks to female RCA jacks input C/CD (WHITE) and set J4 and J19 jumper positions to SE.
For differential stereo inputs, connect positive RCA male jacks to female RCA jacks input A/AB (RED) and input C/CD (WHITE) and connect negative RCA male jacks to female RCA jacks input B (BLUE) and input D (BLACK) and set J4 and J19 jumper positions to DIFF.
Power up power supply once all the connections are made correctly and the 3.3-V and12-V LEDs (GREEN) will illuminate.
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