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1
2
3
4
8
7
6
5
SHUTDOWN
BYPASS
IN+
IN-
VOGND
V
DD
VO+
D OR DGN PACKAGE
(TOP VIEW)
Audio
Input
Bias
Control
V
DD
350 mW
6
5
7
VO+
V
DD
1
24BYPASS
IN -
VDD/2
C
I
R
I
C
S
1
µ
F
C
B
0.1
µ
F
R
F
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
-
+
-
+
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
350-mW MONO AUDIO POWER AMPLIFIER WITH DIFFERENTIAL INPUTS
• Fully Specified for 3.3-V and 5-V Operation
• Wide Power Supply Compatibility
2.5 V – 5.5 V
• Output Power for R
– 350 mW at V
– 250 mW at V
DD
DD
• Ultralow Supply Current in Shutdown
Mode . . . 0.15 µA
• Thermal and Short-Circuit Protection
• Surface-Mount Packaging
– SOIC
– PowerPAD™ MSOP
DESCRIPTION
The TPA321 is a bridge-tied load (BTL) audio power amplifier developed especially for low-voltage applications
where internal speakers are required. Operating with a 3.3-V supply, the TPA321 can deliver 250 mW of
continuous power into a BTL 8-Ω load at less than 1% THD+N throughout voice band frequencies. Although this
device is characterized out to 20 kHz, its operation was optimized for narrower band applications such as cellular
communications. The BTL configuration eliminates the need for external coupling capacitors on the output in
most applications, which is particularly important for small battery-powered equipment. This device features a
shutdown mode for power-sensitive applications with a quiescent current of 0.15 µA during shutdown. The
TPA321 is available in an 8-pin SOIC surface-mount package and the surface-mount PowerPAD™ MSOP, which
reduces board space by 50% and height by 40%.
L
= 5 V
= 3.3 V
= 8 Ω
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright © 2000–2004, Texas Instruments Incorporated
www.ti.com
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
T
A
–40°C to 85°C TPA321D TPA321DGN AJB
(1) The D and DGN packages are available taped and reeled. To order a taped and reeled part, add the
suffix R to the part number (e.g., TPA321DR).
AVAILABLE OPTIONS
PACKAGED DEVICES
SMALL OUTLINE
(1)
(D) MSOP
(1)
(DGN)
MSOP
SYMBOLIZATION
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
V
T
T
T
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
Supply voltage 6 V
DD
Input voltage –0.3 V to V
I
Continuous total power dissipation Internally limited (see Dissipation Rating Table)
Operating free-air temperature range –40°C to 85°C
A
Operating junction temperature range –40°C to 150°C
J
Storage temperature range –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1)
UNIT
+0.3 V
DD
DISSIPATION RATING TABLE
PACKAGE TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
D 725 mW 5.8 mW/°C 464 mW 377 mW
DGN 2.14 W
(1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(literature number SLMA002), for more information on the PowerPAD™ package. The thermal data
was measured on a PCB layout based on the information in the section entitled Texas Instruments
Recommended Board for PowerPAD on page 33 of the before mentioned document.
(1)
17.1 mW/°C 1.37 W 1.11 W
RECOMMENDED OPERATING CONDITIONS
V
V
V
T
2
Supply voltage 2.5 5.5 V
DD
High-level voltage SHUTDOWN 0.9 V
IH
Low-level voltage SHUTDOWN 0.1 V
IL
Operating free-air temperature –40 85 °C
A
MIN MAX UNIT
DD
V
V
DD
www.ti.com
SLOS312C – JUNE 2000 – REVISED JUNE 2004
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|V
| Output offset voltage (measured differentially) SHUTDOWN = 0 V, RL= 8 Ω, RF= 10 kΩ 5 20 mV
OO
PSRR Power supply rejection ratio V
I
DD
I
DD(SD)
|IIH| High-level input current SHUTDOWN, V
|IIL| Low-level input current SHUTDOWN, V
Supply current (see Figure 3 ) SHUTDOWN = 0 V, RF= 10 kΩ 0.7 1.5 mA
Supply current, shutdown mode (see Figure 4 ) SHUTDOWN = VDD, RF= 10 kΩ 0.15 5 µA
= 3.3 V, TA= 25°C (unless otherwise noted)
DD
DD
= 3.2 V to 3.4 V 85 dB
= 3.3 V, VI= 3.3 V 1 µA
DD
= 3.3 V, VI= 0 V 1 µA
DD
OPERATING CHARACTERISTICS
V
= 3.3 V, TA= 25°C, RL= 8 Ω
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power
THD + N Total harmonic distortion plus noise 1.3%
Maximum output power bandwidth AV= -2 V/V, THD = 3%, See Figure 7 10 kHz
B
1
Unity-gain bandwidth Open loop, See Figure 15 1.4 MHz
Supply ripple rejection ratio f = 1 kHz, CB= 1 µF, See Figure 2 71 dB
V
n
Noise output voltage 15 µV(rms)
(1) Output power is measured at the output terminals of the device at f = 1 kHz.
(1)
THD = 0.5%, See Figure 9 250 mW
PO= 250 mW, f = 20 Hz to 4 kHz,
AV= -2 V/V, See Figure 7
AV= –1 V/V, CB= 0.1 µF,
RL= 32 Ω , See Figure 19
TPA321
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|V
| Output offset voltage (measured differentially) SHUTDOWN = 0 V, RL= 8 Ω, RF= 10 kΩ 5 20 mV
OO
PSRR Power supply rejection ratio V
I
DD
I
DD(SD)
|IIH| High-level input current SHUTDOWN, V
|IIL| Low-level input current SHUTDOWN, V
Supply current (see Figure 3 ) SHUTDOWN = 0 V, RF= 10 kΩ 0.7 1.5 mA
Supply current, shutdown mode (see Figure 4 ) SHUTDOWN = VDD, RF= 10 kΩ 0.15 5 µA
= 5 V, TA= 25°C (unless otherwise noted)
DD
= 4.9 V to 5.1 V 78 dB
DD
= 5.5 V, VI= V
DD
= 5.5 V, VI= 0 V 1 µA
DD
DD
OPERATING CHARACTERISTICS
V
= 5 V, TA= 25°C, RL= 8 Ω
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
THD + N Total harmonic distortion plus noise 1%
B
1
V
n
Output power THD = 0.5%, See Figure 13 700 mW
PO= 350 mW, f = 20 Hz to 4 kHz, See
AV= –2 V/V, Figure 11
Maximum output power bandwidth AV= –2 V/V, THD = 2%, See Figure 11 10 kHz
Unity-gain bandwidth Open loop, See Figure 16 1.4 MHz
Supply ripple rejection ratio f = 1 kHz, CB= 1 µF, See Figure 2 65 dB
Noise output voltage 15 µV(rms)
AV= -1 V/V, CB= 0.1 µF,
RL= 32 Ω , See Figure 20
1 µA
3
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Audio
Input
Bias
Control
V
DD
6
5
7
VO+
V
DD
1
24BYPASS
IN -
VDD/2
C
I
R
I
C
S
1
µ
F
C
B
0.1
µ
F
R
F
SHUTDOWN
VO- 8
R
L = 8
Ω
GND
3 IN+
-
+
-
+
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Terminal Functions
TERMINAL
NAME NO.
BYPASS 2 I
GND 7 GND is the ground connection.
IN- 4 I IN- is the inverting input. IN- is typically used as the audio input terminal.
IN+ 3 I IN+ is the noninverting input. IN+ is typically tied to the BYPASS terminal for SE operations.
SHUTDOWN 1 I SHUTDOWN places the entire device in shutdown mode when held high (I
V
DD
VO+ 5 O VO+ is the positive BTL output.
VO- 8 O VO- is the negative BTL output.
I/O DESCRIPTION
BYPASS is the tap to the voltage divider for internal mid-supply bias. This terminal should be connected
to a 0.1-µF to 1-µF capacitor when used as an audio amplifier.
6 V
is the supply voltage terminal.
DD
PARAMETER MEASUREMENT INFORMATION
DD
~ 0.15 µA).
Figure 1. Test Circuit
4
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−50
−60
−80
−100
20 100 1 k
−30
−20
f − Frequency − Hz
0
10 k 20 k
−10
−40
−70
−90
VDD = 5 V
VDD = 3.3 V
RL = 8 Ω
CB = 1 µF
k
SVR
− Supply Voltage Rejection Ratio − dB
VDD − Supply Voltage − V
1.1
0.7
0.3
−0.1
0.9
0.5
0.1
3 4 62 5
I
DD
− Supply Current − mA
SHUTDOWN = 0 V
RF = 10 kΩ
k
SVR
I
DD
P
O
Supply voltage rejection ratio vs Frequency 2
Supply current vs Supply voltage 3, 4
Output power
THD+N Total harmonic distortion plus noise
Open-loop gain and phase vs Frequency 15, 16
Closed-loop gain and phase vs Frequency 17, 18
V
n
P
D
Output noise voltage vs Frequency 19, 20
Power dissipation vs Output power 21, 22
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Supply voltage 5
vs Load resistance 6
vs Frequency 7, 8, 11, 12
vs Output power 9, 10, 13, 14
SUPPLY VOLTAGE REJECTION RATIO SUPPLY CURRENT
vs vs
FREQUENCY SUPPLY VOLTAGE
Figure 2. Figure 3.
5
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VDD − Supply Voltage − V
0.15
0.1
0.05
3 43.5 4.5
0.35
2 5
0.2
0.25
0.3
5.52.5
0.4
0.45
0.5
I
DD(SD)
− Supply Current − Aµ
SHUTDOWN = V
DD
RF = 10 kΩ
VDD − Supply Voltage − V
600
400
200
0
2.5 3.53 4 5.5
1000
2
P
4.5 5
O
− Output Power − mW
800
THD+N 1%
RL = 32 Ω
RL = 8 Ω
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
SUPPLY CURRENT (SHUTDOWN)
vs
SUPPLY VOLTAGE
Figure 4.
OUTPUT POWER
vs
SUPPLY VOLTAGE
Figure 5.
6
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RL − Load Resistance − Ω
300
200
100
0
16 3224 40 64
800
8
P
48 56
O
− Output Power − mW
400
THD+N = 1%
VDD = 5 V
500
600
VDD = 3.3 V
700
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
AV = −2 V/V
VDD = 3.3 V
PO = 250 mW
RL = 8 Ω
20 1k 10k
1
0.01
10
0.1
20k100
AV = −20 V/V
AV =− 10 V/V
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
PO = 125 mW
VDD = 3.3 V
RL = 8 Ω
AV = −2 V/V
20 1k 10k
1
0.01
10
0.1
20k100
PO = 50 mW
PO = 250 mW
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
OUTPUT POWER
vs
LOAD RESISTANCE
Figure 6.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 7. Figure 8.
7
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PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
f = 20 Hz
VDD = 3.3 V
RL = 8 Ω
AV = −2 V/V
0.01 0.1 1
1
0.01
10
0.1
f = 1 kHz
f = 10 kHz
f = 20 kHz
PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
RL = 8 Ω
0.04 0.1 0.4
1
0.01
10
0.1
0.16 0.22 0.28 0.34
VDD = 3.3 V
f = 1 kHz
AV = −2 V/V
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
AV = −2 V/V
VDD = 5 V
PO = 350 mW
RL = 8 Ω
20 1k 10k
1
0.01
10
0.1
20k100
AV = −20 V/V
AV =− 10 V/V
f − Frequency − Hz
THD+N −Total Harmonic Distortion + Noise − %
PO = 175 mW
VDD = 5 V
RL = 8 Ω
AV = −2 V/V
20 1k 10k
1
0.01
10
0.1
20k100
PO = 50 mW
PO = 350 mW
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 9. Figure 10.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
8
Figure 11. Figure 12.
www.ti.com
PO − Output Power − W
THD+N −Total Harmonic Distortion + Noise − %
f = 20 Hz
VDD = 5 V
RL = 8 Ω
AV = −2 V/V
0.01 0.1 1
1
0.01
10
0.1
f = 1 kHz
f = 10 kHz
f = 20 kHz
PO − Output Power − W
0.1 0.25 10.40 0.55 0.70 0.85
THD+N −Total Harmonic Distortion + Noise − %
RL = 8 Ω
VDD = 5 V
f = 1 kHz
AV = −2 V/V
1
0.01
10
0.1
10
0
−20
−30
20
30
f − Frequency − kHz
40
−10
180
120
0
−120
−180
VDD = 3.3 V
RL = Open
Gain
Phase
60
−60
Open-Loop Gain − dB
Phase − °
1
10
1
10
2
10
3
10
4
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 13. Figure 14.
OPEN-LOOP GAIN AND PHASE
vs
FREQUENCY
Figure 15.
9
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10
0
−20
−30
1
20
30
f − Frequency − kHz
40
−10
180
120
0
−120
−180
VDD = 5 V
RL = Open
Gain
Phase
60
−60
Open-Loop Gain − dB
Phase − °
10
1
10
2
10
3
10
4
−0.5
−1
−1.5
−2
f − Frequency − Hz
−0.25
−0.75
−1.25
−1.75
0
0.5
Closed-Loop Gain − dB
0.25
0.75
130
120
140
Phase − °
150
160
VDD = 3.3 V
RL = 8 Ω
PO = 0.25 W
CI =1 µF
1
170
180
Gain
Phase
10
1
10
2
10
3
10
4
10
5
10
6
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
OPEN-LOOP GAIN AND PHASE
vs
FREQUENCY
10
Figure 16.
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
Figure 17.
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−0.5
−1
−1.5
−2
f − Frequency − Hz
−0.25
−0.75
−1.25
−1.75
0
0.5
Closed-Loop Gain − dB
0.25
0.75
130
120
140
Phase − °
150
160
VDD = 5 V
RL = 8 Ω
PO = 0.35 W
CI =1 µF
1
170
180
Gain
Phase
10
1
10
2
10
3
10
4
10
5
10
6
− Output Noise Voltage − µV
n
f − Frequency − Hz
20 1 k 10 k
10
1
100
20 k100
VO BTL
VDD = 3.3 V
BW = 22 Hz to 22 kHz
RL = 32 Ω
CB =0.1 µF
AV = −1 V/V
V
O+
V(rms)
− Output Noise Voltage − µV
n
f − Frequency − Hz
20 1 k 10 k
10
1
100
20 k100
VDD = 5 V
BW = 22 Hz to 22 kHz
RL = 32 Ω
CB =0.1 µF
AV = −1 V/V
VO BTL
V
O+
V(rms)
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE
Figure 18.
vs vs
FREQUENCY FREQUENCY
Figure 19. Figure 20.
11
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PO − Output Power − mW
200 4000
180
150
120
90
300
P
D
− Power Dissipation − mW
210
240
270
VDD = 3.3 V
RL = 8 Ω
100 300
PO − Output Power − mW
200 600400 8000 1000 1200
VDD = 5 V
RL = 8 Ω
400
320
240
160
720
P
D
− Power Dissipation − mW
480
560
640
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
POWER DISSIPATION POWER DISSIPATION
vs vs
OUTPUT POWER OUTPUT POWER
Figure 21. Figure 22.
12
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Power
V
(RMS)
2
R
L
V
(RMS)
V
O(PP)
2 2
R
L
2x V
O(PP)
V
O(PP)
-V
O(PP)
V
DD
V
DD
f
c
1
2 R
LCC
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION
BRIDGE-TIED LOAD
Figure 23 shows a linear audio power amplifier (APA) in a BTL configuration. The TPA321 BTL amplifier consists
of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive
configuration but power to the load should be initially considered. The differential drive to the speaker means that
as one side is slewing up, the other side is slewing down, and vice versa. This, in effect, doubles the voltage
swing on the load as compared to a ground-referenced load. Plugging 2 × V
voltage is squared, yields 4× the output power from the same supply rail and load impedance (see Equation 1 ).
into the power equation, where
O(PP)
(1)
Figure 23. Bridge-Tied Load Configuration
In a typical portable handheld equipment sound channel operating at 3.3 V, bridging raises the power into an 8-Ω
speaker from a single-ended (SE, ground reference) limit of 62.5 mW to 250 mW. In sound power that is a 6-dB
improvement, which is loudness that can be heard. In addition to increased power, there are frequency response
concerns. Consider the single-supply SE configuration shown in Figure 24 . A coupling capacitor is required to
block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to
1000 µF) so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of
limiting low-frequency performance of the system. This frequency limiting effect is due to the high pass filter
network created with the speaker impedance and the coupling capacitance and is calculated with Equation 2 .
For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, eliminating the need for the blocking capacitors. Low-frequency performance
is then limited only by the input network and speaker response. Cost and PCB space are also minimized by
eliminating the bulky coupling capacitor.
(2)
13
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R
L
C
C
V
O(PP)
V
O(PP)
V
DD
-3 dB
f
c
V
L(RMS)
V
O
I
DD
I
DD(RMS)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Figure 24. Single-Ended Configuration and Frequency Response
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased
dissipation is understandable considering that the BTL configuration produces 4× the output power of a SE
configuration. Internal dissipation versus output power is discussed further in the thermal considerations section.
BTL AMPLIFIER EFFICIENCY
Linear amplifiers are inefficient. The primary cause of these inefficiencies is voltage drop across the output stage
transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that
varies inversely to output power. The second component is due to the sine-wave nature of the output. The total
voltage drop can be calculated by subtracting the RMS value of the output voltage from V
drop multiplied by the RMS value of the supply current, I
DD(RMS)
, determines the internal power dissipation of the
amplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the
amplifier, the current and voltage waveform shapes must first be understood (see Figure 25 ).
Figure 25. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are
different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified
shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.
Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which
supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.
The following equations are the basis for calculating amplifier efficiency.
. The internal voltage
DD
14
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I
DDRMS
2V
P
R
L
P
SUP
VDDI
DDRMS
VDD2V
P
R
L
Efficiency
P
L
P
SUP
where
P
L
V
LRMS
2
R
L
V
p
2
2R
L
V
LRMS
V
P
2
Efficiency of a BTL configuration
V
P
2V
DD
PLR
L
2
12
2V
DD
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Table 1 employs Equation 4 to calculate efficiencies for three different output power levels. The efficiency of the
amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a
nearly flat internal power dissipation over the normal operating range. The internal dissipation at full output power
is less than in the half-power range. Calculating the efficiency for a specific system is the key to proper power
supply design.
(3)
(4)
OUTPUT POWER EFFICIENCY
(1) High-peak voltage values cause the THD to increase.
A final point to remember about linear amplifiers (either SE or BTL) is how to manipulate the terms in the
efficiency equation to utmost advantage when possible. Note that in Equation 4 , V
indicates that as V
DD
Table 1. Efficiency vs Output Power in 3.3-V 8-Ω BTL Systems
PEAK-to-PEAK INTERNAL
(W) (%)
0.125 33.6 1.41 0.26
0.25 47.6 2.00 0.29
0.375 58.3 2.45
VOLTAGE DISSIPATION
(V) (W)
(1)
goes down, efficiency goes up.
0.28
is in the denominator. This
DD
15
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Audio
Input
Bias
Control
V
DD
350 mW
6
5
7
VO+
V
DD
1
24BYPASS
IN -
VDD/2
C
S
1
µ
F
C
B
2.2
µ
F
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
-
+
-
+
C
I
0.47 µF
R
I
10 kΩ
R
F
50 kΩ
C
F
5 pF
Audio
Input-
Bias
Control
V
DD
700 mW
6
5
7
VO+
V
DD
1
24BYPASS
IN -
VDD/2
C
I
C
S
1
µ
F
C
B
2.2
µ
F
SHUTDOWN
VO- 8
GND
From System Control
3 IN+
R
I
10 kΩ
R
F
50 kΩ
-
+
-
+
R
I
10 kΩ
Audio
Input+
C
I
R
F
50 kΩ
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION SCHEMATICS
Figure 26 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of –10 V/V.
Figure 26. TPA321 Application Circuit
Figure 27 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of –10 V/V
with a differential input.
Figure 27. TPA321 Application Circuit With Differential Input
resistor connected between IN+ and BYPASS causes V
F
It is important to note that using the additional R
shift slightly, which could influence the THD+N performance of the amplifier. Although an additional external
operational amplifier could be used to buffer BYPASS from RF, tests in the lab have shown that the THD+N
performance is only minimally affected by operating in the fully differential mode as shown in Figure 27 . The
following sections discuss the selection of the components used in Figure 26 and Figure 27 .
16
/2 to
DD
www.ti.com
COMPONENT SELECTION
BTL Gain AV 2
R
F
R
I
Effective Impedance
RFR
I
RF R
I
−3 dB
f
c
f
c
1
2 RFC
F
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Gain Setting Resistors, R
The gain for each audio input of the TPA321 is set by resistors R
and R
F
I
and RIaccording to Equation 5 for BTL mode.
F
BTL mode operation brings about the factor 2 in the gain equation due to the inverting amplifier mirroring the
voltage swing across the load. Given that the TPA321 is a MOS amplifier, the input impedance is high;
consequently, input leakage currents are not generally a concern, although noise in the circuit increases as the
value of R
increases. In addition, a certain range of R
F
values is required for proper start-up operation of the
F
amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the
amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated in Equation 6 .
As an example, consider an input resistance of 10 kΩ and a feedback resistor of 50 kΩ. The BTL gain of the
amplifier would be –10 V/V, and the effective impedance at the inverting terminal would be 8.3 kΩ, which is well
within the recommended range.
For high-performance applications metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of R
formed from R
compensation capacitor (C
and the inherent input capacitance of the MOS input structure. For this reason, place a small
F
) of approximately 5 pF in parallel with R
F
above 50 kΩ, the amplifier tends to become unstable due to a pole
F
F
when R
is greater than 50 kΩ. In effect,
F
this creates a low-pass filter network with the cutoff frequency defined in Equation 7 .
(5)
(6)
For example, if R
Input Capacitor, C
In the typical application, input capacitor CIis required to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, C
determined in Equation 8 .
F
is 100 kΩ and C
I
is 5 pF then fcis 318 kHz, which is well outside of audio range.
F
and R
I
form a high-pass filter with the corner frequency
I
(7)
17
www.ti.com
−3 dB
f
c
f
c
1
2 RIC
I
C
I
1
2 RIf
c
10
CB 250 k
Ω
1
RF R
I
C
I
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
The value of CIis important to consider as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where R
Equation 8 is reconfigured as Equation 9 .
In this example, C
is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
I
consideration for this capacitor is the leakage path from the input source through the input network (R
the feedback resistor (R
) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
F
that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at V
than the source dc level. It is important to confirm the capacitor polarity in the application.
is 10 kΩ and the specification calls for a flat bass response down to 40 Hz.
I
/2, which is likely higher
DD
, CI) and
I
(8)
(9)
Power Supply Decoupling, C
S
The TPA321 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents
oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by
using two capacitors of different types that target different types of noise on the power supply leads. For higher
frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic
capacitor, typically 0.1 µF, placed as close as possible to the device V
lead, works best. For filtering
DD
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio
power amplifier is recommended.
Midrail Bypass Capacitor, C
B
The midrail bypass capacitor, CB, is the most critical capacitor and serves several important functions. During
start-up or recovery from shutdown mode, C
determines the rate at which the amplifier starts up. The second
B
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD +
N. The capacitor is fed from a 250-kΩ source inside the amplifier. To keep the start-up pop as low as possible,
the relationship shown in Equation 10 should be maintained, which insures the input capacitor is fully charged
before the bypass capacitor is fully charged and the amplifier starts up.
As an example, consider a circuit where C
is 2.2 µF, CIis 0.47 µF, R
B
is 50 kΩ, and RIis 10 kΩ. Inserting these
F
values into the Equation 10 we get:
18.2 ≤ 35.5
which satisfies the rule. Bypass capacitor, CB, values of 2.2-µF to 1-µF ceramic or tantalum low-ESR capacitors
are recommended for the best THD and noise performance.
(10)
18
www.ti.com
PdB 10Log
P
W
P
ref
10Log
350 mW
1 W
–4.6 dB
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application. A real (as opposed to ideal) capacitor can be
modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the
beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the
real capacitor behaves like an ideal capacitor.
5-V VERSUS 3.3-V OPERATION
The TPA321 operates over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-V
and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no
special considerations for 3.3-V versus 5-V operation with respect to supply bypassing, gain setting, or stability.
The most important consideration is that of output power. Each amplifier in TPA321 can produce a maximum
voltage swing of V
opposed to V
O(PP)
8-Ω load before distortion becomes significant.
Operation from 3.3-V supplies, as can be shown from the efficiency formula in Equation 4 , consumes
approximately two-thirds the supply power for a given output-power level than operation from 5-V supplies.
HEADROOM AND THERMAL CONSIDERATIONS
Linear power amplifiers dissipate a significant amount of heat in the package under normal operating conditions.
A typical music CD requires 12 dB to 15 dB of dynamic headroom to pass the loudest portions without distortion
as compared with the average power output. The TPA321 data sheet shows that when the TPA321 is operating
from a 5-V supply into a 8-Ω speaker, 350 mW peaks are available. Converting watts to dB:
–1 V. This means, for 3.3-V operation, clipping starts to occur when V
DD
= 2.3 V as
O(PP)
= 4 V at 5 V. The reduced voltage swing subsequently reduces maximum output power into an
Subtracting the headroom restriction to obtain the average listening level without distortion yields:
4.6 dB – 15 dB = –19.6 dB (15-dB headroom)
4.6 dB – 12 dB = –16.6 dB (12-dB headroom)
4.6 dB – 9 dB = –13.6 dB (9-dB headroom)
4.6 dB – 6 dB = –10.6 dB (6-dB headroom)
4.6 dB – 3 dB = –7.6 dB (3-dB headroom)
Converting dB back into watts:
P
W
PdB/10
= 10
× P
ref
= 11 mW (15 dB headroom)
= 22 mW (12-dB headroom)
= 44 mW (9-dB headroom)
= 88 mW (6-dB headroom)
= 175 mW (3-dB headroom)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the
amplifier system. Comparing the absolute worst case, which is 350 mW of continuous power output with 0 dB of
headroom, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for
the system. Using the power dissipation curves for a 5-V, 8-Ω system, the internal dissipation in the TPA321 and
maximum ambient temperatures is shown in Table 2 .
19
www.ti.com
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
Table 2. TPA321 Power Rating, 5-V, 8-Ω BTL
PEAK OUTPUT
POWER
(mW)
350 350 mW 600 46°C
350 175 mW (3 dB) 500 64°C
350 88 mW (6 dB) 380 85°C
350 44 mW (9 dB) 300 98°C
350 22 mW (12 dB) 200 115°C
350 11 mW (15 dB) 180 119°C
AVERAGE OUTPUT POWER DISSIPATION
POWER (mW)
Table 2 shows that the TPA321 can be used to its full 350-mW rating without any heat sinking in still air up to
46°C.
MAXIMUM AMBIENT
TEMPERATURE
0 CFM
20
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
TPA321D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA321DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA321DGN ACTIVE MSOP-
Power
DGN 8 80 Green (RoHS &
no Sb/Br)
PAD
TPA321DGNG4 ACTIVE MSOP-
Power
DGN 8 80 Green (RoHS &
no Sb/Br)
PAD
TPA321DGNR ACTIVE MSOP-
Power
DGN 8 2500 Green (RoHS &
no Sb/Br)
PAD
TPA321DGNRG4 ACTIVE MSOP-
Power
DGN 8 2500 Green (RoHS &
no Sb/Br)
PAD
TPA321DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
TPA321DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
TPA321DGNR MSOP-
Power
TPA321DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Type
PAD
Package
Drawing
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA321DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPA321DR SOIC D 8 2500 346.0 346.0 29.0
Pack Materials-Page 2
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