TEXAS INSTRUMENTS TPA3001D1 Technical data

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0
10
20
30
40
50
60
70
80
90
0 4 8 12 16 20
PO − Output Power − W
EFFICIENCY
vs
OUTPUT POWER
4
8
Efficiency − %
5
7
9
11
13
15
17
19
21
3.6 4 5 6 7 8 9 10
VCC = 18 V
VCC = 15 V
VCC = 12 V
TA = 25°C, 10% THD Maximum
RL − Load Impedance −
− Output Power − W
MAXIMUM OUTPUT POWER
vs
LOAD IMPEDANCE
O
VCC = 18 V
20-W MONO CLASS-D AUDIO POWER AMPLIFIER

FEATURES DESCRIPTION

20 W Into 8- Load From 18-V Supply (10%
THD+N)
Short Circuit Protection (Short to V
to GND, Short Between Outputs)
Third-Generation Modulation Technique:
Replaces Large LC Filter With Small,
Low-Cost Ferrite Bead Filter in Most
Applications – Improved Efficiency – Improved SNR
Low Supply Current: 8 mA Typ at 12 V
Shutdown Control: < 1 µ A Typ
Space-Saving, Thermally-Enhanced
PowerPAD™ Packaging

APPLICATIONS

LCD Monitors/TVs
Hands-Free Car Kits
Powered Speakers
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
The TPA3001D1 (sometimes referred to as TPA3001) is a 20-W mono bridge-tied load (BTL)
, Short
CC
class-D audio power amplifier (class-D amp) with high efficiency, eliminating the need for heat sinks. The TPA3001D1 (TPA3001) can drive 4- or 8- speakers with only a ferrite bead filter required to reduce EMI.
The gain of the amplifier is controlled by two input terminals, GAIN1 and GAIN0. This allows the amplifier to be configured for a gain of 12, 18, 23.6, and 36 dB. The differential input stage provides high common mode rejection and improved power supply rejection.
The amplifier also includes depop circuitry to reduce the amount of pop at power-up and when cycling SHUTDOWN.
The TPA3001D1 (TPA3001) is available in the 24-pin thermally enhanced TSSOP package (PWP) which eliminates the need for an external heat sink.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2002–2006, Texas Instruments Incorporated
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1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
INN
INP GAIN0 GAIN1
SHUTDOWN
PGND
VCLAMP
BSN
PV
CC
OUTN OUTN PGND
V
CC
VREF BYPASS COSC ROSC AGND AGND BSP PV
CC
OUTP OUTP PGND
PWP PACKAGE
(TOP VIEW)
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
(1) For the most current package and ordering information, see the
(2) The PWP package is available taped and reeled. To order a taped
AVAILABLE OPTIONS
T
A
–40 ° C to 85 ° C TPA3001D1PWP
Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
and reeled part, add the suffix R to the part number (e.g., TPA3001D1PWPR).
PACKAGED DEVICES
(1)
TSSOP (PWP)
(2)
Terminal Functions
TERMINAL
NAME NO.
AGND 18, 19 Analog ground terminal BSN 8 I
BSP 17 I BYPASS 22 I Connect 1- µ F capacitor to ground for BYPASS voltage filtering
COSC 21 I Connect a 220-pF capacitor to ground to set oscillation frequency GAIN0 3 I Bit 0 of gain control (see Table 1 for gain settings) GAIN1 4 I Bit 1 of gain control (see Table 1 for gain settings) INN 1 I Negative differential input INP 2 I Positive differential input OUTN 10, 11 O Negative BTL output, connect Schottky diode from PGND to OUTN for short-circuit protection OUTP 14, 15 O Positive BTL output, connect Schottky diode from PGND to OUTP for short-circuit protection PGND 6, 12, 13 Power ground PV
CC
ROSC 20 I Connect 120 k resistor to ground to set oscillation frequency SHUTDOWN 5 I Shutdown terminal (negative logic), TTL compatible, 21-V compliant V
CC
VCLAMP 7 O Connect 1- µ F capacitor to ground to provide reference voltage for H-bridge gates VREF 23 O 5-V internal regulator for control circuitry (connect a 0.1- µ F to 1- µ F capacitor to ground)
Thermal Pad - -
2
9, 16 I High-voltage power supply (for output stages)
24 I Analog high-voltage power supply
I/O DESCRIPTION
Bootstrap terminal for high-side gate drive of negative BTL output (connect a 0.22- µ F capacitor with a 51- resistor in series from OUTN to BSN)
Bootstrap terminal for high-side gate drive of positive BTL output (connect a 0.22- µ F capacitor with a 51- resistor in series from OUTP to BSP)
Connect to AGND and PGND - should be star point for both grounds. Internal resistive connection to AGND. Thermal vias on the PCB should connect this pad to a large copper area on an internal or bottom layer for the best thermal performance. The PAD must be soldered to the PCB for
mechanical reliability.
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FUNCTIONAL BLOCK DIAGRAM

Gate
Drive
_
+
Gate
Drive
_ +
_ +
_
+
Gain
Adjust
Gain
Adjust
Start-Up
Protection
Logic
Short-Circuit
Detect
Thermal VCC OK
Ramp Generator
Biases
and
References
Gain
2
AGNDVREF
VREF
PV
CC
INN
OUTN
PGND
PV
CC
OUTP
PGND
INP
SHUTDOWN
GAIN1 GAIN0
COSC ROSC
BYPASS
SD
_ +
_
+
Deglitch
Logic
Deglitch
Logic
V
CC
V
CC
BSP
BSN
Clamp
Reference
VCLAMP
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
Supply voltage: V Load impedance, R
CC,
PV
CC
L
SHUTDOWN -0.3 V to V
Input voltage GAIN0, GAIN1 -0.3 V to 5.5 V
INN, INP -0.3 V to 7 V Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T Operating junction temperature range, T Storage temperature range, T Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
stg
A
J
DISSIPATION RATING TABLE
PACKAGE TA≤ 25 ° C DERATING FACTOR TA= 70 ° C TA= 85 ° C
PWP 4.16 W 33.33 mW/ ° C
(1) The PowerPAD must be soldered to a thermal land on the printed circuit board. Please refer to the PowerPAD Thermally Enhanced
Package application note (SLMA002).
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(1)
(1)
2.67 W 2.16 W
UNIT
-0.3 V to 21 V 3.6
-40 ° C to 85 ° C
-40 ° C to 150 ° C
-65 ° C to 150 ° C
+ 0.3 V
CC
3
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TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
Supply voltage, V Load impedance, R High-level input voltage, V Low-level input voltage, V Operating free-air temperature, T
PV
CC,
CC
L
IH
IL
A
(1) The TPA3001D1 must not be used with any speaker or load (including speaker with output filter) that could vary below 3.6 over the
audio frequency band.

ELECTRICAL CHARACTERISTICS

TA= 25 ° C, PV
|V
| mV
OS
PSRR Power supply rejection ratio PV |IIH| High-level input current PV |IIL| Low-level input current PV
I
CC
I
CC(SD)
f
s
r
ds(on)
G Gain
= V
CC
= 12 V (unless otherwise noted)
CC
PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
Output offset voltage (measured differentially)
VI= 0 V, AV= 12 dB, 18, 23.6 dB 50 VI= 0 V, AV= 36 dB 100
SHUTDOWN = 2.0 V, No load 8 15 mA
Supply current
SHUTDOWN = VCC, V
8 Supply current, shutdown mode SHUTDOWN = 0.8 V 1 2 µ A Switching frequency R
OSC
Output transistor on resistance (total) IO= 1 A, TJ= 25 ° C 0.2 0.3 0.7
GAIN1 = 0.8 V, GAIN0 = 0.8 V 10.9 12 12.8 dB
GAIN1 = 0.8 V, GAIN0 = 2 V 17.1 18 18.5 dB
GAIN1 = 2 V, GAIN0 = 0.8 V 23 23.6 24.3 dB
GAIN1 = 2 V, GAIN0 = 2 V 33.9 36 36.5 dB
(1)
RL≥ 3.6
8 18 V
3.6 GAIN0, GAIN1, SHUTDOWN 2 V GAIN0, GAIN1, SHUTDOWN 0.8 V
-40 85 ° C
= 11.5 V to 12.5 V -73 dB
CC
= 12 V, VI= PV
CC
= 12 V, VI= 0 V 1 µ A
CC
= 120 k , C
CC
= 18 V, PO= 20 W, RL=
CC
= 220 pF 250 kHz
OSC
1.3 A
1 µ A

OPERATING CHARACTERISTICS

PV
= V
CC
P
O
THD + N Total harmonic distortion plus noise PO= 10 W, RL= 4 , f = 20 Hz to 20 kHz 0.2% B
OM
k
SVR
SNR Signal-to-noise ratio PO= 10 W, RL= 4 95 dB
V
n
Z
i
4
= 12 V, TA= 25 ° C (unless otherwise noted)
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Continuous output power at 10% THD+N
Continuous output power at 1% THD+N
f = 1 kHz, RL= 4 12.8 f = 1 kHz, RL= 8 9 f = 1 kHz, RL= 4 10.3 f = 1 kHz, RL= 8 7.2
Maximum output power bandwidth THD = 1% 20 kHz Supply ripple rejection ratio f = 1 kHz, C
C
(BYPASS)
filter used, Gain = 12 dB
Noise output voltage
C
(BYPASS)
filter, Gain = 12 dB
(BYPASS)
= 1 µ F, f = 20 Hz to 22 kHz,No weighting
= 1 µ F, f = 20 Hz to 22 kHz,A-weighted
= 1 µ F -70 dB
86 µ V(rms)
-81 dBV 66 µ V(rms)
-84 dBV
Input impedance See Table 1, page 21 >23 k
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W
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TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006

OPERATING CHARACTERISTICS

PV
= V
CC
P
O
THD + N Total harmonic distortion plus noise
B
OM
k
SVR
SNR Signal-to-noise ratio PO= 15 W, RL= 8 102 dB
V
n
Z
i
= 18 V, TA= 25 ° C (unless otherwise noted)
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output power at 10% THD+N
Output power at 1% THD+N
f = 1 kHz, RL= 4 12.8 f = 1 kHz, RL= 8 20 f = 1 kHz, RL= 4 10.3 f = 1 kHz, RL= 8 16 PO= 15 W, RL= 8 , f = 20 Hz to 20 kHz 1%
PO= 2 W, RL= 8 , f = 20 Hz to 20 kHz 0.3% Maximum output power bandwidth THD = 1% 20 kHz Supply ripple rejection ratio f = 1 kHz, C
C
(BYPASS)
filter used, Gain = 12 dB Noise output voltage
C
(BYPASS)
filter, Gain = 12 dB
= 1 µ F, f = 20 Hz to 20 kHz, No weighting
= 1 µ F, f = 20 Hz to 22 kHz, A-weighted
= 1 µ F -70 dB
BYPASS
86 µ V(rms)
-81 dBV 66 µ V(rms) 84 dBV
Input impedance See Table 1, page 21 >23 k
W

TYPICAL CHARACTERISTICS

Table of Graphs

Efficiency vs Output power 1
P
O
I
CC
I
CC(SD)
THD+N Total harmonic distortion + noise
k
SVR
CMRR Common-mode rejection ratio 28 V
IO
Output power vs Load Impedance 2, 3, 4 Supply current 5 Shutdown current 6
vs Supply voltage
vs Output power
7, 8, 9, 10, 11, 12, 13, 14, 15,
vs Frequency 19, 20, 21, 22, 23, 24, 25 Supply voltage rejection ratio 26 Gain and phase vs Frequency 27
Input offset voltage vs Common-mode input voltage 29
FIGURE
16, 17, 18
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0
10
20
30
40
50
60
70
80
90
0 2 4 6 8 10 12 14
PO − Output Power − W
4
8
Efficiency − %
VCC = 12 V
5
7
9
11
13
15
17
19
21
3.6 4 5 6 7 8 9 10
VCC = 18 V
VCC = 15 V
VCC = 12 V
TA = 25°C, 10% THD Maximum
Load Impedance −
− Output Power − WP O
5
7
9
11
13
15
17
19
21
3.6 4 5 6 7 8 9 10
VCC = 18 V
VCC = 15 V
VCC = 12 V
− Maximum Output Power − WP O
ZL − Load Impedance −
TA = 45°C
5
7
9
11
13
15
17
19
21
3.6 4 5 6 7 8 9 10
VCC = 18 V
VCC = 15 V
VCC = 12 V
− Maximum Output Power − WP O
ZL − Load Impedance −
TA = 60°C
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
EFFICIENCY MAXIMUM OUPUT POWER
vs vs
OUTPUT POWER LOAD IMPEDANCE
Figure 1. Figure 2.
MAXIMUM OUPUT POWER MAXIMUM OUTPUT POWER
LOAD IMPEDANCE LOAD IMPEDANCE
6
Figure 3. Figure 4.
vs vs
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6
7
8
9
10
11
8 10 12 14 16 18
VCC − Supply Voltage − V
I
CC
− Supply Current − mA
VCC − Supply Voltage − V
0
1
2
3
4
5
8 10 12 14 16 18
I
CC(SD)
− Shutdown Current − µA
SHUTDOWN = 0.8 V
0.001
0.01
0.1
1
10
0 5 10 15 20
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 18 V , RL = 8 Ω, Gain = 12 dB
0.01
0.1
1
10
0 5 10 15 20
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 18 V , RL = 8 Ω, Gain = 36 dB
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
SUPPLY CURRENT SHUTDOWN CURRENT
vs vs
SUPPLY VOLTAGE SUPPLY VOLTAGE
Figure 5. Figure 6.
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 7. Figure 8.
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0.01
0.1
10
0 5 10 15 20
1
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 15 V , RL = 8 Ω, Gain = 36 dB
0.001
0.01
0.1
10
0 5 10 15 20
1
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 15 V , RL = 8 Ω, Gain = 12 dB
0.01
0.1
10
0 5 10
1
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 15 V , RL = 4 Ω, Gain = 12 dB
0.01
0.1
1
10
0 5 10
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 15 V , RL = 4 Ω, Gain = 36 dB
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 9. Figure 10.
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
OUTPUT POWER OUTPUT POWER
8
Figure 11. Figure 12.
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0.01
0.1
1
10
0 5 10 15
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 12 V , RL = 8 Ω, Gain = 12 dB
0.001
0.01
0.1
1
0 5 10 15
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 12 V , RL = 8 Ω, Gain = 36 dB
10
0.001
0.01
0.1
1
10
0 5 10
1 kHz
20 Hz
20 kHz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 12 V , RL = 4 Ω, Gain = 12 dB
0.01
0.1
1
10
0 5 10
1 kHz
20 kHz
20 Hz
THD+N − Total Harmonic Distortion Plus Noise − %
PO − Output Power − W
VCC = 12 V , RL = 4 Ω, Gain = 36 dB
TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 13. Figure 14.
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 15. Figure 16.
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