TEXAS INSTRUMENTS TPA2005D1-Q1 Technical data

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_ +

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

–

Differential

Input

TPA2005D1

SHUTDOWN

Actual Solution Size

2.5 mm

6 mm

(MicroStar Junior BGA)

1.4-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER

TPA2005D1-Q1

SLOS474 – AUGUST 2005

FEATURES

• Qualification in Accordance With AEC-Q100

(1)

• Space Saving Package

– 3 mm x 3 mm QFN package (DRB)

• Qualified for Automotive Applications – 2,5 mm x 2,5 mm MicroStar Junior™

• Customer-Specific Configuration Control Can

BGA Package (ZQY)

Be Supported Along With Major-Change – 3 mm x 5 mm MSOP PowerPAD™ Package Approval (DGN)

• 1.4 W Into 8 Ω From a 5-V Supply at – TPA2010D1 Available in 1,45 mm x 1,45 mm

THD = 10% (Typ) WCSP (YZF)

• Maximum Battery Life and Minimum Heat – Efficiency With an 8- Ω Speaker:

• 84% at 400 mW

APPLICATIONS

• Ideal for Wireless or Cellular Handsets and

PDAs

• 79% at 100 mW

– 2.8-mA Quiescent Current – 0.5- µ A Shutdown Current

• Only Three External Components – Optimized PWM Output Stage Eliminates LC

Output Filter

– Internally Generated 250-kHz Switching

Frequency Eliminates Capacitor and Resistor

– Improved PSRR (-71 dB at 217 Hz) and

Wide Supply Voltage (2.5 V to 5.5 V) Eliminates Need for a Voltage Regulator

– Fully Differential Design Reduces RF

Rectification and Eliminates Bypass Capacitor

– Improved CMRR Eliminates Two Input

DESCRIPTION

The TPA2005D1 is a 1.4-W high-efficiency filter-free class-D audio power amplifier in a MicroStar Junior™ BGA, QFN, or MSOP package that requires only three external components.

Features like 84% efficiency, -71-dB PSRR at 217 Hz, improved RF-rectification immunity, and 15-mm for cellular handsets. A fast start-up time of 9 ms with minimal pop makes the TPA2005D1 ideal for PDA applications.

In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the TPA2005D1. The device allows independent gain control by summing the signals from each function, while minimizing noise to only 48 µ V

total PCB area make the TPA2005D1 ideal

RMS

Coupling Capacitors

(1) Contact factory for details. Q100 qualification data available

on request.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

MicroStar Junior, PowerPAD are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

APPLICATION CIRCUIT

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TPA2005D1-Q1

SLOS474 – AUGUST 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

-40 ° C to 85 ° C

(1) The GQY, ZQY, and DRB packages are only available taped and reeled. An R at the end of the part number indicates the devices are

taped and reeled.

(2) The GQY is the standard MicroStar Junior™ package. The ZQY is lead-free option, and is qualified for 260 ° lead-free assembly.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

In active mode -0.3 V to 6 V

Supply voltage

Input voltage -0.3 V to V

Continuous total power dissipation See Dissipation Rating Table

Operating free-air temperature -40 ° C to 85 ° C

Operating junction temperature -40 ° C to 150 ° C

Storage temperature -65 ° C to 85 ° C

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) For the MSOP (DGN) package option, the maximum V

(2)

In SHUTDOWN mode -0.3 V to 7 V

PACKAGE PART NUMBER SYMBOL

MicroStar Junior™ (GQY) TPA2005D1GQYR

MicroStar Junior™ (ZQY)

(2)

TPA2005D1ZQYR

8-pin QFN (DRB) TPA2005D1DRBR

8-pin MSOP (DGN) TPA2005D1DGN(R) PREVIEW

(1)

should be limited to 5 V if short-circuit protection is desired.

(1)

PREVIEW PREVIEW

BIQ

UNIT

+ 0.3 V

RECOMMENDED OPERATING CONDITIONS

MIN NOM MAX UNIT

Supply voltage 2.5 5.5 V

High-level input voltage SHUTDOWN 2 V

Low-level input voltage SHUTDOWN 0 0.7 V

Input resistor Gain ≤ 20 V/V (26 dB) 15 k Ω

Common-mode input voltage range V

Operating free-air temperature -40 85 ° C

= 2.5 V, 5.5 V, CMRR ≤ -49 dB 0.5 VDD-0.8 V

DISSIPATION RATINGS

PACKAGE

GQY, ZQY 16 mW/ ° C 2 W 1.28 W 1.04 W

DRB 21.8 mW/ ° C 2.7 W 1.7 W 1.4 W DGN 17.1 mW/ ° C 2.13 W 1.36 W 1.11 W

DERATING TA≤ 25 ° C TA= 70 ° C TA= 85 ° C

FACTOR POWER RATING POWER RATING POWER RATING

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V V

2

142 k

2

158 k

2

150 k

TPA2005D1-Q1

SLOS474 – AUGUST 2005

ELECTRICAL CHARACTERISTICS

TA= -40 ° C to 85 ° C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

|V PSRR Power-supply rejection ratio V

CMRR Common-mode rejection ratio VIC= VDD/2 to 0.5 V, dB

|IIH| High-level input current V |IIL| Low-level input current V

(Q)

(SD)

DS(on)

(sw)

Output offset voltage

| VI= 0 V, AV= 2 V/V, V

(measured differentially)

= 2.5 V to 5.5 V -75 -55 dB

= 2.5 V to 5.5 V, TA= 25 ° C -68 -49

VIC= VDD/2 to V

= 5.5 V, VI= 5.8 V 50 µ A

= 5.5 V, VI= 0.3 V 4 µ A

= 5.5 V, no load 3.4 4.5

Quiescent current V

Shutdown current V

Static drain-source on-state resistance

Output impedance in SHUTDOWN

Switching frequency V

= 3.6 V, no load 2.8 mA

= 2.5 V, no load 2.2 3.2

DD (SHUTDOWN)

= 2.5 V 770

= 3.6 V 590 m Ω

= 5.5 V 500

(SHUTDOWN)

= 2.5 V to 5.5 V 200 250 300 kHz

= 2.5 V to 5.5 V 25 mV

= 0.8 V, V

- 0.8 V

TA= -40 ° C to 85 ° C -35

= 2.5 V to 5.5 V 0.5 2 µ A

= 0.8 V >1 k Ω

Gain

OPERATING CHARACTERISTICS

TA= 25 ° C, Gain = 2 V/V, RL= 8 Ω (unless otherwise noted)

PARAMETER TEST CONDITIOINS MIN TYP MAX UNIT

THD + N= 1%, f = 1 kHz, RL= 8 Ω

THD+N PO= 0.5 W, f = 1 kHz, RL= 8 Ω V

SVR

SNR Signal-to-noise ratio PO= 1 W, RL= 8 Ω V

CMRR Common-mode rejection ratio VIC= 1 Vpp, f = 217 Hz V Z

Output power

THD + N= 10%, f = 1 kHz, RL= 8 Ω

PO= 1 W, f = 1 kHz, RL= 8 Ω V Total harmonic distortion plus noise

PO= 200 mW, f = 1 kHz, RL= 8 Ω V Supply ripple rejection ratio V

Output voltage noise µ V

f = 217 Hz, V

Inputs ac-grounded with Ci= 2 µ F

= 3.6 V, f = 20 Hz to 20 kHz,

Inputs ac-grounded with Ci= 2 µ F

= 200 mV

(RIPPLE)

Input impedance 142 150 158 k Ω Start-up time from shutdown V

= 5 V 1.18

= 3.6 V 0.58 W

= 2.5 V 0.26

= 5 V 1.45

= 3.6 V 0.75 W

= 2.5 V 0.35

= 5 V 0.18%

= 3.6 V 0.19%

= 2.5 V 0.20%

= 3.6 V -71 dB

= 5 V 97 dB

No weighting 48 A weighting 36

= 3.6 V -63 dB

= 3.6 V 9 ms

RMS

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(A1) (B1)

(A4)

(C4) (D4)

(SIDE VIEW)

MicroStar Junior (GQY) PACKAGE

(TOP VIEW)

NC V

SHUTDOWN

IN+ IN−

O−

O+

(C1) (D1)

(B4)

GND

SHUTDOWN

NC IN+ IN−

O−

GND V

O+

8-PIN QFN (DRB) PACKAGE

(TOP VIEW)

7 6 5

1 2 3 4

NC − No internal connection

O−

GND V

O+

8 7 6 5

1 2 3 4

SHUTDOWN

NC IN+ IN−

8-PIN MSOP (DGN) PACKAGE

(TOP VIEW)

150 kΩ

Deglitch

Logic

Deglitch

Logic

Gate

Drive

Gate

Drive

Short Circuit Detect

Startup & Thermal Protection

Logic

Ramp Generator

Biases

and

References

TTL

Input

Buffer

Gain = 2 V/V

B4, C4

O−

O+

†

GND

IN−

IN+

SHUTDOWN

†

A2, A3, B3, C2, C3, D2, D3 (terminal labels for MicroStar Junior package)

TPA2005D1-Q1

SLOS474 – AUGUST 2005

PIN ASSIGNMENTS

A. The shaded terminals are used for electrical and thermal connections to the ground plane. All of the shaded terminals

must be electrically connected to ground. No connect (NC) terminals still need a pad and trace.

B. The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane.

Terminal Functions

TERMINAL

NAME ZQY, GQY DRB, DGN

IN- D1 4 I Negative differential input IN+ C1 3 I Positive differential input V

O+

B4, C4 6 I Power supply

D4 5 O Positive BTL output

A2, A3, B3,

GND C2, C3, D2, 7 I High-current ground

O-

A4 8 O Negative BTL output SHUTDOWN A1 1 I Shutdown terminal (active low logic) NC B1 2 No internal connection Thermal Pad Must be soldered to a grounded pad on the PCB.

I/O DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

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TPA2005D1

IN+

IN−

OUT+

OUT−

GND

Measurement

Output

−

1 µF

−

Load

30 kHz

Low Pass

Filter

Measurement

Input

−

TPA2005D1-Q1

SLOS474 – AUGUST 2005

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Efficiency vs Output power 1, 2

(Q)

(SD)

THD+N Total harmonic distortion plus noise vs Frequency 13, 14, 15, 16

SVR

CMRR Common-mode rejection ratio

Power dissipation vs Output power 3

Supply current vs Output power 4, 5 Quiescent current vs Supply voltage 6 Shutdown current vs Shutdown voltage 7

Output power

vs Supply voltage 8 vs Load resistance 9, 10 vs Output power 11, 12

vs Common-mode input voltage 17

Supply-voltage rejection ratio

GSM power-supply rejection

vs Frequency 18, 19, 20 vs Common-mode input voltage 21 vs Time 22 vs Frequency 23 vs Frequency 24 vs Common-mode input voltage 25

TEST SET-UP FOR GRAPHS

A. CIwas shorted for any common-mode input voltage measurement. B. A 33- µ H inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements. C. The 30-kHz low-pass filter is required, even if the analyzer has a low-pass filter. An RC filter (100 Ω , 47 nF) is used

on each output for the data sheet graphs.

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0 0.2 0.4 0.6 0.8 1 1.2

VDD = 2.5 V, RL= 8 Ω, 33 µH

VDD = 5 V, RL = 8 Ω, 33 µH

Class-AB, VDD = 5 V, RL = 8 Ω

- Output Power - W

Efficiency - %

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0 0.2 0.4 0.6 0.8 1 1.2

- Power Dissipation - WP D

- Output Power - W

Class-AB, VDD = 5 V, RL = 8 Ω

Class-AB, VDD = 3.6 V, R

= 8 Ω

VDD = 3.6 V, RL = 8 Ω, 33 µH

VDD = 5 V, RL = 8 Ω, 33 µH

100

0 0.1 0.2 0.3 0.4 0.5 0.6

- Output Power - W

Efficiency - %

VDD = 3.6

RL = 32 Ω, 33 µH

RL = 16 Ω, 33 µH

RL = 8 Ω, 33 µH

Class-AB, RL = 8 Ω

100

150

200

250

300

0 0.2 0.4 0.6 0.8 1 1.2

- Output Power - W

VDD = 2.5 V, RL = 8 Ω, 33 µH

VDD = 3.6 V, RL = 8 Ω, 33 µH

VDD = 5 V, RL = 8 Ω, 33 µH

Supply Current - mA

100

150

200

250

0 0.1 0.2 0.3 0.4 0.5 0.6

RL = 8 Ω, 33 µH

VDD = 3.6 V

RL = 32 Ω, 33 µH

Supply Current - mA

- Output Power - W

2.2

2.4

2.6

2.8

3.2

3.4

3.6

3.8

2.5 3 3.5 4 4.5 5 5.5

(Q)

− Quiescent Current − mA

VDD − Supply Voltage − V

No Load

RL = 8 Ω, 33 µH

2.5 3 3.5 4 4.5 5

- Supply Voltage - V

- Output Power - WP O

RL = 8 Ω f = 1 kHz Gain = 2 V/V

THD+N = 1%

THD+N = 10%

0.2

0.4

0.6

0.8

1.2

1.4

1.6

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

VDD = 2.5 V

VDD = 3.6 V

VDD = 5 V

Shutdown Voltage - V

- Shutdown Current -

(SD)

Aµ

0.2

0.4

0.6

0.8

1.2

1.4

8 12 16 20 28

RL - Load Resistance - Ω

- Output Power - WP O

3224

f = 1 kHz THD+N = 1% Gain = 2 V/V

VDD = 2.5 V

VDD = 3.6 V

VDD = 5 V

TPA2005D1-Q1

SLOS474 – AUGUST 2005

EFFICIENCY EFFICIENCY POWER DISSIPATION

vs vs vs

OUTPUT POWER OUTPUT POWER OUTPUT POWER

Figure 1. Figure 2. Figure 3.

SUPPLY CURRENT SUPPLY CURRENT QUIESCENT CURRENT

vs vs vs

OUTPUT POWER OUTPUT POWER SUPPLY VOLTAGE

Figure 4. Figure 5. Figure 6.

SHUTDOWN CURRENT OUTPUT POWER OUTPUT POWER

vs vs vs

SHUTDOWN VOLTAGE SUPPLY VOLTAGE LOAD RESISTANCE

Figure 7. Figure 8. Figure 9.

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0.2

0.4

0.6

0.8

1.2

1.4

1.6

8 12 16 20 24 28 32

VDD = 5 V

VDD = 3.6 V

VDD = 2.5 V

- Load Resistance - Ω

- Output Power - WP O

f = 1 kHz THD+N = 10% Gain = 2 V/V

0.1

0.2

0.5

0.01 20.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion + Noise − %

5 V

3.6 V

2.5 V

RL = 8 Ω, f = 1 kHz, Gain = 2 V/V

0.1

0.2

0.5

0.01 20.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion + Noise − %

5 V

3.6 V

2.5 V

RL = 16 Ω, f = 1 kHz, Gain = 2 V/V

0.008

0.02

0.05

0.1

0.2

0.5

20 100 1 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion + Noise − %

50 mW

250 mW

1 W

VDD = 5 V CI = 2 µF RL = 8 Ω Gain = 2 V/V

0.5

0.2

0.1

0.05

0.02

0.01 20 100 1 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion + Noise − %

VDD = 3.6 V CI = 2 µF RL = 8 Ω Gain = 2 V/V

500 mW

25 mW

125 mW

2 1

0.5

0.2

0.1

0.05

0.02

0.01 20 100 1 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion + Noise − %

15 mW

VDD = 2.5 V CI = 2 µF RL = 8 Ω Gain = 2 V/V

75 mW

200 mW

0.1

0 0.5 1 1.5 2 2.5 3 3.5

VDD = 2.5 V

VDD = 3.6 V

f = 1 kHz PO = 200 mW

- Common Mode Input Voltage - V

THD+N - Total Harmonic Distortion + Noise - %

−80

−70

−60

−50

−40

−30

−20

−10

20 100 1 k 20 k

f − Frequency − Hz

− Supply Voltage Rejection Ratio − dBk SVR

CI = 2 µF RL = 8 Ω V

p-p

= 200 mV Inputs ac-Grounded Gain = 2 V/V

VDD = 5 V

VDD = 3.6 V

VDD =2. 5 V

VDD = 3.6 V CI = 2 µF RL = 16 Ω Gain = 2 V/V

f − Frequency − Hz

THD+N − Total Harmonic Distortion + Noise − %

0.5

0.2

0.1

0.05

0.02

0.01 20 100 1 k 20 k

15 mW

75 mW

200 mW

TPA2005D1-Q1

SLOS474 – AUGUST 2005

OUTPUT POWER TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +

LOAD RESISTANCE vs vs

vs NOISE NOISE

OUTPUT POWER OUTPUT POWER

Figure 10. Figure 11. Figure 12.

TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +

NOISE NOISE NOISE

vs vs vs

FREQUENCY FREQUENCY FREQUENCY

Figure 13. Figure 14. Figure 15.

TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + SUPPLY-VOLTAGE REJECTION

NOISE NOISE RATIO

vs vs vs

FREQUENCY COMMON MODE INPUT VOLTAGE FREQUENCY

Figure 16. Figure 17. Figure 18.

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−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

− Supply Voltage Rejection Ratio − dBk SVR

20 100 1 k 20 k

Gain = 5 V/V CI = 2 µF RL = 8 Ω V

p-p

= 200 mV

Inputs ac-Grounded

VDD = 5 V

VDD = 2. 5 V

VDD = 3.6 V

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

− Supply Voltage Rejection Ratio − dBk SVR

VDD = 3.6 V

CI = 2 µF RL = 8 Ω Inputs Floating Gain = 2 V/V

20 100 1 k 20 k

-90

-80

-70

-60

-50

-40

-30

-20

-10

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

- Common Mode Input Voltage - V

f = 217 Hz RL = 8 Ω Gain = 2 V/V

VDD = 2.5 V

- Supply Voltage Rejection Ratio - dBk SVR

VDD = 3.6 V

VDD = 5 V

C1 - Duty

12.6% C1 -

Frequency

216.7448 Hz C1 - Amplitude

512 mV

C1 - High

3.544 V

Voltage - V

t - Time - ms

OUT

-150

-100

-50

0 400 800 1200 1600 2000

-150

-100

-50

f - Frequency - Hz

- Output Voltage - dBVV O

- Supply Voltage - dBVV DD

VDD Shown in Figure 22 CI = 2 µF, Inputs ac-grounded Gain = 2V/V

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

CMRR − Common Mode Rejection Ratio − dB

20 100 1 k 20 k

VDD = 2.5 V to 5 V VIC = 1 V

p−p

RL = 8 Ω Gain = 2 V/V

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

RL = 8 Ω Gain = 2 V/V

- Common Mode Input Voltage - V

CMRR - Common Mode Rejection Ratio - dB

VDD = 5 V

VDD = 2.5 V VDD = 3.6 V

TPA2005D1-Q1

SLOS474 – AUGUST 2005

SUPPLY-VOLTAGE REJECTION SUPPLY-VOLTAGE REJECTION SUPPLY-VOLTAGE REJECTION

RATIO RATIO RATIO

vs vs vs

FREQUENCY FREQUENCY COMMON-MODE INPUT VOLTAGE

Figure 19. Figure 20. Figure 21.

GSM POWER-SUPPLY REJECTION GSM POWER-SUPPLY REJECTION

vs vs

TIME FREQUENCY

Figure 22. Figure 23.

COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO

vs vs

FREQUENCY COMMON-MODE INPUT VOLTAGE

Figure 24. Figure 25.

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IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

–

Differential

Input

TPA2005D1

Filter-Free Class D

SHUTDOWN

TPA2005D1-Q1

SLOS474 – AUGUST 2005

APPLICATION INFORMATION

FULLY DIFFERENTIAL AMPLIFIER

The TPA2005D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around V regardless of the common-mode voltage at the input. The fully differential TPA2005D1 can still be used with a single-ended input; however, the TPA2005D1 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection.

Advantages of Fully Differential Amplifiers

• Input-coupling capacitors not required: – The fully differential amplifier allows the inputs to be biased at a voltage other than midsupply. For

example, if a codec has a midsupply lower than the midsupply of the TPA2005D1, the common-mode feedback circuit adjusts, and the TPA2005D1 outputs still is biased at midsupply of the TPA2005D1. The inputs of the TPA2005D1 can be biased from 0.5 V to V

- 0.8 V. If the inputs are biased outside of that

range, input-coupling capacitors are required.

• Midsupply bypass capacitor, C

(BYPASS)

, not required:

– The fully differential amplifier does not require a bypass capacitor. This is because any shift in the

midsupply affects both positive and negative channels equally and cancels at the differential output.

• Better RF-immunity: – GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The

transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier.

/2,

COMPONENT SELECTION

Figure 26 shows the TPA2005D1 typical schematic with differential inputs, and Figure 27 shows the TPA2005D1

with differential inputs and input capacitors, and Figure 28 shows the TPA2005D1 with single-ended inputs. Differential inputs should be used whenever possible, because the single-ended inputs are much more susceptible to noise.

Table 1. Typical Component Values

REF DES VALUE EIA SIZE MANUFACTURER PART NUMBER

(1)

(1) CIis needed only for single-ended input or if V

high-pass corner frequency of 321 Hz.

Figure 26. Typical TPA2005D1 Application Schematic With Differential Input for a Wireless Phone

150 k Ω ( ± 0.5%) 0402 Panasonic ERJ2RHD154V

1 µ F (+22%, -80%) 0402 Murata GRP155F50J105Z

3.3 nF ( ± 10%) 0201 Murata GRP033B10J332K is not between 0.5 V and V

ICM

- 0.8 V. CI= 3.3 nF (with RI= 150 k Ω ) gives a

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_ +

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

Differential

Input

TPA2005D1

Filter-Free Class D

SHUTDOWN

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

Single-ended

Input

TPA2005D1

Filter-Free Class D

SHUTDOWN

TPA2005D1-Q1

SLOS474 – AUGUST 2005

Figure 27. TPA2005D1 Application Schematic With Differential Input and Input Capacitors

Figure 28. TPA2005D1 Application Schematic With Single-Ended Input

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Gain  2

150 k



V V







2 RIC







2 RIf



TPA2005D1-Q1

SLOS474 – AUGUST 2005

Input Resistors (R

The input resistors (R

Resistor matching is very important in fully differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors, or better, to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%.

Place the input resistors very close to the TPA2005D1 to limit noise injection on the high-impedance nodes. For optimal performance, the gain should be set to 2 V/V or lower. Lower gain allows the TPA2005D1 to operate

at its best and keeps a high voltage at the input, making the inputs less susceptible to noise.

Decoupling Capacitor (C

The TPA2005D1 is a high-performance class-D audio amplifier that requires adequate power-supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1 µ F, placed as close as possible to the device V the TPA2005D1 is very important for the efficiency of the class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency noise signals, a 10- µ F, or greater, capacitor placed near the audio power amplifier also helps, but it is not required in most applications because of the high PSRR of this device.

)

) set the gain of the amplifier according to equation Equation 1 .

)

lead, works best. Placing this decoupling capacitor close to

(1)

Input Capacitors (C

The TPA2005D1 does not require input coupling capacitors if the design uses a differential source that is biased from 0.5 V to V common-mode input range, if needing to use the input as a high pass filter (shown in Figure 27 ), or if using a single-ended source (shown in Figure 28 ), input coupling capacitors are required.

The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in

Equation 2 .

The value of the input capacitor is important to consider, as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones usually cannot respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application.

Equation 3 is reconfigured to solve for the input coupling capacitance.

If the corner frequency is within the audio band, the capacitors should have a tolerance of ± 10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below.

For a flat low-frequency response, use large input coupling capacitors (1 µ F). However, in a GSM phone the ground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217-Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a 217-Hz hum.

)

- 0.8 V (shown in Figure 26 ). If the input signal is not biased within the recommended

(2)

(3)

SUMMING INPUT SIGNALS WITH THE TPA2005D1

Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. The TPA2005D1 makes it easy to sum signals or use separate signal sources with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker.

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Gain 1 

 2 

150 k



V V



Gain 2 

 2 

150 k



V V



_ +

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

–

Differential

Input 1

SHUTDOWN

–

Differential

Input 2

Filter-Free Class D

Gain 1 

 2 

150 k



V V



Gain 2 

 2 

150 k



V V







2 RI2f



TPA2005D1-Q1

SLOS474 – AUGUST 2005

Summing Two Differential Input Signals

Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input source can be set independently (see Equation 4 and Equation 5 and Figure 29 ).

If summing left and right inputs with a gain of 1 V/V, use R If summing a ring tone and a phone signal, set the ring-tone gain to gain 2 = 2 V/V, and the phone gain to

gain 1 = 0.1 V/V. The resistor values are:

• R

= 3 M Ω and R

= 150 k Ω .

= RI2= 300 k Ω .

(4)

(5)

Figure 29. Application Schematic With TPA2005D1 Summing Two Differential Inputs

Summing a Differential Input Signal and a Single-Ended Input Signal

Figure 30 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couple

in through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-ended input is set by C

, shown in Equation 8 . To ensure that each input is balanced, the single-ended input must be

driven by a low-impedance source even if the input is not in use.

(6)

(7)

(8)

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



2 150k 20Hz



CI2 53pF

_ +

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

Differential

Input 1

Filter-Free Class D

SHUTDOWN

Single-Ended

Input 2

TPA2005D1-Q1

SLOS474 – AUGUST 2005

If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring tone might be limited to a single-ended signal. If phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain is set to gain 2 = 2 V/V, the resistor values are:

• R The high-pass corner frequency of the single-ended input is set by C

than 20 Hz, then:

= 3 M Ω and R

= 150 k Ω .

. If the desired corner frequency is less

(9)

(10)

Figure 30. Application Schematic With TPA2005D1 Summing Differential Input and

Single-Ended Input Signals

Summing Two Single-Ended Input Signals

Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner frequencies (f

and fc2) for each input source can be set independently (see Equation 11 through Equation 14

and Figure 31 ). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the IN- terminal. The single-ended inputs must be driven by low-impedance sources, even if one of the inputs is not outputting an ac signal.

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Gain 1 

 2 

150 k



V V



Gain 2 

 2 

150 k



V V







2 RI1f







2 RI2f



CP CI1 C



RI1 R



RI1 R



_ +

IN–

IN+

PWM H–

Bridge

O+

O–

Internal

Oscillator

To Battery

GND

Bias

Circuitry

Filter-Free Class D

SHUTDOWN

Single-Ended

Input 2

Single-Ended

Input 1

JA

Derating Factor



0.016

 62.5°CW

TAMax  TJMax  JAP

Dmax

 150  62.5 (0.2)  137.5°C

TPA2005D1-Q1

SLOS474 – AUGUST 2005

(11)

(12)

(13)

(14) (15)

(16)

Figure 31. Application Schematic With TPA2005D1 Summing Two Single-Ended Inputs

EFFICIENCY AND THERMAL INFORMATION

The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for the 2,5-mm x 2,5-mm MicroStar Junior package is shown in the dissipation rating table. Converting this to θJA:

Given θ dissipation of 0.2 W (worst case 5-V supply), the maximum ambient temperature can be calculated with equation

Equation 18 .

Equation 18 shows that the calculated maximum ambient temperature is 137.5 ° C at maximum power dissipation

with a 5-V supply; however, the maximum ambient temperature of the package is limited to 85 ° C. Because of the efficiency of the TPA2005D1, it can be operated under all conditions to an ambient temperature of 85 ° C. The TPA2005D1 is designed with thermal protection that turns the device off when the junction temperature surpasses 150 ° C to prevent damage to the IC. Also, using speakers more resistive than 8 Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier.

of 62.5 ° C/W, the maximum allowable junction temperature of 150 ° C, and the maximum internal

(17)

(18)

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0,28 mm

0,38 mm

0,25 mm

IN+

IN−

GND GND

GND

GND GND

VDD

Vo+

Vo−

Solder Mask

Paste Mask

Copper Trace

TPA2005D1-Q1

SLOS474 – AUGUST 2005

BOARD LAYOUT

Component Location

Place all the external components very close to the TPA2005D1. The input resistors need to be very close to the TPA2005D1 input pins so noise does not couple on the high-impedance nodes between the input resistors and the input amplifier of the TPA2005D1. Placing the decoupling capacitor, CS, close to the TPA2005D1 is important for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency.

Trace Width

Make the high current traces going to pins VDD, GND, V 0,7 mm. If these traces are too thin, the TPA2005D1 performance and output power will decrease. The input traces do not need to be wide, but do need to run side-by-side to enable common-mode noise cancellation.

MicroStar Junior™ BGA Layout

Use the following MicroStar Junior BGA ball diameters:

• 0,25 mm diameter solder mask

• 0,28 mm diameter solder paste mask/stencil

• 0,38 mm diameter copper trace

Figure 32 shows how to lay out a board for the TPA2005D1 MicroStar Junior BGA.

and V

O+

of the TPA2005D1 have a minimum width of

O-

Figure 32. TPA2005D1 MicroStar Junior BGA Board Layout (Top View)

8-Pin QFN (DRB) Layout

Use the following land pattern for board layout with the 8-pin QFN (DRB) package. Note that the solder paste should use a hatch pattern to fill solder paste at 50% to ensure that there is not too much solder paste under the package.

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0,65 mm

0,38 mm

Solder Mask: 1,4 mm x 1,85 mm centered in package

0,7 mm

1,4 mm

Make solder paste a hatch pattern to fill 50%

3,3 mm

1,95 mm

0,33 mm plugged vias (5 places)

TPA2005D1-Q1

SLOS474 – AUGUST 2005

Figure 33. TPA2005D1 8-Pin QFN (DRB) Board Layout (Top View)

ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1

This section focuses on why the user can eliminate the output filter with the TPA2005D1.

Effect on Audio

The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are much greater than 20 kHz, so the only signal heard is the amplified input audio signal.

Traditional Class-D Modulation Scheme

The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output in which each output is 180 degrees out of phase and changes from ground to the supply voltage, V the differential pre-filtered output varies between positive and negative V 0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in

Figure 34 . Note that, even at an average of 0 V across the load (50% duty cycle), the current to the load is high,

causing a high loss and thus causing a high supply current.

, where filtered 50% duty cycle yields

. Therefore,

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0 V

–5 V

+5 V

Current

OUT+

Differential Voltage

Across Load

OUT–

0 V

–5 V

+5 V

Current

OUT+

OUT–

Voltage

Across

Load

0 V

–5 V

+5 V

Current

OUT+

OUT–

Voltage

Across

Load

Output = 0 V

Output > 0 V

TPA2005D1-Q1

SLOS474 – AUGUST 2005

Figure 34. Traditional Class-D Modulation Scheme Output Voltage and Current Waveforms Into an

Inductive Load With No Input

TPA2005D1 Modulation Scheme

The TPA2005D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage. However, OUT+ and OUT- are now in phase with each other, with no input. The duty cycle of OUT+ is greater than 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- is greater than 50% for negative voltages. The voltage across the load remains at 0 V throughout most of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load.

Figure 35. The TPA2005D1 Output Voltage and Current Waveforms Into an Inductive Load

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SPKR

 P

SUP–PSUP THEORETICAL

(at max output power)

SPKR



SUP

OUT

–

SUP THEORETICAL

OUT

(at max output power)

SPKR

 P

OUT





MEASURED



THEORETICAL



(at max output power)

THEORETICAL 

RL 2r

DS(on)

(at max output power)

TPA2005D1-Q1

SLOS474 – AUGUST 2005

Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme

The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 × V for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half-cycle for the next half-cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive.

The TPA2005D1 modulation scheme has very little loss in the load without a filter because the pulses are very short and the change in voltage is V

instead of 2 × V

making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not needed.

An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance than the speaker, resulting in less power dissipation, which increases efficiency.

Effects of Applying a Square Wave Into a Speaker

If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidth of the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to

1/f

for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequency is very small. However, damage could occur to the speaker if the voice coil is not designed to handle the additional power. To size the speaker for added power, the ripple current dissipated in the load must be calculated by subtracting the theoretical supplied power, P maximum output power, P efficiency, η

MEASURED

, minus the theoretical efficiency, η

. The switching power dissipated in the speaker is the inverse of the measured

OUT

, and the time at each voltage is one-half the period

. As the output power increases, the pulses widen,

SUP THEORETICAL

THEORETICAL

, from the actual supply power, P

SUP

, at

(19)

The maximum efficiency of the TPA2005D1 with a 3.6-V supply and an 8- Ω load is 86% from Equation 22 . Using

Equation 21 with the efficiency at maximum power (84%), we see that there is an additional 17 mW dissipated in

the speaker. The added power dissipated in the speaker is not an issue as long as it is taken into account when choosing the speaker.

When to Use an Output Filter

Design the TPA2005D1 without an output filter if the traces from amplifier to speaker are short. The TPA2005D1 passed FCC and CE radiated emissions with no shielding and with speaker trace wires 100 mm long or less. Wireless handsets and PDAs are great applications for class-D without a filter.

A ferrite bead filter often can be used if the design is failing radiated emissions without an LC filter, and the frequency-sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies.

Use an LC output filter if there are low-frequency (< 1 MHz) EMI-sensitive circuits and/or there are long leads from amplifier to speaker.

Figure 36 and Figure 37 show typical ferrite bead and LC output filters.

(20)

(21)

(22)

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1 nF

Ferrite

Chip Bead

OUTP

OUTN

Ferrite

Chip Bead

1 nF

1 µF

33 µH

OUTP

OUTN

Figure 36. Typical Ferrite Chip Bead Filter (Chip bead example: NEC/Tokin: N2012ZPS121)

TPA2005D1-Q1

SLOS474 – AUGUST 2005

Figure 37. Typical LC Output Filter, Cut-Off Frequency of 27 kHz

PACKAGE OPTION ADDENDUM

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18-Apr-2006

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPA2005D1DRBQ1 ACTIVE SON DRB 8 3000 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-2-260C-1 YEAR

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

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TEXAS INSTRUMENTS TPA2005D1-Q1 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

DESCRIPTION

APPLICATION CIRCUIT

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

DISSIPATION RATINGS

ELECTRICAL CHARACTERISTICS

OPERATING CHARACTERISTICS

PIN ASSIGNMENTS

TYPICAL CHARACTERISTICS

Table of Graphs

TEST SET-UP FOR GRAPHS

APPLICATION INFORMATION

FULLY DIFFERENTIAL AMPLIFIER

Advantages of Fully Differential Amplifiers

COMPONENT SELECTION

SUMMING INPUT SIGNALS WITH THE TPA2005D1

Summing Two Differential Input Signals

Summing a Differential Input Signal and a Single-Ended Input Signal

Summing Two Single-Ended Input Signals

EFFICIENCY AND THERMAL INFORMATION

BOARD LAYOUT

Component Location

Trace Width

8-Pin QFN (DRB) Layout

ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1

Effect on Audio

Traditional Class-D Modulation Scheme

TPA2005D1 Modulation Scheme

Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme

Effects of Applying a Square Wave Into a Speaker

When to Use an Output Filter