TPS77701, TPS77715, TPS77718, TPS77725, TPS77733 WITH RESET OUTPUT
TPS77801, TPS77815, TPS77818, TPS77825, TPS77833 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 750-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS230A – SEPTEMBER 1999 – REVISED SEPTEMBER 1999
D
Open Drain Power-On Reset With 200-ms
Delay (TPS777xx)
D
Open Drain Power Good (TPS778xx)
D
750-mA Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V , 3.3-V Fixed
Output and Adjustable Versions
D
Dropout Voltage to 260 mV (Typ) at 750 mA
(TPS77x33)
D
Ultra Low 85 µA Typical Quiescent Current
D
Fast Transient Response
D
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
D
8-Pin SOIC and 20-Pin TSSOP PowerPAD
(PWP) Package
D
Thermal Shutdown Protection
description
TPS777xx and TPS778xx are designed to have a
fast transient response and be stable with a 10-µF
low ESR capacitors. This combination provides
high performance at a reasonable cost.
PWP PACKAGE
(TOP VIEW)
NC
EN
IN
IN
NC
EN
IN
IN
1
2
3
4
5
6
7
8
9
10
D PACKAGE
(TOP VIEW)
1
2
3
4
GND/HSINK
GND/HSINK
GND
GND/HSINK
GND/HSINK
NC – No internal connection
GND
20
GND/HSINK
19
GND/HSINK
18
NC
17
NC
16
RESET
15
FB/NC
14
OUT
13
OUT
12
GND/HSINK
11
GND/HSINK
RESET
8
FB/NC
7
OUT
6
5
OUT
/PG
/PG
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
10
2
10
1
10
0
10
– Dropout Voltage – mV
DO
V
–1
10
CO = 10 µF
–2
10
–40020120
–6040 6080 100
–20140
TA – Free-Air Temperature – °C
IO = 750 mA
IO = 10 mA
IO = 0
LOAD TRANSIENT RESPONSE
CO = 2x47 µF
ESR = 1/2x100 mΩ
50
VO = 3.3 V
VI = 4.3 V
0
– Change in∆
O
V
–50
Output Voltage – mV
1000
500
0
O
I – Output Current – mA
0
TPS77x33
60402080 100140120160 180 200
t – Time – µs
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
TPS77701, TPS77715, TPS77718, TPS77725, TPS77733 WITH RESET OUTPUT
J
40 C to 125 C
TPS77801, TPS77815, TPS77818, TPS77825, TPS77833 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 750-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS230A – SEPTEMBER 1999 – REVISED SEPTEMBER 1999
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 260 mV
at an output current of 750 mA for the TPS77x33) and is directly proportional to the output current. Additionally ,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 85 µA over the full range of output current, 0 mA to 750 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems. This LDO family
also features a sleep mode; applying a TTL high signal to EN
quiescent current to 1 µA at TJ = 25°C.
The RESET output of the TPS777xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS777xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
Power good (PG) of the TPS778xx is an active high output, which can be used to implement a power-on reset
or a low-battery indicator.
The TPS777xx and TPS778xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an
adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77701 option and 1.2 V to 5.5 V for
TPS77801 option). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature
ranges. The TPS777xx and TPS778xx families are available in 8 pin SOIC and 20 pin PWP packages.
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
T
–
°
The TPS77x01 is programmable using an external resistor divider (see application information). The D and PWP
packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77701DR).
°
(V)
TYP
3.3TPS77733PWP TPS77833PWPTPS77733DTPS77833D
2.5TPS77725PWP TPS77825PWPTPS77725DTPS77825D
1.8TPS77718PWP TPS77818PWPTPS77718DTPS77818D
1.5TPS77715PWP TPS77815PWPTPS77715DTPS77815D
Adjustable
1.5 V to 5.5 V
Adjustable
1.2 V to 5.5 V
TPS77701PWP—TPS77701D—
TSSOP
(PWP)
—TPS77801PWP—TPS77801D
(enable) shuts down the regulator, reducing the
PACKAGED DEVICES
SOIC
(D)
2
V
I
0.1 µF
†
See application information section for capacitor selection details.
6
7
5
IN
IN
EN
RESET/
GND
3
PG
OUT
OUT
16
14
13
+
RESET
C
10 µF
/PG
V
O
†
O
Figure 1. Typical Application Configuration for Fixed Output Options
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS77701, TPS77715, TPS77718, TPS77725, TPS77733 WITH RESET OUTPUT
TPS77801, TPS77815, TPS77818, TPS77825, TPS77833 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 750-mA LOW-DROPOUT VOLTAGE REGULATORS
functional block diagram—adjustable version
IN
EN
_
SLVS230A – SEPTEMBER 1999 – REVISED SEPTEMBER 1999
PG or RESET
+
V
= 1.1834 V
ref
+
_
GND
200 ms Delay
(for RESET
Option)
functional block diagram—fixed-voltage version
IN
EN
_
+
OUT
R1
FB/NC
R2
External to the device
PG or RESET
OUT
V
= 1.1834 V
ref
+
_
GND
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
200 ms Delay
(for RESET
Option)
R1
R2
3
TPS77701, TPS77715, TPS77718, TPS77725, TPS77733 WITH RESET OUTPUT
I/O
DESCRIPTION
I/O
DESCRIPTION
I/O
DESCRIPTION
I/O
DESCRIPTION
TPS77801, TPS77815, TPS77818, TPS77825, TPS77833 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 750-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS230A – SEPTEMBER 1999 – REVISED SEPTEMBER 1999
Terminal Functions – SOIC Package (TPS777xx)
TERMINAL
NAMENO.
EN2IEnable input
FB/NC7IFeedback input voltage for adjustable device (no connect for fixed options)
GND1Regulator ground
IN3, 4IInput voltage
OUT5, 6ORegulated output voltage
RESET8ORESET output
Terminal Functions – TSSOP Package (TPS777xx)
TERMINAL
NAMENO.
EN5IEnable input
FB/NC15IFeedback input voltage for adjustable device (no connect for fixed options)
GND3Regulator ground
GND/HSINK1, 2, 9, 10, 11,
EN2IEnable input
FB/NC7IFeedback input voltage for adjustable device (no connect for fixed options)
GND1Regulator ground
IN3, 4IInput voltage
OUT5, 6ORegulated output voltage
PG8OPG output
Terminal Functions – TSSOP Package (TPS778xx)
TERMINAL
NAMENO.
EN5IEnable input
FB/NC15IFeedback input voltage for adjustable device (no connect for fixed options)
GND3Regulator ground
GND/HSINK1, 2, 9, 10, 11,
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
All voltage values are with respect to network terminal ground.
PACKAGE
PACKAGE
#
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in2).
||
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer
to TI technical brief SLMA002.
NOTE 2: Minimum IN operating voltage is 2.7 V or V
+ 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted)
O(typ)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
1.5 V ≤ VO ≤ 5.5 V, TJ = 25°CV
1.5 V ≤ VO ≤ 5.5 V, TJ = –40°C to 125°C0.98V
1.2 V ≤ VO ≤ 5.5 V, TJ = 25°CV
1.2 V ≤ VO ≤ 5.5 V, TJ = –40°C to 125°C0.98V
TJ = 25°C,2.7 V < VIN < 10 V1.5
TJ = –40°C to 125°C, 2.7 V < VIN < 10 V1.4701.530
TJ = 25°C,2.8 V < VIN < 10 V1.8
TJ = –40°C to 125°C, 2.8 V < VIN < 10 V1.7641.836
TJ = 25°C,3.5 V < VIN < 10 V2.5
TJ = –40°C to 125°C, 3.5 V < VIN < 10 V2.4502.550
TJ = 25°C,4.3 V < VIN < 10 V3.3
TJ = –40°C to 125°C, 4.3 V < VIN < 10 V3.2343.366
10 µA < IO < 750 mA, TJ = 25°C85
IO = 750 mA,TJ = –40°C to 125°C125
O
)
Minimum input voltage for valid RESET I
Trip threshold voltageVO decreasing9298%V
Hysteresis voltageMeasured at V
Output low voltageVI = 2.7 V, I
Leakage currentV
RESET time-out delay200ms
Minimum input voltage for valid PGI
Trip threshold voltageVO decreasing9298%V
Hysteresis voltageMeasured at V
Output low voltageVI = 2.7 V, I
Leakage currentV
VO + 1 V < VI ≤ 10 V, TJ = 25°C0.01%/V
BW = 300 Hz to 50 kHz,
CO = 10 µF, TJ = 25°C
EN = V
I,
EN = V
I,
f = 1 KHz, CO = 10 µF,
TJ = 25°C
O(RESET)
(RESET)
O(PG)
(PG)
+ 1 V, whichever is greater. Maximum IN voltage 10V.
O(typ)
= 300µA1.1V
O
= 5 V1µA
= 300µA1.1V
O
= 5 V1µA
TJ = 25°C,
2.7 V < VI < 10 V
TJ = –40°C to 125°C
2.7 V < VI < 10 V
O(RESET)
O(PG)
= 1mA0.150.4V
= 1mA0.150.4V
O
O
O
O
190µVrms
1µA
60dB
0.5%V
0.5%V
1.02V
1.02V
O
O
µ
10µA
O
O
O
O
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
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