TLV700xx
GND
EN
IN OUT
V
IN
V
OUT
On
Off
C
IN
C
OUT
1 F
Ceramic
m
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
TLV700xx-Q1 300-mA, Low-IQ, Low-Dropout Regulator
1 Features
1
• Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
• 2% Accuracy
• Low IQ: 35 μ A
• Fixed-Output Voltage Combinations Possible from
1.2 V to 4.8 V
• High PSRR: 68 dB at 1 kHz
• Stable With Effective Capacitance of 0.1 μ F
(1)
• Thermal Shutdown and Overcurrent Protection
(1)
See the Input and Output Capacitor Requirements .
2 Applications
• MP3 Players
• ZigBee®Networks
• Bluetooth®Devices
• Li-Ion Operated Handheld Products
3 Description
The TLV700xx-Q1 series of low-dropout (LDO) linear
regulators are low quiescent current devices with
excellent line and load transient performance. These
LDOs are designed for power-sensitive applications.
A precision bandgap and error amplifier provides
overall 2% accuracy. Low output noise, high powersupply rejection ratio (PSRR), and low-dropout
voltage make this series of devices ideal for a wide
selection of battery-operated handheld equipment. All
device versions have thermal shutdown and current
limit for safety.
Furthermore, these devices are stable with an
effective output capacitance of only 0.1 μ F. This
feature enables the use of cost-effective capacitors
that have higher bias voltages and temperature
derating. The devices regulate to specified accuracy
with no output load.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
TLV70018-Q1
TLV70012-Q1
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SOT (5) 2.90 mm × 1.60 mm
(1)
Typical Application
(Fixed-Voltage Version)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
www.ti.com
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagrams ..................................... 10
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 11
8 Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application .................................................. 12
9 Power Supply Recommendations...................... 13
10 Layout................................................................... 14
10.1 Layout Guidelines ................................................. 14
10.2 Layout Example .................................................... 14
10.3 Thermal Considerations........................................ 14
10.4 Power Dissipation ................................................. 14
11 Device and Documentation Support ................. 16
11.1 Device Support...................................................... 16
11.2 Documentation Support ........................................ 16
11.3 Related Links ........................................................ 16
11.4 Community Resources.......................................... 16
11.5 Trademarks........................................................... 16
11.6 Electrostatic Discharge Caution............................ 16
11.7 Glossary................................................................ 16
12 Mechanical, Packaging, and Orderable
Information........................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (March 2012) to Revision B Page
• Added ESD Ratings table, Recommended Operating Conditions table, Thermal Information table, Detailed
Description section, Application and Implementation section, Application and Implementation section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section...... 1
• Deleted the Dissipation Ratings table..................................................................................................................................... 4
2
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Product Folder Links: TLV70018-Q1 TLV70012-Q1
OUT
NC
IN
GND
EN
1
2
3
5
4
TLV70018-Q1,TLV70012-Q1
www.ti.com
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
5 Pin Configuration and Functions
DDC Package
5-Pin SOT
Top View
Pin Functions
PIN
NO. NAME
1 IN
Input pin. A small 1-μ F ceramic capacitor is recommended from this pin to ground to assure stability and good
transient performance.
(1)
2 GND Ground pin
3 EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown
mode and reduces operating current to 1 μ A, nominal.
4 NC No connection. This pin can be tied to ground to improve thermal dissipation.
5 OUT Regulated output voltage pin. A small 1-μ F ceramic capacitor is needed from this pin to ground to assure stability.
(1) See Input and Output Capacitor Requirements section for more details.
DESCRIPTION
(1)
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3
Product Folder Links: TLV70018-Q1 TLV70012-Q1
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range, unless otherwise noted.
(2)
Voltage
Current (source) OUT Internally Limited
Output short-circuit duration Indefinite
Operating virtual junction, T
Storage temperature, T
J
stg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network ground terminal.
6.2 ESD Ratings
V
(ESD)
Electrostatic discharge
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
Human-body model (HBM), per AEC Q100-002
Charged-device model (CDM), per AEC Q100-011 750
(1)
MIN MAX UNIT
IN –0.3 6.0 V
EN –0.3 6.0 V
OUT –0.3 6.0 V
–55 150 °C
–55 150 °C
VALUE UNIT
(1)
2000
V
6.3 Recommended Operating Conditions
over operating free-air temperature range, unless otherwise noted.
MIN MAX UNIT
IN 2 5.5
V
I
T
J
Input voltage
V EN 0 5.5
OUT 0 5.5
Current output 0 300 mA
Operating junction temperature –40 150 °C
6.4 Thermal Information
TLV70018-Q1 TLV70012-Q1
THERMAL METRIC
R
θ JA
R
θ JC(top)
R
θJB
ψ
JT
ψ
JB
R
θ JC(bot)
Junction-to-ambient thermal resistance 227.9 262.8 °C/W
Junction-to-case (top) thermal resistance 70.1 68.2 °C/W
Junction-to-board thermal resistance 67.4 81.6 °C/W
Junction-to-top characterization parameter 14.5 1.1 °C/W
Junction-to-board characterization parameter 67.2 80.9 °C/W
Junction-to-case (bottom) thermal resistance NA NA °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953 .
(1)
UNIT DDC (SOTC23) DDC (SOT)
5 PINS 5 PINS
4
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TLV70018-Q1,TLV70012-Q1
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SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
6.5 Electrical Characteristics
At VIN= V
OUT(TYP)
unless otherwise noted. Typical values are at TA= 25°C, unless otherwise noted.
V
IN
V
OUT
Δ VO/ Δ V
IN
Δ VO/ Δ I
OUT
I
CL
I
GND
I
SHDN
PSRR Power-supply rejection ratio VIN= 2.3 V, V
V
N
t
STR
V
EN(HI)
V
EN(LO)
I
EN
UVLO Undervoltage lockout VINrising 1.9 V
T
SD
T
A
(1) Startup time = time from EN assertion to 0.98 × V
+ 0.5 V or 2 V (whichever is greater); I
= 10 mA, VEN= 0.9 V, C
OUT
= 1.0 μ F, and TA= –40°C to 125°C,
OUT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 2 5.5 V
DC output accuracy –40°C ≤ TA≤ 125°C –2% 0.5% 2%
Line regulation V
Load regulation
Output current limit V
Ground pin current
OUT(NOM)
0 mA ≤ I
0 mA ≤ I
OUT
I
OUT
I
OUT
+ 0.5 V ≤ VIN≤ 5.5 V, I
≤ 300 mA, TLV70018-Q1 1 15
OUT
≤ 300 mA, TLV70012-Q1 1 20
OUT
= 0.9 × V
OUT(NOM)
= 10 mA 1 5 mV
OUT
320 500 860 mA
= 0 mA 35 55 μ A
= 300 mA, VIN= V
+ 0.5 V 370 μ A
OUT
VEN≤ 0.4 V, VIN= 2.0 V 400 nA
Ground pin current (shutdown)
VEN≤ 0.4 V, 2.0 V ≤ VIN≤ 4.5 V, TA= –40°C to 85°C 1 2 μ A
VEN≤ 0.4 V, 2.0 V ≤ VIN≤ 4.5 V, TA= 85°C to 125°C 1 2.5 μ A
= 1.8 V, I
OUT
Output noise voltage
Startup time
(1)
BW = 100 Hz to 100 kHz,
VIN= 2.3 V, V
C
= 1.0 μ F, I
OUT
= 1.8 V, I
OUT
= 300 mA 100 μ s
OUT
Enable pin high (enabled) 0.9 V
= 10 mA, f = 1 kHz 68 dB
OUT
OUT
= 10 mA
48 μ V
IN
Enable pin low (disabled) 0 0.4 V
Enable pin current VIN= VEN= 5.5 V 0.04 μ A
Thermal shutdown temperature
Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145 °C
Operating temperature –40 125 °C
OUT(NOM)
.
mV
RMS
V
Product Folder Links: TLV70018-Q1 TLV70012-Q1
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5
0 100 150 300
I (mA)
OUT
300
250
200
150
100
50
0
V (mV)
DO
50 200
+125 C°
+85 C°
+25 C°
-40 C°
V =4.8V
OUT
250
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V (V)
OUT
-40 -25 -10 5 20 35 50 65 80 95 110
Temperature( C)°
125
10mA
150mA
200mA
V =1.8V
OUT
0 100 150 300
I (mA)
OUT
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V (V)
OUT
50 200
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
OUT
250
350
300
250
200
150
100
50
0
V (mV)
DO
2.25 2.75 3.25 3.75 4.25
4.75
V (V)
+125 C°
+85 C°
+25 C°
–40 C°
I = 300 mA
OUT
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V
OUT
(V)
2.1 2.6 3.1 3.6 4.1 4.6 5.1
V (V)
IN
5.6
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
I =10mA
OUT
OUT
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
V
OUT
(V)
2.3 2.7 3.1 3.5 3.9 4.3 4.7
V (V)
IN
5.5
5.1
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
I =300mA
OUT
OUT
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
6.6 Typical Characteristics
Over operating temperature range (TJ= –40°C to 125°C), VIN= V
VEN= VIN, C
= 1.0 μ F, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
V
= 1.8 V I
OUT
OUT
= 10 mA
Figure 1. Line Regulation 10 mA
OUT(TYP)
+ 0.5 V or 2 V, whichever is greater; I
V
= 1.8 V I
OUT
Figure 2. Line Regulation 300 mA
OUT
= 300 mA
OUT
www.ti.com
= 10 mA,
V
= 1.8 V
OUT
Figure 3. Load Regulation
6
V
= 4.8 V
OUT
Figure 5. Dropout Voltage vs Output Current
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I
= 300 mA
OUT
Figure 4. Dropout Voltage vs Input Voltage
V
= 1.8 V
OUT
Figure 6. Output Voltage vs Temperature
Product Folder Links: TLV70018-Q1 TLV70012-Q1
100
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
10 100
1k 10k 100k 1M 10M
Frequency(Hz)
I =150mA
OUT
I =10mA
OUT
V V =0.5V
IN OUT
-
700
600
500
400
300
200
100
0
I
LIM
(mA)
2.3 2.7 3.1 3.5 3.9 4.3 4.7
V (V)
IN
5.5
5.1
V =1.8V
OUT
+125 C°
+85 C°
+25 C°
-40 C°
50
45
40
35
30
25
20
15
10
5
0
I ( A)m
GND
-40 -25 -10 5 20 35 50 65 80 95 110
Temperature( C)°
125
V =1.8V
OUT
2.5
2
1.5
1
0.5
0
I
SHDN
( Am )
2.1 2.6 3.1 3.6 4.1 4.6 5.1
V (V)
IN
5.6
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
OUT
50
45
40
35
30
25
20
15
10
5
0
I
GND
( Am )
2.1 2.6 3.1 3.6 4.1 4.6 5.1
V (V)
IN
5.6
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
OUT
450
400
350
300
250
200
150
100
50
0
I
GND
(m A)
0
I (mA)
OUT
300
+125 C°
+85 C°
+25 C°
-40 C°
V =1.8V
OUT
50 150 250
100 200
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Typical Characteristics (continued)
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
Over operating temperature range (TJ= –40°C to 125°C), VIN= V
VEN= VIN, C
= 1.0 μ F, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
V
= 1.8 V
OUT
Figure 7. Ground Pin Current vs Input Voltage
OUT(TYP)
+ 0.5 V or 2 V, whichever is greater; I
V
= 1.8 V
OUT
Figure 8. Ground Pin Current vs Load
OUT
= 10 mA,
V
= 1.8 V
OUT
Figure 9. Ground Pin Current vs Temperature
V
= 1.8 V
OUT
Figure 11. Current Limit vs Input Voltage
VIN– V
Product Folder Links: TLV70018-Q1 TLV70012-Q1
V
= 1.8 V
OUT
Figure 10. Shutdown Current vs Input Voltage
= 0.5 V
OUT
Figure 12. Power-Supply Ripple Rejection vs Frequency
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7
50mA/div
20mV/div
10 s/divm
V
OUT
I
OUT
50mA
0mA
t =t =1 s
R F
m
V
OUT
=1.8V
200 mA/div
100 mV/div
10 s/divm
V
OUT
300 mA
0 mA
t = t = s
R F
m 1
I
OUT
V
OUT
= 1.8 V
100mA/div
50mV/div
10 s/divm
V
OUT
I
OUT
200mA
0mA
t =t =1 s
R F
m
V
OUT
=1.8V
20mA/div
5mV/div
10 s/divm
V
OUT
V
OUT
=1.8V
I
OUT
10mA
0mA
t =t =1 s
R F
m
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8
InputVoltage(V)
80
70
60
50
40
30
20
10
0
PSRR(dB)
10kHz
100kHz
1kHz
V =1.8V
OUT
10
1
0.1
0.01
0.001
OutputSpectralNoiseDensity( V/ )m ÖHz
10 100
1k 10k 100k 1M 10M
Frequency(Hz)
V =1.8V
OUT
I =10mA
C =C =1 F
OUT
IN OUT
m
TLV70018-Q1,TLV70012-Q1
SLVSB67B –NOVEMBER 2011–REVISED JANUARY 2016
Typical Characteristics (continued)
www.ti.com
Over operating temperature range (TJ= –40°C to 125°C), VIN= V
VEN= VIN, C
Figure 13. Power-Supply Ripple Rejection vs Input Voltage
= 1.0 μ F, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
V
= 1.8 V
OUT
OUT(TYP)
+ 0.5 V or 2 V, whichever is greater; I
V
= 1.8 V I
OUT
= 10 mA C
OUT
CIN= 1 µF
Figure 14. Output Spectral Noise Density vs Frequency
OUT
= 10 mA,
= 1 µF
OUT
V
= 1.8 V
OUT
Figure 15. Load Transient Response
V
= 1.8 V
8
OUT
Figure 17. Load Transient Response
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V
= 1.8 V
OUT
V
= 1.8 V
OUT
Product Folder Links: TLV70018-Q1 TLV70012-Q1
Figure 16. Load Transient Response
Figure 18. Load Transient Response