Texas Instruments TLV320AIC23PW, TLV320AIC23IPW, TLV320AIC23IGQE, TLV320AIC23GQE Datasheet

TLV320AIC23

Stereo Audio CODEC,
8Ć to 96ĆkHz, With Integrated Headphone Amplifier

Data Manual

July 2001 Digital Audio Products

SLWS106C

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Contents

Section Title Page

1 Introduction 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 Features 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Functional Block Diagram 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Terminal Assignments 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4 Ordering Information 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5 Terminal Functions 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Specifications 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Absolute Maximum Ratings Over Operating Free-Air

Temperature Range 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Recommended Operating Conditions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Electrical Characteristics Over Recommended Operating

Conditions 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.1 ADC 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.2 DAC 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.3 Analog Line Input to Line Output 2–3. . . . . . . . . . . . . . . . . . . . . .

2.3.4 Stereo Headphone Output 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.5 Analog Reference Levels 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.6 Digital I/O 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.7 Supply Current 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Digital-Interface Timing 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4.1 Audio Interface (Master Mode) 2–5. . . . . . . . . . . . . . . . . . . . . . .

2.4.2 Audio Interface (Slave-Mode) 2–6. . . . . . . . . . . . . . . . . . . . . . . .

2.4.3 Three-Wire Control Interface 2–7. . . . . . . . . . . . . . . . . . . . . . . . .

2.4.4 Two-Wire Control Interface 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . .

3 How to Use the AIC23 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Control Interfaces 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.1 SPI 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.2 I2C 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.3 Register Map 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Analog Interface 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.1 Line Inputs 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.2 Microphone Input 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.3 Line Outputs 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.4 Headphone Output 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.5 Analog Bypass Mode 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.6 Sidetone Insertion 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

iii

3.3 Digital Audio Interface 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.1 Digital Audio-Interface Modes 3–7. . . . . . . . . . . . . . . . . . . . . . . .

3.3.2 Audio Sampling Rates 3–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.3 Digital Filter Characteristics 3–11. . . . . . . . . . . . . . . . . . . . . . . . . .

A Mechanical Data A–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

iv

List of Illustrations

Figure Title Page

2–1 System-Clock Timing Requirements 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2–2 Master-Mode Timing Requirements 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2–3 Slave-Mode Timing Requirements 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2–4 Three-Wire Control Interface Timing Requirements 2–7. . . . . . . . . . . . . . . . . . . .

2–5 Two-Wire Control Interface Timing Requirements 2–7. . . . . . . . . . . . . . . . . . . . .

3–1 SPI Timing 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–2 2-Wire I2C Compatible Timing 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–3 Analog Line Input Circuit 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–4 Microphone Input Circuit 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–5 Right-Justified Mode Timing 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–6 Left-Justified Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2

3–7I

3–8 DSP Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3–9 Digital De-Emphasis Filter Response – 441 kHz Sampling 3–12. . . . . . . . . . . . .

3–10 Digital De-Emphasis Filter Response – 48 kHz Sampling 3–12. . . . . . . . . . . . .

3–11 ADC Digital Filter Response I: TI DSP and Normal Modes

3–12 ADC Digital Filter Ripple I: TI DSP and Normal Modes

3–13 ADC Digital Filter Response II: TI DSP Mode Only 3–14. . . . . . . . . . . . . . . . . . .

3–14 ADC Digital Filter Ripple II: TI DSP Mode Only 3–14. . . . . . . . . . . . . . . . . . . . . .

3–15 ADC Digital Filter Response III: TI DSP and Normal Modes

3–16 ADC Digital Filter Ripple III: TI DSP and Normal Modes 3–15. . . . . . . . . . . . . . .

3–17 ADC Digital Filter Response IV: TI DSP Mode Only 3–16. . . . . . . . . . . . . . . . . .

3–18 ADC Digital Filter Ripple IV: TI DSP Mode Only 3–16. . . . . . . . . . . . . . . . . . . . . .

3–19 DAC Digital Filter Response I: TI DSP and Normal Modes 3–17. . . . . . . . . . . .

3–20 DAC Digital Filter Ripple I: TI DSP and Normal Modes 3–17. . . . . . . . . . . . . . . .

3–21 DAC Digital Filter Response II: TI DSP Mode Only 3–18. . . . . . . . . . . . . . . . . . .

3–22 DAC Digital Filter Ripple II: TI DSP Mode Only 3–18. . . . . . . . . . . . . . . . . . . . . .

3–23 DAC Digital Filter Response III: TI DSP and Normal Modes 3–19. . . . . . . . . . .

3–24 DAC Digital Filter Ripple III: TI DSP and Normal Modes 3–19. . . . . . . . . . . . . . .

3–25 DAC Digital Filter Response IV: TI DSP Mode Only 3–20. . . . . . . . . . . . . . . . . .

3–26 DAC Digital Filter Ripple IV: TI DSP Mode Only 3–20. . . . . . . . . . . . . . . . . . . . . .

S Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(Group Delay = 12 Output Samples) 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(Group Delay = 20 Output Samples) 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(Group Delay = 3 Output Samples) 3–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

v

vi

1 Introduction

The TLV320AIC23 is a high-performance stereo audio codec with highly integrated analog functionality. The
analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23 use multibit
sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20,
24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features
third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz,
enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features
a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling
high-quality digital audio-playback capability, while consuming less than 23 mW during playback only. The
TL V320AIC23 is the ideal analog input/output (I/O) choice for portable digital audio-player and recorder applications,
such as MP3 digital audio players.

Integrated analog features consist of stereo-line inputs with an analog bypass path, a stereo headphone amplifier,
with analog volume control and mute, and a complete electret-microphone-capsule biasing and buffering solution.
The headphone amplifier is capable of delivering 30 mW per channel into 32 Ω. The analog bypass path allows use
of the stereo-line inputs and the headphone amplifier with analog volume control, while completely bypassing the
codec, thus enabling further design flexibility, such as integrated FM tuners. A microphone bias-voltage output
provides a low-noise current source for electret-capsule biasing. The AIC23 has an integrated adjustable microphone
amplifier (gain adjustable from 1 to 5) and a programmable gain microphone amplifier (0 dB or 20 dB). The
microphone signal can be mixed with the output signals if a sidetone is required.

While the TL V320AIC23 supports the industry-standard oversampling rates of 256 f
rates of 250 f

and 272 fs are provided, which optimize interface considerations in designs using TI C54x digital signal

s

processors (DSPs) and universal serial bus (USB) data interfaces. A single 12-MHz crystal can supply clocking to
the DSP, USB, and codec. The TLV320AIC23 features an internal oscillator that, when connected to a 12-MHz
external crystal, provides a system clock to the DSP and other peripherals at either 12 MHz or 6 MHz, using an internal
clock buffer and selectable divider. Audio sample rates of 48 kHz and compact-disc (CD) standard 44.1 kHz are
supported directly from a 12-MHz master clock with 250 f

and 272 fs oversampling rates.

s

Low power consumption and flexible power management allow selective shutdown of codec functions, thus
extending battery life in portable applications. This design solution, coupled with the industry’s smallest package, the
TI proprietary MicroStar Junior using only 25 mm

2

of board area, makes powerful portable stereo audio designs

easily realizable in a cost-effective, space-saving total analog I/O solution: the TLV320AIC23.

and 384 fs, unique oversampling

s

1.1 Features

• High-Performance Stereo Codec

– 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)
– 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
– 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages
– 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages
– 8-kHz – 96-kHz Sampling-Frequency Support

• Software Control Via TI McBSP-Compatible Multiprotocol Serial Port

– I2C-Compatible and SPI-Compatible Serial-Port Protocols
– Glueless Interface to TI McBSPs

• Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface

2

S-Compatible Interface Requiring Only One McBSP for both ADC and DAC

– I
– Standard I
– 16/20/24/32-Bit Word Lengths

MicroStar Junior is a trademark of Texas Instruments.

2

S, MSB, or LSB Justified-Data Transfers

1–1

– Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode
– Industry-Standard Master/Slave Support Provided Also (256/384 f

), Normal mode

s

– Glueless Interface to TI McBSPs

• Integrated Total Electret-Microphone Biasing and Buffering Solution

– Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules
– Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5
– Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB

• Stereo-Line Inputs

– Integrated Programmable Gain Amplifier
– Analog Bypass Path of Codec

• ADC Multiplexed Input for Stereo-Line Inputs and Microphone

• Stereo-Line Outputs

– Analog Stereo Mixer for DAC and Analog Bypass Path

• Analog Volume Control With Mute

• Highly Efficient Linear Headphone Amplifier
– 30 mW into 32 Ω From a 3.3-V Analog Supply Voltage

• Flexible Power Management Under Total Software Control

– 23-mW Power Consumption During Playback Mode
– Standby Power Consumption <150 µW
– Power-Down Power Consumption <15 µW

• Industry’s Smallest Package: 32-Pin TI Proprietary MicroStar Junior

2

Total Board Area

– 25 mm
– 28-Pin TSSOP Also Is Available (62 mm

2

Total Board Area)

• Ideally Suitable for Portable Solid-State Audio Players and Recorders

1–2

1.2 Functional Block Diagram

AVDD

VMID

AGND

MICBIAS

RLINEIN

MICIN

LLINEIN

HPVDD
HPGND

RHPOUT

50 kΩ

50 kΩ

12 to –34.5 dB,

10 kΩ

VMID

12 to –34 dB,

Headphone

Driver

1.0X

1.0X

1.0X

1.5X

1.5 dB Steps

50 kΩ

1.5 dB Steps
6 to –73 dB,

1 dB Steps

VADC

VDAC

VMID

Bypass
Mute

Line

Mute

Line

Mute

Bypass
Mute

Mute,

0 dB, 20 dB

2:1

MUX

Σ

DSPcodec

TLV320AIC23

2:1

MUX

VADC

Side Tone
Mute

Σ–∆

ADC

Σ–∆

ADC

Σ–∆

DAC

Control

Interface

Digital
Filters

CS
SDIN
SCLK
MODE

DVDD
BVDD

DGND

ROUT

LOUT

LHPOUT

Headphone

Driver

XTI/MCLK

XTO

CLKOUT

NOTE: MCLK, BCLK, and SCLK are all asynchronous to each other.

6 to –73 dB,

1 dB Steps

(1x, 1/2x)

OSC

Σ

CLKIN

Divider

CLKOUT

Divider

(1x, 1/2x)

VDAC

Σ–∆

DAC

Digital

Audio

Interface

LRCIN
DIN
LRCOUT
DOUT

BCLK

1–3

1.3 Terminal Assignments

GQE PACKAGE

(TOP VIEW)

NC

DIN

BCLK

CLKOUT

BVDD

DGND

DVDD

XTO

25 24 23 22 21 20 19 18 17

NC

LRCIN

DOUT

LRCOUT

HPVDD

LHPOUT

RHPOUT

HPGND

26
27
28
29
30
31
32

123456789

NC

LOUT

NC – No internal connection

BVDD

CLKOUT

BCLK

DIN

LRCIN

DOUT

LRCOUT

HPVDD

LHPOUT

RHPOUT

HPGND

LOUT

ROUT

AVDD

1
2
3
4
5
6
7
8
9
10
11
12
13
14

ROUT

AVDD

PW PACKAGE

(TOP VIEW)

VMID

AGND

28
27
26
25
24
23
22
21
20
19
18
17
16
15

MICIN

MICBIAS

DGND
DVDD
XTO
XTI/MCLK
SCLK
SDIN
MODE
CS
LLINEIN
RLINEIN
MICIN
MICBIAS
VMID
AGND

NC

16
15
14
13
12
11
10

XTI/MCLK
SCLK

SDIN
MODE
CS
LLINEIN
RLINEIN

1.4 Ordering Information

T

A

–10°C to 70°C TLV320AIC23GQE TLV320AIC23PW
–40°C to 85°C TLV320AIC23IGQE TLV320AIC23IPW

1–4

PACKAGE

32-Pin

MicroStar Junior GQE

28-Pin

TSSOP PW

1.5 Terminal Functions

NAME

I/O

TERMINAL

NO.

GQE PW

AGND 5 15 Analog supply return
AVDD 4 14 Analog supply input. Voltage level is 3.3 V nominal.
BCLK 23 3 I/O I2S serial-bit clock. In audio master mode, the AIC23 generates this signal and sends it to the DSP. In

BVDD 21 1 Buffer supply input. V oltage range is from 2.7 V to 3.6 V.
CLKOUT 22 2 O Clock output. This is a buffered version of the XTI input and is available in 1X or 1/2X frequencies of XTI.

CS 12 21 I Control port input latch/address select. For SPI control mode this input acts as the data latch control. For

DIN 24 4 I I2S format serial data input to the sigma-delta stereo DAC
DGND 20 28 Digital supply return
DOUT 27 6 O I2S format serial data output from the sigma-delta stereo ADC
DVDD 19 27 Digital supply input. Voltage range is 3.3 V nominal.
HPGND 32 11 Analog headphone amplifier supply return
HPVDD 29 8 Analog headphone amplifier supply input. Voltage level is 3.3 V nominal.
LHPOUT 30 9 O Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V

LLINEIN 11 20 I Left stereo-line input channel. Nominal 0-dB input level is 1 V

LOUT 2 12 O Left stereo mixer-channel line output. Nominal output level is 1.0 V
LRCIN 26 5 I/O I2S DAC-word clock signal. In audio master mode, the AIC23 generates this framing signal and sends it

LRCOUT 28 7 I/O I2S ADC-word clock signal. In audio master mode, the AIC23 generates this framing signal and sends it

MICBIAS 7 17 O Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage level is 3/4

MICIN 8 18 I Buffered amplifier input suitable for use with electret-microphone capsules. Without external resistors a

MODE 13 22 I Serial-interface-mode input. See Section 3.1 for details.
NC 1, 9

17, 25

RHPOUT 31 10 O Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V

RLINEIN 10 19 I Right stereo-line input channel. Nominal 0-dB input level is 1 V

ROUT 3 13 O Right stereo mixer-channel line output. Nominal output level is 1.0 V
SCLK 15 24 I Control-port serial-data clock. For SPI and I2C control modes this is the serial-clock input. See Section

SDIN 14 23 I Control-port serial-data input. For SPI and I2C control modes this is the serial-data input and also is used

VMID 6 16 I Midrail voltage decoupling input. 10-µF and 0.1-µF capacitors should be connected in parallel to this

XTI/MCLK 16 25 I Crystal or external-clock input. Used for derivation of all internal clocks on the AIC23.
XTO 18 26 O Crystal output. Connect to external crystal for applications where the AIC23 is the audio timing master.

audio slave mode, the signal is generated by the DSP.

Bit 07 in the sample rate control register controls frequency selection.

I2C control mode this input defines the seventh bit in the device address field. See Section 3.1 for details.

dB to 6 dB is provided in 1-dB steps.

in 1.5-dB steps.

to the DSP. In audio slave mode, the signal is generated by the DSP.

to the DSP. In audio slave mode, the signal is generated by the DSP.

AVDD nominal.

default gain of 5 is provided. See Section 2.3.1.2 for details.

Not Used—No internal connection

–73 dB to 6 dB is provided in 1-dB steps.

in 1.5-dB steps.

3.1 for details.

to select the control protocol after reset. See Section 3.1 for details.

terminal for noise filtering. Voltage level is 1/2 AVDD nominal.

Not used in applications where external clock source is used.

DESCRIPTION

RMS

. Gain of –34.5 dB to 12 dB is provided

RMS

.

RMS

RMS

. Gain of –34.5 dB to 12 dB is provided

RMS

.

RMS

. Gain of –73

. Gain of

1–5

1–6

2 Specifications

2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range (unless
otherwise noted)

Supply voltage range, AVDD to AGND, DVDD to DGND, BVDD to DGND, HPVDD to HPGND

(see Note 1) –0.3 V to + 3.63 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog supply return to digital supply return, AGND to DGND –0.3 V to + 3 .63 V. . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, all input signals: Digital –0.3 V to DV

Case temperature for 10 seconds 240°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T
Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: DVDD may not exceed BVDD + 0.3V; BVDD may not exceed AVDD + 0.3V or HPVDD + 0.3.

†

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DD
DD

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Analog –0.3 V to AV

A

–10°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Recommended Operating Conditions

MIN NOM MAX UNIT

Analog supply voltage, A VDD, HPVDD (see Note 2) 2.7 3.3 3.6 V
Digital buffer supply voltage, BVDD (see Note 2) 2.7 3.3 3.6 V
Digital core supply voltage, DVDD (see Note 2) 1.42 1.5 3.6 V
Analog input voltage, full scale – 0dB (AVDD = 3.3 V) 1 V
Stereo-line output load resistance 10 kΩ
Headphone-amplifier output load resistance 0 Ω
CLKOUT digital output load capacitance 20 pF
All other digital output load capacitance 10 pF
Stereo-line output load capacitance 50 pF
XTI master clock Input 18.43 MHz
ADC or DAC conversion rate 96 kHz
Operating free-air temperature, T

NOTE 2: Digital voltage values are with respect to DGND; analog voltage values are with respect to AGND.

A

–10 70 °C

RMS

2–1