Texas Instruments TLV320AIC23B Datasheet

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Data M anua

February 2004 Digital Audio Products

SLWS106H

Contents

Section Title Page

1 Introduction 1−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 Features 1−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Functional Block Diagram 1−3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Terminal Assignments 1−4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4 Ordering Information 1−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5 Terminal Functions 1−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Specifications 2−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature

Range 2−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Recommended Operating Conditions 2−1. . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Electrical Characteristics Over Recommended Operating

Conditions 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.1 ADC 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.2 DAC 2−3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.3 Analog Line Input to Line Output (Bypass) 2−3. . . . . . . . . . . . .

2.3.4 Stereo Headphone Output 2−4. . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.5 Analog Reference Levels 2−4. . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.6 Digital I/O 2−4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.7 Supply Current 2−4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Digital-Interface Timing 2−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4.1 Audio Interface (Master Mode) 2−5. . . . . . . . . . . . . . . . . . . . . . .

2.4.2 Audio Interface (Slave-Mode) 2−6. . . . . . . . . . . . . . . . . . . . . . . .

2.4.3 Three-Wire Control Interface (SDIN) 2−7. . . . . . . . . . . . . . . . . .

2.4.4 Two-Wire Control Interface 2−7. . . . . . . . . . . . . . . . . . . . . . . . . . .

3 How to Use the TLV320AIC23B 3−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Control Interfaces 3−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.1 SPI 3−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.2 2-Wire 3−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1.3 Register Map 3−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Analog Interface 3−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.1 Line Inputs 3−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.2 Microphone Input 3−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.3 Line Outputs 3−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.4 Headphone Output 3−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.5 Analog Bypass Mode 3−7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.6 Sidetone Insertion 3−7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3 Digital Audio Interface 3−7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.1 Digital Audio-Interface Modes 3−7. . . . . . . . . . . . . . . . . . . . . . . .

iii

3.3.2 Audio Sampling Rates 3−9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.3 Digital Filter Characteristics 3−11. . . . . . . . . . . . . . . . . . . . . . . . . .

A Mechanical Data A−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

iv

List of Illustrations

Figure Title Page

2−1 System-Clock Timing Requirements 2−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2−2 Master-Mode Timing Requirements 2−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2−3 Slave-Mode Timing Requirements 2−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2−4 Three-Wire Control Interface Timing Requirements 2−7. . . . . . . . . . . . . . . . . .

2−5 Two-Wire Control Interface Timing Requirements 2−7. . . . . . . . . . . . . . . . . . .

3−1 SPI Timing 3−1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−2 2-Wire Compatible Timing 3−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−3 Analog Line Input Circuit 3−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−4 Microphone Input Circuit 3−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−5 Right-Justified Mode Timing 3−7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−6 Left-Justified Mode Timing 3−8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−7 I2S Mode Timing 3−8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−8 DSP Mode Timing 3−8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−9 Digital De-Emphasis Filter Response − 44.1 kHz Sampling 3−12. . . . . . . . . . .

3−10 Digital De-Emphasis Filter Response − 48 kHz Sampling 3−12. . . . . . . . . . . .

3−11 ADC Digital Filter Response 0: USB Mode

(Group Delay = 12 Output Samples) 3−13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−12 ADC Digital Filter Ripple 0: USB

(Group Delay = 20 Output Samples) 3−13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−13 ADC Digital Filter Response 1: USB Mode Only 3−14. . . . . . . . . . . . . . . . . . . .

3−14 ADC Digital Filter Ripple 1: USB Mode Only 3−14. . . . . . . . . . . . . . . . . . . . . . . .

3−15 ADC Digital Filter Response 2: USB mode and Normal Modes

(Group Delay = 3 Output Samples) 3−15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−16 ADC Digital Filter Ripple 2: USB Mode and Normal Modes 3−15. . . . . . . . . . .

3−17 ADC Digital Filter Response 3: USB Mode Only 3−16. . . . . . . . . . . . . . . . . . . .

3−18 ADC Digital Filter Ripple 3: USB Mode Only 3−16. . . . . . . . . . . . . . . . . . . . . . . .

3−19 DAC Digital Filter Response 0: USB Mode 3−17. . . . . . . . . . . . . . . . . . . . . . . . .

3−20 DAC Digital Filter Ripple 0: USB Mode 3−17. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−21 DAC Digital Filter Response 1: USB Mode Only 3−18. . . . . . . . . . . . . . . . . . . .

3−22 DAC Digital Filter Ripple 1: USB Mode Only 3−18. . . . . . . . . . . . . . . . . . . . . . . .

3−23 DAC Digital Filter Response 2: USB Mode and Normal Modes 3−19. . . . . . . .

3−24 DAC Digital Filter Ripple 2: USB Mode and Normal Modes 3−19. . . . . . . . . . .

3−25 DAC Digital Filter Response 3: USB Mode Only 3−20. . . . . . . . . . . . . . . . . . . .

3−26 DAC Digital Filter Ripple 3: USB Mode Only 3−20. . . . . . . . . . . . . . . . . . . . . . . .

v

vi

1 Introduction

The TLV320AIC23B is a high-performance stereo audio codec with highly integrated analog functionality. The
analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23B use multibit
sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20,
24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features
third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz,
enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features
a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling
high-quality digital audio-playback capability, while consuming less than 23 mW during playback only. The
TLV320AIC23B is the ideal analog input/output (I/O) choice for portable digital audio-player and recorder
applications, such as MP3 digital audio players.

Integrated analog features consist of stereo-line inputs with an analog bypass path, a stereo headphone amplifier,
with analog volume control and mute, and a complete electret-microphone-capsule biasing and buffering solution.
The headphone amplifier is capable of delivering 30 mW per channel into 32 Ω. The analog bypass path allows use
of the stereo-line inputs and the headphone amplifier with analog volume control, while completely bypassing the
codec, thus enabling further design flexibility, such as integrated FM tuners. A microphone bias-voltage output
provides a low-noise current source for electret-capsule biasing. The AIC23B has an integrated adjustable
microphone amplifier (gain adjustable from 1 to 5) and a programmable gain microphone amplifier (0 dB or 20 dB).
The microphone signal can be mixed with the output signals if a sidetone is required.

While the TLV320AIC23B supports the industry-standard oversampling rates of 256 f
oversampling rates of 250 f

and 272 fs are provided, which optimize interface considerations in designs using TI C54x

s

digital signal processors (DSPs) and universal serial bus (USB) data interfaces. A single 12-MHz crystal can supply
clocking to the DSP, USB, and codec. The TLV320AIC23B features an internal oscillator that, when connected to a
12-MHz external crystal, provides a system clock to the DSP and other peripherals at either 12 MHz or 6 MHz, using
an internal clock buffer and selectable divider. Audio sample rates of 48 kHz and compact-disc (CD) standard 44.1
kHz are supported directly from a 12-MHz master clock with 250 f

and 272 fs oversampling rates.

s

Low power consumption and flexible power management allow selective shutdown of codec functions, thus
extending battery life in portable applications. This design solution, coupled with the industry’s smallest package, the
TI proprietary MicroStar Junior using only 25 mm

2

of board area, makes powerful portable stereo audio designs

easily realizable in a cost-effective, space-saving total analog I/O solution: the TLV320AIC23B.

and 384 fs, unique

s

1.1 Features

• High-Performance Stereo Codec

− 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)

− 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)

− 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages

− 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages

− 8-kHz – 96-kHz Sampling-Frequency Support

• Software Control Via TI McBSP-Compatible Multiprotocol Serial Port

− 2-wire-Compatible and SPI-Compatible Serial-Port Protocols

− Glueless Interface to TI McBSPs

• Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface

2

S-Compatible Interface Requiring Only One McBSP for both ADC and DAC

−I

− Standard I

− 16/20/24/32-Bit Word Lengths

MicroStar Junior is a trademark of Texas Instruments.

2

S, MSB, or LSB Justified-Data Transfers

1−1

− Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode

− Industry-Standard Master/Slave Support Provided Also (256/384 f

), Normal mode

s

− Glueless Interface to TI McBSPs

• Integrated Total Electret-Microphone Biasing and Buffering Solution

− Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules

− Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5

− Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB

• Stereo-Line Inputs

− Integrated Programmable Gain Amplifier

− Analog Bypass Path of Codec

• ADC Multiplexed Input for Stereo-Line Inputs and Microphone

• Stereo-Line Outputs

− Analog Stereo Mixer for DAC and Analog Bypass Path

• Volume Control With Mute on Input and Output

• Highly Efficient Linear Headphone Amplifier

− 30 mW into 32 Ω From a 3.3-V Analog Supply Voltage

• Flexible Power Management Under Total Software Control

− 23-mW Power Consumption During Playback Mode

− Standby Power Consumption <150 µW

− Power-Down Power Consumption <15 µW

• Industry’s Smallest Package: 32-Pin TI Proprietary MicroStar Junior

2

Total Board Area

−25 mm

− 28-Pin TSSOP Also Is Available (62 mm

2

Total Board Area)

• Ideally Suitable for Portable Solid-State Audio Players and Recorders

1−2

1.2 Functional Block Diagram

VMID

AVDD

AGND

MICBIAS

RLINEIN

MICIN

LLINEIN

HPVDD

HPGND

RHPOUT

50 kΩ

50 kΩ

12 to −34.5 dB,

10 kΩ

VMID

12 to −34 dB,

Headphone

Driver

1.0X

1.0X

1.0X

1.5X

1.5 dB Steps

50 kΩ

1.5 dB Steps
6 to −73 dB,

1 dB Steps

VMID

VDAC

VADC

Line

Mute

Bypass
Mute

Line

Mute

Mute,

0 dB, 20 dB

Bypass
Mute

DSPcodec

TLV320AIC23B

2:1

MUX

VADC

2:1

MUX

Side Tone
Mute

Σ

Σ−∆

ADC

Σ−∆

ADC

Σ−∆

DAC

Control

Interface

Digital
Filters

CS
SDIN
SCLK
MODE

DVDD
BVDD

DGND

ROUT

LOUT

LHPOUT

Headphone

Driver

XTI/MCLK

XTO

CLKOUT

NOTE: MCLK, BCLK, and SCLK are all asynchronous to each other.

6 to −73 dB,

1 dB Steps

(1x, 1/2x)

OSC

Σ

CLKIN

Divider

CLKOUT

Divider

(1x, 1/2x)

VDAC

Σ−∆

DAC

Digital

Audio

Interface

LRCIN
DIN
LRCOUT
DOUT

BCLK

1−3

1.3 Terminal Assignments

GQE/ZQE PACKAGE

(TOP VIEW)

NC

DIN

BCLK

CLKOUT

BVDD

DGND

DVDD

XTO

25 24 23 22 21 20 19 18 17

NC

BVDD

CLKOUT

BCLK

DIN

LRCIN

DOUT

LRCOUT

HPVDD

LHPOUT

RHPOUT

HPGND

LOUT

ROUT

AVDD

PW PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10
11
12
13
14

LRCIN

DOUT

LRCOUT

HPVDD

LHPOUT

RHPOUT

HPGND

26
27
28
29
30
31
32

123456789

NC

LOUT

NC − No internal connection

28
27
26
25
24
23
22
21
20
19
18
17
16
15

DGND
DVDD
XTO
XTI/MCLK
SCLK
SDIN
MODE
CS
LLINEIN
RLINEIN
MICIN
MICBIAS
VMID
AGND

ROUT

AVDD

DIN

LRCIN

DOUT

LROUT

HPVDD

LHPOUT

RHPOUT

VMID

AGND

MICBIAS

1

2

3

4

5

6

7

16
15
14
13
12
11
10

NC

MICIN

RHD PACKAGE

BCLK

CLKOUT

28

27

8

9

XTI/MCLK
SCLK

SDIN
MODE
CS
LLINEIN
RLINEIN

(TOP VIEW)

BVDD

DGND

26

25

11

10

DVDD

24

12

XTO

23

13

XTI/MCLK

22

21

20

19

18

17

16

15

14

SCLK
SDIN
MODE
CS
LLNEIN
RUNEIN
MICIN

1−4

LOUT

HPGND

ROUT

AVDD

AGND

VMID

MICBIAS

1.4 Ordering Information

I/O

DESCRIPTION

PACKAGE

T

A

−10°C to 70°C TLV320AIC23BGQE/ZQE TLV320AIC23BPW TLV320AIC23BRHD

−40°C to 85°C TLV320AIC23BIGQE/ZQE TLV320AIC23BIPW TLV320AIC23BIRHD

MicroStar Junior GQE/ZQE

32-Pin

28-Pin

TSSOP PW

28-Pin

PQFP RHD

1.5 Terminal Functions

TERMINAL

NO.

NAME

AGND 5 15 12 Analog supply return
AVDD 4 14 11 Analog supply input. Voltage level is 3.3 V nominal.
BCLK 23 3 28 I/O I2S serial-bit clock. In audio master mode, the AIC23B generates this signal and sends it to th e

BVDD 21 1 26 Buffer supply input. Voltage range is from 2.7 V to 3.6 V.
CLKOUT 22 2 27 O Clock output. This is a buf fered version of the XTI input and is available in 1X or 1/2X frequencies

CS 12 21 18 I Control port input latch/address select. For SPI control mode this input acts as the data latch

DIN 24 4 1 I I2S format serial data input to the sigma-delta stereo DAC
DGND 20 28 25 Digital supply return
DOUT 27 6 3 O I2S format serial data output from the sigma-delta stereo ADC
DVDD 19 27 24 Digital supply input. Voltage range is 1.4 V to 3.6 V.
HPGND 32 11 8 Analog headphone amplifier supply return
HPVDD 29 8 5 Analog headphone amplifier supply input. Voltage level is 3.3 V nominal.
LHPOUT 30 9 6 O Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V

LLINEIN 11 20 17 I Left stereo-line input channel. Nominal 0-dB input level is 1 V

LOUT 2 12 9 O Left stereo mixer-channel line output. Nominal output level is 1.0 V
LRCIN 26 5 2 I/O I2S DAC-word clock signal. In audio master mode, the AIC23B generates this framing signal

LRCOUT 28 7 4 I/O I2S ADC-word clock signal. In audio master mode, the AIC23B generates this framing signal

MICBIAS 7 17 14 O Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage

MICIN 8 18 15 I Buffered amplifier input suitable for use with electret-microphone capsules. Without external

MODE 13 22 19 I Serial-interface-mode input. See Section 3.1 for details.
NC 1, 9

RHPOUT 31 10 7 O Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V

RLINEIN 10 19 16 I Right stereo-line input channel. Nominal 0-dB input level is 1 V

ROUT 3 13 10 O Right stereo mixer-channel line output. Nominal output level is 1.0 V

GQE/

ZQE

17, 25

PW RHD

DSP. In audio slave mode, the signal is generated by the DSP.

of XTI. Bit 07 in the sample rate control register controls frequency selection.

control. For 2-wire control mode this input defines the seventh bit in the device address field.
See Section 3.1 for details.

Gain of –73 dB to 6 dB is provided in 1-dB steps.

. Gain of –34.5 dB to 12 dB is

provided in 1.5-dB steps.

and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.

and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.

level is 3/4 AVDD nominal.

resistors a default gain of 5 is provided. See Section 2.3.1.2 for details.

Not Used—No internal connection

Gain of −73 dB to 6 dB is provided in 1-dB steps.

provided in 1.5-dB steps.

RMS

.

RMS

. Gain of –34.5 dB to 12 dB is

RMS

.

RMS

RMS

RMS

.

.

1−5

1.5 Terminal Functions (continued)

I/O

DESCRIPTION

TERMINAL

NO.

NAME

SCLK 15 24 21 I Control-port serial-data clock. For SPI and 2-wire control modes this is the serial-clock input.

SDIN 14 23 20 I Control-port serial-data input. For SPI and 2-wire control modes this is the serial-data input and

VMID 6 16 13 I Midrail voltage decoupling input. 10-µF and 0.1-µF capacitors should be connected in parallel to

XTI/MCLK 16 25 22 I Crystal or external-clock input. Used for derivation of all internal clocks on the AIC23B.
XTO 18

GQE/

ZQE

PW RHD

See Section 3.1 for details.

also is used to select the control protocol after reset. See Section 3.1 for details.

this terminal for noise filtering. Voltage level is 1/2 AVDD nominal.

26 23 O Crystal output. Connect to external crystal for applications where the AIC23B is the audio timing

master. Not used in applications where external clock source is used.

1−6

2 Specifications

Operating free-air temperature, T

C

2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range (unless
otherwise noted)

Supply voltage range, AVDD to AGND, DVDD to DGND, BVDD to DGND, HPVDD to HPGND

(see Note 1) −0.3 V to + 3.63 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog supply return to digital supply return, AGND to DGND −0.3 V to + 3 .63 V. . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, all input signals: Digital −0.3 V to DV

Case temperature for 10 seconds 240°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T
Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , a nd
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: DVDD may not exceed BVDD + 0.3V; BVDD may not exceed AVDD + 0.3V or HPVDD + 0.3.

†

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DD
DD

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Analog −0.3 V to AV

Commercial −10°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A:

Industrial −40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Recommended Operating Conditions

MIN NOM MAX UNIT

Analog supply voltage, AVDD, HPVDD (see Note 2) 2.7 3.3 3.6 V
Digital buffer supply voltage, BVDD (see Note 2) 2.7 3.3 3.6 V
Digital core supply voltage, DVDD (see Note 2) 1.42 1.5 3.6 V
Analog input voltage, full scale − 0dB (AVDD = 3.3 V) 1 V
Stereo-line output load resistance 10 kΩ
Headphone-amplifier output load resistance 0 Ω
CLKOUT digital output load capacitance 20 pF
All other digital output load capacitance 10 pF
Stereo-line output load capacitance 50 pF
XTI master clock Input 18.43 MHz
ADC or DAC conversion rate 96 kHz

A

NOTE 2: Digital voltage values are with respect to DGND; analog voltage values are with respect to AGND.

Commercial −10 70
Industrial −40 85

RMS

°

2−1

2.3 Electrical Characteristics Over Recommended Operating Conditions, AVDD,

Signal-to-noise ratio, A-weighted, 0-dB gain (see Notes 3

Signal-to-noise ratio, A-weighted, 0-dB gain (see Notes 3
Dynamic range, A-weighted, −60-dB full-scale input (see

Dynamic range, A-weighted, −60-dB full-scale input (see

HPV

, BVDD = 3.3 V, DVDD = 1.5 V, Slave Mode, XTI/MCLK = 256fs, fs = 48 kHz

DD

(unless otherwise stated)

2.3.1 ADC

2.3.1.1 Line Input to ADC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input signal level (0 dB) 1 V

fs = 48 kHz (3.3 V) 85 90

and 4)

AVDD = 3.3 V 85 90

Note 4)

Total harmonic distortion, −1-dB input, 0-dB gain
Power supply rejection ratio 1 kHz, 100 mV

ADC channel separation 1 kHz input tone 90 dB
Programmable gain 1 kHz input tone, R
Programmable gain step size Monotonic 1.5 dB
Mute attenuation 0 dB, 1 kHz input tone 80 dB

Input resistance
Input capacitance 10 pF

NOTES: 3. Ratio of output level with 1-kHz full-scale input, to the output level with the input short circuited, measured A-weighted over a 20-Hz

to 20-kHz bandwidth using an audio analyzer.

4. All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter
results in higher THD + N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass
filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.

AVDD = 2.7 V 90
AVDD = 3.3 V –80
AVDD = 2.7 V 80

12 dB Input gain 10 20
0 dB input gain 30 35

fs = 48 kHz (2.7 V) 90

pp

SOURCE

< 50 Ω –34.5 12 dB

50 dB

RMS

dB

dB

dB

kΩ

2.3.1.2 Microphone Input to ADC, 0-dB Gain, fs = 8 kHz (40-KΩ Source Impedance, see Section 1.2,
Functional Block Diagram)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input signal level (0 dB) 1.0 V

Signal-to-noise ratio, A-weighted, 0-dB gain (see Notes 3 and 4)

Dynamic range, A-weighted, −60-dB full-scale input (see Note 4)

Total harmonic distortion, −1-dB input, 0-dB gain
Power supply rejection ratio 1 kHz, 100 mV

Programmable gain boost 1 kHz input tone, R
Microphone-path gain MICBOOST = 0, R
Mute attenuation 0 dB, 1 kHz input tone 60 80 dB
Input resistance 8 14 kΩ
Input capacitance 10 pF

NOTES: 3. Ratio of output level with 1-kHz full-scale input, to the output level with the input short circuited, measured A-weighted over a 20-Hz

to 20-kHz bandwidth using an audio analyzer.

4. All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter
results in higher THD + N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass
filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.

AVDD = 3.3 V 80 85
AVDD = 2.7 V 84
AVDD = 3.3 V 80 85
AVDD = 2.7 V 84
AVDD = 3.3 V –60
AVDD = 2.7 V −60

pp

SOURCE

SOURCE

< 50 Ω 20 dB

< 50 Ω 14 dB

50 dB

RMS

dB

dB

dB

2−2

2.3.1.3 Microphone Bias

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Bias voltage 3/4 AVDD − 100 m 3/4 AVDD 3/4 AVDD + 100 m V
Bias-current source 3 mA
Output noise voltage 1 kHz to 20 kHz 25 nV/√Hz

2.3.2 DAC

2.3.2.1 Line Output, Load = 10 kΩ, 50 pF

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

0-dB full-scale output voltage (FFFFFF) 1.0 V

Signal-to-noise ratio, A-weighted, 0-dB gain (see Notes 3, 4, and 5)

Dynamic range, A-weighted (see Note 4)

Total harmonic distortion

Power supply rejection ratio 1 kHz, 100 mV
DAC channel separation 100 dB

NOTES: 3. Ratio of output level with 1-kHz full-scale input, to the output level with the input short circuited, measured A-weighted over a 20-Hz

to 20-kHz bandwidth using an audio analyzer.

4. All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter
results in higher THD + N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass
filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.

5. Ratio of output level with 1-kHz full-scale input, to the output level with all zeros into the digital input, measured A-weighted over
a 20-Hz to 20-kHz bandwidth.

AVDD = 3.3 V fs = 48kHz 90 100
AVDD = 2.7 V fs = 48 kHz 100
AVDD = 3.3 V 85 90
AVDD = 2.7 V TBD

AVDD = 3.3 V

AVDD = 2.7 V

1 kHz, 0 dB –88 –80
1 kHz, −3 dB −92 −86
1 kHz, 0 dB −85
1 kHz, −3 dB −88

pp

50 dB

RMS

dB

dB

dB

dB

2.3.3 Analog Line Input to Line Output (Bypass)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

0-dB full-scale output voltage 1.0 V

Signal-to-noise ratio, A-weighted, 0-dB gain (see Notes 3 and 4)

Total harmonic distortion

Power supply rejection ratio 1 kHz, 100 mV
DAC channel separation (left to right) 1 kHz, 0 dB 80 dB

NOTES: 3. Ratio of output level with 1-kHz full-scale input, to the output level with the input short circuited, measured A-weighted over a 20-Hz

to 20-kHz bandwidth using an audio analyzer.

4. All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter
results in higher THD + N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass
filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.

AVDD = 3.3 V 90 95
AVDD = 2.7 V 95

AVDD = 3.3 V

AVDD = 2.7 V

1 kHz, 0 dB –86 –80
1 kHz, −3 dB −92 −86
1 kHz, 0 dB −86
1 kHz, −3 dB −92

pp

50 dB

RMS

dB

dB

dB

2−3

2.3.4 Stereo Headphone Output

AV

= 3.3 V,

AVDD = 3.3 V,

TOT

I

TOT

No input signal

mA

Power down, DV

= 1.5 V,

Power down, DVDD = 1.5 V,

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

0-dB full-scale output voltage 1.0 V
Maximum output power, P

Signal-to-noise ratio, A-weighted (see Note 4) AVDD = 3.3 V 90 97 dB

Total harmonic distortion
Power supply rejection ratio 1 kHz, 100 mV

Programmable gain 1 kHz output −73 6 dB
Programmable-gain step size 1 dB
Mute attenuation 1 kHz output 80 dB

NOTE 4: All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter results

in higher THD + N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass filter removes
out-of-band noise, which, although not audible, may affect dynamic specification values.

O

RL = 32 Ω 30
RL = 16 Ω 40

PO = 10 mW 0.1

1 kHz output

PO = 20 mW 1.0

pp

50 dB

RMS

mW

%

2.3.5 Analog Reference Levels

PARAMETER MIN TYP MAX UNIT

Reference voltage AVDD/2 − 50 mV AVDD/2 + 50 mV V
Divider resistance 40 50 60 kΩ

2.3.6 Digital I/O

V

Input low level 0.3 × BV

IL

V

Input high level 0.7 × BV

IH

V

Output low level 0.1 × BV

OL

V

Output high level 0.9 × BV

OH

2.3.7 Supply Current

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Total supply current,

I

PARAMETER MIN TYP MAX UNIT

DD

DD

DD

DD

Record and playback (all active) 20 24 26
Record and playback (osc, clk, and MIC output powered down) 16 18 20
Line playback only 6 7.5 9
Record only 11 13.5 15
Analog bypass (line in to line out) 4 4.5 6

Oscillator enabled 0.8 1.5 3

AVDD = BVDD = HPVDD = 3.3 V

Oscillator disabled 0.01

V
V
V
V

mA

2−4

2.4 Digital-Interface Timing

t

w(1)

System-clock pulse duration, MCLK/XTI

t

w(2)

t

System-clock period, MCLK/XTI 54 ns

c(1)

Duty cycle, MCLK/XTI 40/60% 60/40%

t

Propagation delay, CLKOUT 0 10 ns

pd(1)

PARAMETER MIN TYP MAX UNIT

High 18
Low 18

t

c(1)

ns

t

w(1)

MCLK/XTI

CLKOUT

CLKOUT

(Div 2)

Figure 2−1. System-Clock Timing Requirements

2.4.1 Audio Interface (Master Mode)

PARAMETER MIN TYP MAX UNIT

t

Propagation delay, LRCIN/LRCOUT 0 10 ns

pd(2)

t

Propagation delay, DOUT 0 10 ns

pd(3)

t

Setup time, DIN 10 ns

su(1)

t

Hold time, DIN 10 ns

h(1)

BCLK

t

LRCIN

LRCOUT

pd(2)

t

pd(3)

t

w(2)

t

pd(1)

DOUT

DIN

t

su(1)

t

h(1)

Figure 2−2. Master-Mode Timing Requirements

2−5