查询27L2C供应商
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
FAMILY OF MICROPOWER RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
FEATURES
BiMOS Rail-to-Rail Output
D
D Input Bias Current ...1 pA
D High Wide Bandwidth ...160 kHz
D High Slew Rate ...0.1 V/µs
D Supply Current ...7 µA (per channel)
D Input Noise Voltage ...89 nV/√Hz
D Supply Voltage Range ...2.7 V to 16 V
D Specified Temperature Range
– –40°C to 125°C ...Industrial Grade
– 0°C to 70°C ...Commercial Grade
D Ultra-Small Packaging
– 5 Pin SOT-23 (TLV27L1)
APPLICATIONS
Portable Medical
D
D Power Monitoring
D Low Power Security Detection Systems
D Smoke Detectors
DESCRIPTION
The TLV27Lx single supply operational amplifiers
provide rail-to-rail output capability . The TL V27Lx takes
the minimum operating supply voltage down to 2.7 V
over the extended industrial temperature range, while
adding the rail-to-rail output swing feature. The
TLV27Lx also provides 160-kHz bandwidth from only
7 µA. The maximum recommended supply voltage is
16 V, which allows the devices to be operated from
(±8-V supplies down to ±1.35 V) two rechargeable cells.
The rail-to-rail outputs make the TLV27Lx good
upgrades for the TLC27Lx family—offering more
bandwidth at a lower quiescent current. The TLV27Lx
offset voltage is equal to that of the TLC27LxA variant.
Their cost effectiveness makes them a good alternative
to the TLC/V225x, where offset and noise are not of
premium importance.
The TLV27L1/2 are available in the commercial
temperature range to enable easy migration from the
equivalent TLC27Lx. The TL V27L1 is not available with
the power saving/performance boosting programmable
pin 8.
The TL V27L1 is available in the small SOT -23 package
—something the TLC27(L)1 was not—enabling
performance boosting in a smaller package. The
TLV27L2 is available in the 3mm x 5mm MSOP,
providing PCB area savings over the 8-pin SOIC and
8-pin TSSOP.
V
DEVICE
TLV27Lx 2.7 to 16 11 –0.2 to VS+1.2 5 60 0.18 0.06 89
TLV238x 2.7 to 16 10 –0.2 to VS–0.2 4.5 60 0.18 0.06 90
TLC27Lx 4 to 16 17 –0.2 to VS–1.5 10/5/2 60 0.085 0.03 68
OPAx349 1.8 to 5.5 2 –0.2 to VS+0.2 10 10 0.070 0.02 300
OPAx347 2.3 to 5.5 34 –0.2 to VS+0.2 6 10 0.35 0.01 60
TLC225x 2.7 to 16 62.5 0 to VS–1.5 1.5/0.85 60 0.200 0.02 19
NOTE: All dc specs are maximums while ac specs are typicals.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
[V]
S
IQ/ch
[µA]
SELECTION GUIDE
V
ICR
[V]
www.ti.com
V
IO
[mV]
I
IB
[pA]
GBW
[MHz]
Copyright 2001–2003, T exas Instruments Incorporated
SLEW RATE
[V/µs]
Vn, 1 kHz
[nV/√Hz
]
1
TLV27L1
TLV27L1CD
SOIC-8
D
27V1C
0°C to 70°C
TLV27L1CDBV
SOT-23
DBV
VBIC
Tape and Reel
TLV27L1ID
SOIC-8
D
27V1I
–40°C to 125°C
TLV27L1IDBV
SOT-23
DBV
VBII
Tape and Reel
TLV27L2CD
SOIC-8
D
27V2C
0°C to 70°C
TLV27L2ID
SOIC-8
D
27V2I
–40°C to 125°C
Supply voltage, (VS)
V
Operating free-air temperature, T
C
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
PRODUCT
PACKAGE
PACKAGE
CODE
PACKAGE/ORDERING INFORMATION
SPECIFIED
SYMBOL
TEMPERATURE
RANGE
ORDER NUMBER TRANSPORT MEDIA
TLV27L1CD Tube
TLV27L1CDR Tape and Reel
TLV27L1CDBVR
TLV27L1CDBVT
TLV27L1ID Tube
TLV27L1IDR Tape and Reel
TLV27L1IDBVR
TLV27L1IDBVT
TLV27L2CD Tube
TLV27L2CDR Tape and Reel
TLV27L2ID Tube
TLV27L2IDR Tape and Reel
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
Input voltage, V
Output current, I
Differential input voltage, V
S
(see Note 1) V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ID
†
16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, T
J
Operating free-air temperature range, T
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Relative to GND pin.
DISSIPATION RATING TABLE
PACKAGE
D (8) 38.3 176 710 mW 370 mW
DBV (5) 55 324.1 385 mW 201 mW
DBV (6) 55 294.3 425 mW 221 mW
θ
JC
(°C/W)
θ
JA
(°C/W)
TA≤ 25°C
POWER RATING
TA = 85°C
POWER RATING
S
V
S
recommended operating conditions
Input common-mode voltage range –0.2 VS–1.2 V
2
MIN MAX UNIT
Dual supply ±1.35 ±8
Single supply 2.7 16
A
C-suffix 0 70
I-suffix –40 125
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°
°
VIOInput offset voltage
mV
RL = 100 kΩ,RS = 50 Ω
V
= 0 V to V
–1.2 V ,
CMRR
Common-mode rejection ratio
VIC = 0 V to VS–1.2 V ,
dB
V
= 2.7 V,
Large-signal differential voltage
V
=V
/2,
VS = 2.7 V,
A
Large-signal differential voltage
V
O(PP)
=VS/2,
dB
L
VS = ±5 V
IO
IIOInput offset current
V
= V
/2, V
= V
/2,
pA
VIC = VS/2, VO = VS/2,
IB
L S
IIBInput bias current
pA
IQQuiescent current (per channel)
VO = VS/2
A
V
= 2.7 V to 16 V,
No load,
PSRR
Power supply rejection ratio (∆VS/∆VIO)
VS = 2.7 V to 16 V,
No load,
dB
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
electrical characteristics at recommended operating conditions, VS = 2.7 V, 5 V, and 10 V (unless
otherwise noted)
dc performance
PARAMETER TEST CONDITIONS T
α
VIO
VD
†
Full range is –40°C to 125°C for I suffix.
Offset voltage drift
amplification
input characteristics
PARAMETER TEST CONDITIONS T
I
I
r
C
i(d)
IC
Input offset current
Input bias current
Differential input resistance 25°C 1000 GΩ
Common-mode input capacitance f = 1 kHz 25°C 8 pF
VIC = VS/2, VO = VS/2,
RS = 50 Ω
5 V
RL = 100 kΩ
RL = 100 kΩ,R
= 50 Ω
S
†
A
25°C 0.5 5
Full range 7
25°C 1.1 µV/°C
25°C 71 86
Full range 70
25°C 80 100
Full range 77
25°C 77 82
Full range 74
A
≤25°C 1 60
≤70°C 100
≤125°C 1000
≤25°C 1 60
≤70°C 200
≤125°C 1000
MIN TYP MAX UNIT
MIN TYP MAX UNIT
pA
pA
power supply
PARAMETER TEST CONDITIONS T
†
Full range is –40°C to 125°C for I suffix.
VIC = VS/2 V
†
A
25°C 7 11
Full range 16
25°C 74 82
Full range 70
MIN TYP MAX UNIT
µ
www.ti.com
3
TLV27L1
VS = 2.7 V
V
= V
/2,
VIC = VS/2,
VS = 5 V
OL
VOOutput voltage swing from rail
VS = ±5 V
V
V
= V
/2,
VS = 5 V
VIC = VS/2,
OL
VS = ±5 V
SR
Slew rate at unity gain
CL = 50 pF
V/µs
V
= 1 V, A
= –1,
tsSettling time (0.1%)
V
(STEP)pp
= 1 V, AV = –1,
25°C
s
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
electrical characteristics at recommended operating conditions, VS = 2.7 V, 5 V, and ±5 V (unless
otherwise noted) (continued)
output characteristics
PARAMETER TEST CONDITIONS T
IOL = 100 µA
IOL = 500 µA
I
O
†
Full range is –40°C to 125°C for I suffix.
Output current VO = 0.5 V from rail VS = 2.7 V 25°C 400 µA
dynamic performance
PARAMETER TEST CONDITIONS T
GBP Gain bandwidth product RL = 100 kΩ, CL = 10 pF, f = 1 kHz 25°C 160 kHz
V
= 1 V, RL = 100 kΩ,
SR Slew rate at unity gain
φ
Phase margin RL = 100 kΩ, CL = 50 pF 25°C 62 °
M
O(pp)
CL = 50 pF, RL = 100 kΩ
Rise
Fall
†
A
25°C 200 160
Full range 220
25°C 120 85
Full range 200
25°C 120 50
Full range 150
25°C 800 420
Full range 900
25°C 400 200
Full range 500
A
25°C 0.06
–40°C 0.05
125°C 0.8
MIN TYP MAX UNIT
MIN TYP MAX UNIT
62
44
V/µs
µ
noise/distortion performance
PARAMETER TEST CONDITIONS T
V
I
Equivalent input noise voltage f = 1 kHz 25°C 89 nV/√Hz
n
Equivalent input noise current f = 1 kHz 25°C 0.6 fA/√Hz
n
A
MIN TYP MAX UNIT
4
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IQQuiescent current
.4
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
IIB/I
V
OH
V
OL
A
VD
GBP Gain-bandwidth product vs Free-air temperature 15
φ
m
CMRR Common-mode rejection ratio vs Frequency 17
PSRR Power supply rejection ratio vs Frequency 18
SR Slew rate vs Free-air temperature 20
V
O(PP)
Input offset voltage vs Common-mode input voltage 1, 2, 3
Input bias and offset current vs Free-air temperature 4
IO
High-level output voltage vs High-level output current 5, 7, 9
Low-level output voltage vs Low-level output current 6, 8, 10
vs Supply voltage 11
vs Free-air temperature 12
Supply voltage and supply current ramp up 13
Differential voltage gain and phase shift vs Frequency 14
Phase margin vs Load capacitance 16
Input referred noise voltage vs Frequency 19
Peak-to-peak output voltage vs Frequency 21
Inverting small-signal response 22
Inverting large-signal response 23
Crosstalk vs Frequency 24
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
2000
VS = 2.7 V
1500
Aµ
– Input Offset Voltage –
IO
V
TA = 25°C
1000
500
0
–500
–1000
–1500
–2000
0 0.5 1 1.5 2 2.5 3
VIC – Common-Mode Input Voltage – V
Figure 1
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
2000
VS = 2.7 V
1500
Aµ
–1000
– Input Offset Voltage –
IO
–1500
V
–2000
TA = 25°C
1000
500
0
–500
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VIC – Common-Mode Input Voltage – V
Figure 2
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
2000
VS = ±5 Vdc
1500
Aµ
–1000
– Input Offset Voltage –
IO
–1500
V
–2000
TA = 25°C
1000
500
0
–500
–5.2 –3.6 –2 –0.4 1.2 2.8 4
VIC – Common-Mode Input Voltage – V
Figure 3
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5
TLV27L1
5
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
TYPICAL CHARACTERISTICS
INPUT BIAS AND INPUT
OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
100
VS = 5 V
90
VIC = 2.5
80
VO = 2.5
70
60
50
– Input Bias and Input
40
IO
I
30
Offset Currents – pA
and
20
IB
I
10
0
25 45 65 85 105 125
TA – Free-Air Temperature – °C
Figure 4
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4.5
4
3.5
3
2.5
2
1.5
1
– High-Level Output Voltage – V
0.5
OH
V
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
IOH – High-Level Output Current – mA
–40°C
0°C
125°C
Figure 7
I
IB
VS = 5 V
25°C
70°C
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4
3
2
1
0
–1
–2
I
IO
–3
– High-Level Output Voltage – V
–4
OH
V
–5
0 1 2 3 4 5 6 7 8 9 1011 12 13 14 15
IOH – High-Level Output Current – mA
–40°C
125°C
VS = ±5 V
0°C
25°C
25°C
Figure 5
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
5
VS = 5 V
4.5
4
3.5
3
2.5
2
1.5
1
– Low-Level Output Voltage – V
0.5
OL
V
0
125°C
70°C
25°C
0°C
–40°C
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
IOL – Low-Level Output Current – mA
Figure 8
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
5
VS = ±5 V
4
3
2
1
0
–1
–2
–3
– Low-Level Output Voltage – V
–4
OL
V
–5
0 1 2 3 4 5 6 7 8 9 10 11 12 131415
IOL – Low-Level Output Current – mA
125°C
70°C
25°C
0°C
–40°C
Figure 6
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
– High-Level Output Voltage – V
0.3
OH
V
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
IOH – High-Level Output Current – mA
–40°C
0°C
125°C
Figure 9
VS = 2.7 V
25°C
70°C
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
2.7
VS = 2.7 V
2.4
2.1
1.8
1.5
1.2
0.9
0.6
– Low-Level Output Voltage – V
0.3
OL
V
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
IOL – Low-Level Output Current – mA
125°C
70°C
25°C
0°C
–40°C
Figure 10
6
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
8
7
6
5
4
3
– Quiescent Currenr – AµI
2
(Q)
1
0
0246810121416
125°C
70°C
–40°C
VS – Supply Voltage – V
0°C
AµI
25°C
– Quiescent Currenr –
(Q)
Figure 11
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QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
8
7
6
5
4
3
2
1
0
–40 –25 –10 5 20 35 50 65 80 95 110 12
10 V
5 V
TA – Free-Air Temperature – °C
16 V
2.7 V
Figure 12
DIFFERENTIAL VOLTAGE GAIN
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
TYPICAL CHARACTERISTICS
SUPPLY VOLTAGE AND
SUPPLY CURRENT RAMP UP
15
10
5
0
– Supply Voltage – V/dc
S
V
0 5 10 15 20 25 30
V
I
Q
t – Time – ms
Figure 13
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
170
160
VS = 2.7 V
150
140
130
120
110
GBP – Gain-Bandwidth Product – kHz
100
–40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C
VS = 5 V
Figure 15
S
V
O
VS = 0 to 15 V,
RL = 100 Ω,
CL = 10 pF,
TA = 25°C
40
Aµ
15
10
5
– Supply Current –
CC
I
0
PHASE MARGIN
vs
LOAD CAPACITANCE
80
70
60
50
40
30
20
Phase Margin – Degrees
10
0
10 100 1000
CL – Load Capacitance – pF
VS = 5 V
RL = 100 kΩ
TA = 25°C
Figure 16
AND PHASE SHIFT
vs
120
100
80
60
40
20
– Differential Voltage Gain – dB
0
VD
A
–20
0.1 1 10 100 1 k 10 k 100 k 1 M
FREQUENCY
VS = 5 V
RL = 100 kΩ
CL = 10 pF
TA = 25°C
f – Frequency – Hz
Figure 14
COMMON-MODE REJECTION RATIO
120
110
100
90
80
70
60
50
40
30
20
10
0
CMRR – Common-Mode Rejection Ratio – dB
10 100 1 k 10 k 100 k 1 M
FREQUENCY
f – Frequency – Hz
Figure 17
vs
0°
30°
60°
90°
120°
150°
180°
VS = 5 V
TA = 25°C
Phase Shift
POWER SUPPLY REJECTION RATIO
vs
100
90
80
70
60
50
40
30
20
10
0
PSRR – Power Supply Rejection Ratio – dB
10 100 1 k 10 k 100 k 1 M
FREQUENCY
VS =±2.5 V
TA = 25°C
f – Frequency – Hz
Figure 18
INPUT REFERRED NOISE VOLTAGE
vs
250
nV/ Hz
200
150
100
50
– Input Referred Noise Voltage –
n
V
0
1 10 100 1 k 10 k 100 k
FREQUENCY
VS = 5 V,
G = 2,
RF = 100 kΩ
f – Frequency – Hz
Figure 19
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SLEW RATE
vs
FREE-AIR TEMPERATURE
0.09
0.08
sµ
0.07
V/
0.06
0.05
0.04
0.03
SR – Slew Rate –
0.02
0.01
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
SR+
SR–
VS = 5 V
Gain = 1
VO = 1
RL = 100 kΩ
CL = 50 pF
TA – Free-air Temperature –°C
Figure 20
7
TLV27L1
PEAK-TO-PEAK OUTPUT VOLTAGE
INVERTING SMALL-SIGNAL
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
TYPICAL CHARACTERISTICS
vs
16
14
12
10
8
6
4
– Output Voltage Peak-to-Peak – V
2
OPP
V
0
10 100 1000 1 k 10 k
FREQUENCY
VS = 15 V
RL = 100 kΩ,
CL = 10 pF,
THD+N <= 5%
VS = 5 V
VS = 2.7 V
f – Frequency – Hz
Figure 21
INVERTING LARGE-SIGNAL
RESPONSE
0.06
0.04
0.02
PP
V
0
Amplitude –
–0.02
–0.04
–0.06
–100 0 100 200 300 400 500 600 700
VI = 100 mV
Gain = –1,
RL = 100 kΩ,
CL = 10 pF,
VS = 5 V,
VO = 100 mVPP,
f = 1 kHz
VO = 100 mV
PP
PP
t – Time – µs
Figure 23
RESPONSE
2
1.5
1
PP
0.5
V
0
–0.5
Amplitude –
–1
–1.5
–2
–100 0 100 200 300 400 500 600 700
VI = 3 V
PP
Gain = –1,
RL = 100 kΩ,
CL = 10 pF,
VS = 5 V,
VO = 3 VPP,
f = 1 kHz
VO = 3 V
t – Time – µs
PP
Figure 22
CROSSTALK
vs
FREQUENCY
0
VS = 5 V
RL = 2 kΩ
–20
CL = 10 pF
TA = 25°C
–40
Channel 1 to 2
–60
–80
Crosstalk – dB
–100
–120
–140
10 100 1 k 10 k 100 k
f – Frequency – Hz
Figure 24
8
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
APPLICATION INFORMATION
offset voltage
The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the
corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
R
F
I
R
G
IB–
+
V
I
R
S
I
IB+
–
+
V
VOO+ V
O
IO
1 ) ǒ
ǒ
R
F
Ǔ
" I
Ǔ
R
G
IB)
R
ǒ
S
1 ) ǒ
R
F
Ǔ
" I
Ǔ
R
G
IB–RF
Figure 25. Output Offset Voltage Model
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The
simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 26).
R
G
VDD/2
V
I
R1
Figure 26. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task.
For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure
to do this can result in phase shift of the amplifier.
V
I
C1
R
F
–
+
R2R1
C2
V
O
C1
+
_
R
G
V
O
+ ǒ1)
V
I
f
+
–3dB
R
F
R
F
R
G
1
2pR1C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
f
–3dB
=
R
G
(
ǒ
Ǔ
1 ) sR1C1
+
2pRC
R
F
1
2 –
Q
1
1
)
Ǔ
VDD/2
Figure 27. 2-Pole Low-Pass Sallen-Key Filter
www.ti.com
9
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV27Lx, follow proper printed-circuit board design techniques. A
general set of guidelines is given in the following.
D Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
D Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
10
www.ti.com
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JUL Y 2003
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 28 and is calculated by the following formula:
T
MAX–TA
P
Where:
ǒ
+
D
P
D
T
MAX
T
A
θ
JA
q
= Maximum power dissipation of TLV27Lx IC (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
= θ
θ
θ
Ǔ
JA
+ θ
JC
CA
= Thermal coefficient from junction to case
JC
= Thermal coefficient from case to ambient air (°C/W)
CA
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
TJ = 150°C
1.75
PDIP Package
Low-K Test PCB
θJA = 104°C/W
OUT
GND
IN+
Figure 28. Maximum Power Dissipation vs Free-Air Temperature
TLV27L1
DBV PACKAGE
(TOP VIEW)
1
5
2
3
4
1.5
SOIC Package
1.25
Low-K Test PCB
θJA = 176°C/W
1
0.75
0.5
Maximum Power Dissipation – W
SOT-23 Package
0.25
Low-K Test PCB
θJA = 324°C/W
0
–55–40 –25 –10 5
TA – Free-Air Temperature – °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
V
DD
NC
IN–
IN+
GND
IN–
NC – No internal connection
20 35 50
TLV27L1
D PACKAGE
(TOP VIEW)
1
2
3
4
MSOP Package
Low-K Test PCB
θJA = 260°C/W
65 80 95 110 125
NC
8
V
7
6
5
DD
OUT
NC
D PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
GND
TLV27L2
1
2
3
4
8
7
6
5
V
DD
2OUT
2IN–
2IN+
www.ti.com
11
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