Fully Specified for Both Single-Supply and
Split-Supply Operation
D
Very Low Power ...34 µA Per Channel Typ
D
Common-Mode Input Voltage Range
Includes Negative Rail
description
The TLV2252 and TLV2254 are dual and
quadruple low-voltage operational amplifiers from
T exas Instruments. Both devices exhibit rail-to-rail
output performance for increased dynamic range
in single- or split-supply applications. The
TLV225x family consumes only 34 µA of supply
current per channel. This micropower operation
makes them good choices for battery-powered
applications. This family is fully characterized at
3 V and 5 V and is optimized for low-voltage
applications. The noise performance has been
dramatically improved over previous generations
of CMOS amplifiers. The TLV225x has a noise
level of 19 nV/√Hz
competitive micropower solutions.
The TLV225x, exhibiting high input impedance
and low noise, are excellent for small-signal
conditioning for high-impedance sources, such as
piezoelectric transducers. Because of the micropower dissipation levels combined with 3-V
operation, these devices work well in hand-held
monitoring and remote-sensing applications. In
addition, the rail-to-rail output feature with single or split supplies makes this family a great choice when
interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV225xA family is
available and has a maximum input offset voltage of 850 µV.
at 1kHz, four times lower than
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
D
Low Input Offset Voltage
850 µV Max at T
D
Wide Supply Voltage Range
2.7 V to 8 V
D
Macromodel Included
D
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT CURRENT
3
2.5
2
1.5
1
– High-Level Output Voltage – V
0.5
OH
V
0
0200400
| IOH | – High-Level Output Current – µA
= 25°C
A
vs
Figure 1
VDD = 3 V
TA = –40°C
TA = 25°C
TA = 85°C
TA = 125°C
600800
The TL V2252/4 also make great upgrades to the TLV2322/4 in standard designs. They offer increased output
dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to
be used in a wider range of applications. For applications that require higher output drive and wider input voltage
range, see the TLV2432 and TLV2442 devices. If your design requires single amplifiers, please see the
TL V221 1/21/31 family . These devices are single rail-to-rail operational amplifiers in the SOT -23 package. Their
small size and low power consumption, make them ideal for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
TLV225x, TLV225xA
40°C to 125°C
µ
40°C to 125°C
µ
40°C to 125°C
µ
40°C to 125°C
µ
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TLV2252 AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
–
–
–55°C to 125°C
†
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL V2252CDR).
‡
The PW package is available only left-end taped and reeled.
§
Chips are tested at 25°C.
T
A
°
–
–
–55°C to 125°C
†
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL V2254CDR).
‡
The PW package is available only left-end taped and reeled.
§
Chips are tested at 25°C.
°
VIOmax
AT 25°C
850 µVTLV2252AID——TLV2252AIP TLV2252AIPWLE—
1500 µV
850 µVTLV2252AQD—————
1500 µV
850 µV
1500 µV
VIOmax
AT 25°C
850 µVTLV2254AID——TLV2254AIN TLV2254AIPWLE—
1500 µV
850 µVTLV2254AQD—————
1500 µV
850 µV
1500 µV
SMALL
(D)
—
—
SMALL
(D)
—
—
†
†
OUTLINE
TLV2252ID——TLV2252IP——
TLV2252QD—————
OUTLINE
TLV2254ID——TLV2254IN——
TLV2254QD—————
CHIP
CARRIER
(FK)
TLV2252AMFK
TLV2252MFK
TLV2254 AVAILABLE OPTIONS
CHIP
CARRIER
(FK)
TLV2254AMFK
TLV2254MFK
CERAMIC
DIP
(JG)
TLV2252AMJG
TLV2252MJG
PACKAGED DEVICES
CERAMIC
DIP
(J)
TLV2254AMJ
TLV2254MJ
PLASTIC
PLASTIC
DIP
(P)
—
—
DIP
(N)
—
—
TSSOP
(PW)
—
—
TSSOP
(PW)
—
—
‡
‡
CERAMIC
FLATPACK
(U)
TLV2252AMU
TLV2252MU
CERAMIC
FLATPACK
(W)
TLV2254AMW
TLV2254MW
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2252I, TLV2252AI
E
TLV2252Q, TLV2252AQ
D, P, OR PW PACKAGE
(TOP VIEW)
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TLV2254I, TLV2254AI, TLV2254Q, TL V2254AQ...D OR N PACKAG
TLV2254M, TLV2254AM ...J OR W PACKAGE
(TOP VIEW)
10
8
7
6
5
8
7
6
5
9
8
7
6
V
DD+
2OUT
2IN–
2IN+
V
DD+
2OUT
2IN–
2IN+
NC
V
CC
2OUT
2IN –
2IN +
+
1OUT
1IN–
1IN+
V
/GND
DD–
TLV2252M, TLV2252AM . . . JG PACKAGE
1OUT
1IN–
1IN+
V
/GND
DD–
TLV2252M, TLV2252AM ...U PACKAGE
1OUT
1IN –
1IN +
V
/GND
CC–
TLV2252M, TLV2252AM . . . FK PACKAGE
NC
1
2
3
4
(TOP VIEW)
1
2
3
4
(TOP VIEW)
1
2
3
4
5
(TOP VIEW)
1
14
13
12
10
14
4OUT
4IN–
4IN+
11
V
/GND
DD–
3IN+
9
3IN–
8
3OUT
4OUT
4IN –
4IN +
/GND
V
DD –
3IN +
3IN –
8
3OUT
1OUT
DD+
2
3
4
5
6
7
(TOP VIEW)
1
1IN–
1IN+
V
2IN+
2IN–
2OUT
TLV2254I, TLV2254AI . . . PW PACKAGE
1OUT
1IN –
1IN +
V
DD+
2IN +
2IN –
2OUT
TLV2254M, TLV2254AM . . . FK PACKAGE
7
(TOP VIEW)
NC
1IN–
NC
1IN+
NC
NC
1OUT
NC
3 2 1 20 19
4
5
6
7
8
910111213
NC
NC
/GND
DD–
V
DD+
V
2IN+
NC
18
17
16
15
14
NC
NC
2OUT
NC
2IN–
NC
1IN+
V
DD+
2IN+
NC
NC
1OUT
NC
4OUT
1IN –
3212019
4
5
6
7
8
910111213
NC
2IN –
2OUT
3OUT
4IN –
18
17
16
15
14
3IN –
4IN+
NC
V
DD–
NC
3IN+
/GND
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
T
emplate Release Date: 7–11–
94
TLV225x, TLV2252xA
Advanced LinCMOSRAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED MARCH 2001
OUT
Q17Q15Q13
C1
DD+
V
R5
R6
D1
†
DD–/GND
V
ACTUAL DEVICE COMPONENT COUNT
COMPONENTTLV2252TLV2254
Transistors3876
Resistors3056
Includes both amplifiers and all ESD, bias, and trim circuitry
Diodes918
Capacitors36
†
Q3Q6Q9Q12Q14Q16
equivalent schematic (each amplifier)
4
Q4Q1
Q2Q5Q7Q8Q10Q11
R3R4R1R2
IN+
IN–
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•
TLV225x, TLV225xA
PACKAGE
A
UNIT
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Differential input voltage, V
Input voltage range, V
Input current, I
Output current, I
Total current into V
Total current out of V
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, and PW packages 260°C. . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to V
2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought
below V
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
Unity-gain bandwidthvs Load capacitance58
Overestimation of phase marginvs Load capacitance59
Distribution
vs Common-mode voltage
vs Supply voltage
vs Free-air temperature
vs Supply voltage
vs Free-air temperature
vs Frequency
vs Free-air temperature
vs Frequency
vs Free-air temperature
vs Frequency
vs Free-air temperature
vs Load capacitance
vs Free-air temperature
vs Supply voltage
vs Free-air temperature
vs Frequency
vs Load capacitance
FIGURE
2 – 5
6, 7
13
14
21
22
26, 27
28, 29
32
33
34, 35
36
39
40
54
55
26, 27
56
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
DISTRIBUTION OF TLV2252
INPUT OFFSET VOLTAGE
20
1020 Amplifiers From 1 Wafer Lot
VDD = ±1.5 V
TA = 25°C
15
10
5
Precentage of Amplifiers – %
0
–1.6– 0.800.81.6
VIO – Input Offset Voltage – mV
Figure 2
DISTRIBUTION OF TLV2254
INPUT OFFSET VOLTAGE
35
682 Amplifiers From 1 Wafer Lot
V
= ±1.5 V
DD±
30
TA = 25°C
DISTRIBUTION OF TLV2252
INPUT OFFSET VOLTAGE
20
1020 Amplifiers From 1 Wafer Lot
VDD = ±2.5 V
TA = 25°C
15
10
5
Precentage of Amplifiers – %
0
–1.6– 0.800.81.6
VIO – Input Offset Voltage – mV
Figure 3
DISTRIBUTION OF TLV2254
INPUT OFFSET VOLTAGE
35
682 Amplifiers From 1 Wafer Lot
V
= ±2.5 V
DD±
TA = 25°C
30
25
20
15
10
Percentage of Amplifiers – %
5
0
–1.6–0.800.81.6
VIO – Input Offset Voltage – mV
Figure 4
25
20
15
10
Percentage of Amplifiers – %
5
0
–1.6–0.800.81.6
VIO – Input Offset Voltage – mV
Figure 5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
23
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
1
VDD = 3 V
0.8
RS = 50 Ω
TA = 25°C
0.6
0.4
0.2
0
–0.2
–0.4
– Input Offset Voltage – mV
–0.6
IO
V
–0.8
–1
–101 2
VIC – Common-Mode Input Voltage – V
Figure 6
DISTRIBUTION OF TLV2252 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
62 Amplifiers From 1 Wafer Lot
V
= ±1.5 V
DD±
P Package
20
TA = 25°C to 85°C
†
INPUT OFFSET VOLTAGE
†
vs
COMMON-MODE INPUT VOLTAGE
1
VDD = 5 V
0.8
RS = 50 Ω
TA = 25°C
0.6
0.4
0.2
0
–0.2
–0.4
– Input Offset Voltage – mV
IO
–0.6
V
–0.8
–1
3
–10 1 2 3 45
VIC – Common-Mode Input Voltage – V
Figure 7
†
DISTRIBUTION OF TLV2252 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
62 Amplifiers From 1 Wafer Lot
V
= ±2.5 V
DD±
P Package
20
TA = 25°C to 85°C
†
15
10
Percentage of Amplifiers – %
5
0
–2– 10 12
α
– Temperature Coefficient – µV/°C
VIO
Figure 8
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
15
10
Percentage of Amplifiers – %
5
0
–2– 10 12
α
– Temperature Coefficient – µV/°C
VIO
Figure 9
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
DISTRIBUTION OF TLV2254 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
62 Amplifiers From 1 Wafer Lot
V
= ±1.5 V
DD±
P Package
TA = 25°C to 85°C
20
15
10
Percentage of Amplifiers – %
5
0
–2–10 1 2
α
– Temperature Coefficient
VIO
of Input Offset Voltage – µV/°C
Figure 10
INPUT BIAS AND INPUT OFFSET CURRENTS
vs
FREE-AIR TEMPERATURE
35
V
= ±2.5 V
DD±
VIC = 0
30
VO = 0
RS = 50 Ω
25
DISTRIBUTION OF TLV2254 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
62 Amplifiers From 1 Wafer Lot
V
= ±2.5 V
DD±
P Package
TA = 25°C to 85°C
20
15
10
Percentage of Amplifiers – %
5
0
–2– 10 1 2
α
– Temperature Coefficient
VIO
of Input Offset Voltage – µV/°C
Figure 11
†
2.5
RS = 50 Ω
2
TA = 25°C
1.5
1
INPUT VOLTAGE
vs
SUPPLY VOLTAGE
20
15
10
I
5
IO
I
0
IB
IIB and IIO – Input Bias and Input Offset Currents – pA
I
254565
IB
85
TA – Free-Air Temperature – °C
I
IO
105125
Figure 12
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.5
0
–0.5
– Input Voltage – V
–1
I
V
–1.5
–2
–2.5
11.522.5
| V
| – Supply Voltage – V
DD±
Figure 13
| VIO | ≤5 mV
33.54
25
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
INPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
VDD = 5 V
4
3
2
1
– Input Voltage – V
I
V
0
–1
–55 –35 –15525456585
TA – Free-Air Temperature – °C
| VIO | ≤5 mV
Figure 14
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
1.2
VDD = 3 V
TA = 25°C
1
VIC = 0
0.8
VIC = 0.75 V
0.6
0.4
– Low-Level Output Voltage – V
0.2
OL
V
†‡
VIC = 1.5 V
105 125
‡
V
– Low-Level Output Voltage – V
V
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT CURRENT
3
2.5
2
1.5
1
– High-Level Output Voltage – V
0.5
OH
0
0200400
| IOH | – High-Level Output Current – µA
LOW-LEVEL OUTPUT VOLTAGE
LOW-LEVEL OUTPUT CURRENT
1.4
VDD = 3 V
VIC = 1.5 V
1.2
1
0.8
0.6
0.4
OL
0.2
†‡
vs
VDD = 3 V
TA = –40°C
TA = 25°C
TA = 85°C
TA = 125°C
600800
Figure 15
†‡
vs
TA = 125°C
TA = 85°C
TA = 25°C
TA = – 40°C
0
0123
IOL – Low-Level Output Current – mA
45
Figure 16
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0
012 3
IOL – Low-Level Output Current – mA
Figure 17
45
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4
3
2
– High-Level Output Voltage – V
1
OH
V
0
0200400
| IOH | – High-Level Output Current – µA
Figure 18
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
5
VDD = 5 V
4
†‡
VDD = 5 V
TA = –40°C
TA = 25°C
TA = 85°C
TA = 125°C
600800
RI = 50 kΩ
TA = 25°C
LOW-LEVEL OUTPUT VOLTAGE
†‡
vs
LOW-LEVEL OUTPUT CURRENT
1.4
VDD = 5 V
VIC = 2.5 V
1.2
1
0.8
0.6
0.4
– Low-Level Output Voltage – V
0.2
OL
V
0
01 2 3
TA = 25°C
IOL – Low-Level Output Current – mA
TA = 125°C
TA = 85°C
TA = –40°C
456
Figure 19
‡
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
10
9
8
VID = –100 mV
7
3
VDD = 3 V
2
1
– Maximum Peak-to-Peak Output Voltage – V
O(PP)
0
V
10
2
3
10
f – Frequency – Hz
10
4
10
5
Figure 20
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
6
5
VO = VDD/2
4
TA = 25°C
3
VIC = VDD/2
2
– Short-Circuit Output Current – mA
1
OS
I
0
–1
2345
VDD – Supply Voltage – V
Figure 21
VID = 100 mV
678
27
TLV225x, TLV225xA
‡
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
11
10
9
8
7
6
5
4
3
2
– Short-Circuit Output Current – mA
1
OS
I
0
–1
–75125
VID = –100 mV
VID = 100 mV
–50 –250255075100
TA – Free-Air Temperature – °C
VO = 2.5 V
VDD = ±5 V
Figure 22
DIFFERENTIAL INPUT VOLTAGE
vs
OUTPUT VOLTAGE
1000
Vµ
–200
800
600
400
200
0
VDD = 5 V
VIC = 2.5 V
RL = 50 kΩ
TA = 25°C
†
DIFFERENTIAL INPUT VOLTAGE
vs
OUTPUT VOLTAGE
1000
800
Vµ
600
400
200
0
–200
–400
– Differential Input Voltage –
–600
ID
V
–800
–1000
00.511.5
VO – Output Voltage – V
VDD = 3 V
RI = 50 kΩ
VIC = 1.5 V
TA = 25°C
22.53
Figure 23
‡
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
LOAD RESISTANCE
4
10
V
= 2 V
O(PP)
TA = 25°C
3
10
10
2
VDD = 5 V
VDD = 3 V
†‡
–400
– Differential Input Voltage –
–600
ID
V
–800
–1000
013
245
VO – Output Voltage – V
Figure 24
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
10
– Differential Voltage Amplification – V/mV
VD
A
1
110110
RL – Load Resistance – kΩ
Figure 25
2
10
3
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
VDD = 5 V
RL = 50 kΩ
CL= 100 pF
60
TA = 25°C
†
180°
135°
40
20
0
Voltage Amplification – dB
VD
AVD– Large-Signal Differential
A
–20
–40
3
10
10
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
80
VDD = 3 V
RL= 50 kΩ
CL= 100 pF
60
TA = 25°C
Phase Margin
Gain
4
f – Frequency – Hz
10
5
Figure 26
vs
FREQUENCY
10
90°
45°
0°
–45°
6
10
†
–90°
7
180°
135°
m
om – Phase Margin
φ
40
20
0
Voltage Amplification – dB
VD
AVD– Large-Signal Differential
A
–20
–40
3
10
10
Gain
4
f – Frequency – Hz
10
5
Phase Margin
6
10
10
90°
45°
0°
–45°
–90°
7
m
om – Phase Margin
φ
Figure 27
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
29
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
4
10
VDD = 3 V
VIC = 1.5 V
VO = 0.5 V to 2.5 V
3
10
2
10
Amplification – V/mV
– Large-Signal Differential Voltage
VD
A
1
10
–75125
–50 –250255075100
TA – Free-Air Temperature – °C
RL = 1 MΩ
RL = 50 kΩ
Figure 28
†‡
Amplification – V/mV
– Large-Signal Differential Voltage
VD
A
10
10
10
10
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
4
3
2
1
–50 –250255075100 125
–75
TA – Free-Air Temperature – °C
RL = 50 kΩ
VDD = 5 V
VIC = 2.5 V
VO = 1 V to 4 V
RL = 1 MΩ
Figure 29
†‡
10
‡
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
VDD = 5 V
TA = 25°C
100
Ω
AV = 100
10
AV = 10
– Output Impedance –
1
o
z
5
10
6
0.1
10
AV = 1
2
3
10
f– Frequency – Hz
10
4
Figure 31
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
VDD = 3 V
TA = 25°C
100
Ω
– Output Impedance –
o
z
10
0.1
1
10
AV = 100
AV = 10
AV = 1
2
3
10
f– Frequency – Hz
10
4
Figure 30
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
10
‡
5
10
6
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
CMRR – Common-Mode Rejection Ratio – dB
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
100
VDD = 5 V
VIC = 2.5 V
80
VDD = 3 V
VIC = 1.5 V
60
40
20
0
10
1
2
10
10
f – Frequency – Hz
3
Figure 32
10
4
TA = 25°C
5
10
†
COMMON-MODE REJECTION RATIO
†‡
vs
FREE-AIR TEMPERATURE
94
92
10
90
88
86
84
82
CMMR – Common-Mode Rejection Ratio – dB
6
80
– 75125
– 50 – 250255075100
TA – Free-Air Temperature – °C
VDD = 5 V
VDD = 3 V
Figure 33
– Supply-Voltage Rejection Ratio – dB
SVR
k
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
100
80
60
40
k
10
3
SVR–
10
20
–20
0
10
1
2
10
f – Frequency – Hz
Figure 34
4
VDD = 3 V
TA = 25°C
k
SVR+
5
10
†
SUPPLY-VOLTAGE REJECTION RATIO
†
vs
FREQUENCY
100
10
k
SVR+
80
60
k
40
20
– Supply-Voltage Rejection Ratio – dB
0
SVR
k
–20
6
10
1
SVR–
2
10
f – Frequency – Hz
10
3
10
4
VDD = 5 V
TA = 25°C
5
10
10
6
Figure 35
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
31
TLV225x, TLV225xA
Á
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
– Supply-Voltage Rejection Ratio – dB
SVR
k
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
110
VDD = 2.7 V to 8 V
VIC = VO = VDD /2
105
100
95
90
–50 –250255075100
TA – Free-Air Temperature – °C
Figure 36
†
TLV2252
SUPPLY CURRENT
†
vs
SUPPLY VOLTAGE
120
VO = 0
No Load
100
Aµ
80
60
TA = 25°C
– Supply Current –
40
DD
I
20
125–75
0
012345
VDD – Supply Voltage – V
TA = –40°C
TA = 85°C
678
Figure 37
TLV2254
SUPPLY CURRENT
†
SLEW RATE
vs
SUPPLY VOLTAGE
240
VO = 0
No Load
200
Aµ
160
120
– Supply Current –
80
DD
I
40
0
012345
| V
| – Supply Voltage – V
DD±
TA = –40°C
TA = 85°C
TA = 25°C
678
0.2
VDD = 5 V
AV = –1
0.18
TA = 25°C
0.16
sµ
0.14
V/
0.12
0.1
0.08
SR – Slew Rate –
0.06
0.04
0.02
0
1
10
Figure 38
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
LOAD CAPACITANCE
2
10
CL – Load Capacitance – pF
Figure 39
vs
‡
SR–
SR+
3
10
10
4
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
SLEW RATE
†‡
vs
FREE-AIR TEMPERATURE
0.2
0.16
sµ
V/
0.12
SR+
0.08
SR – Slew Rate –
0.04
0
–50 –250255075100
–75125
TA – Free-Air Temperature – °C
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
AV = 1
SR–
Figure 40
INVERTING LARGE-SIGNAL PULSE
RESPONSE
5
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
4
AV = –1
TA = 25°C
3
†
INVERTING LARGE-SIGNAL PULSE
3
VDD = 3 V
RL = 50 kΩ
CL = 100 pF
2.5
AV = –1
TA = 25°C
2
1.5
1
– Output Voltage – V
O
V
0.5
0
0 102030405060
Figure 41
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
3
VDD = 3 V
RL = 50 kΩ
CL = 100 pF
2.5
AV = 1
TA = 25°C
2
RESPONSE
t – Time – µs
†
70 80 90 100
†
1.5
2
– Output Voltage – V
O
V
1
0
0 102030405060
t – Time – µs
70 80 90 100
Figure 42
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
‡
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
– Output Voltage – V
1
O
V
0.5
0
0 102030405060
Figure 43
70 80 90 100
t – Time – µs
33
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
5
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
4
AV = 1
TA = 25°C
3
2
– Output Voltage – V
O
V
1
0
0 102030405060
Figure 44
INVERTING SMALL-SIGNAL
PULSE RESPONSE
2.65
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
2.6
AV = –1
TA = 25°C
t – Time – µs
†
70 80 90 100
†
INVERTING SMALL-SIGNAL
PULSE RESPONSE
0.95
VDD = 3 V
RL = 50 kΩ
0.9
CL = 100 pF
AV = –1
0.85
0.75
– Output Voltage – V
O
V
0.65
TA = 25°C
0.8
0.7
0.6
0102030
t – Time – µs
Figure 45
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
0.95
0.85
0.9
VDD = 3 V
RL = 50 kΩ
CL = 100 pF
AV = 1
TA = 25°C
†
4050
†
2.55
2.5
O
V
VO – Output Voltage – V
2.45
2.4
0102030
t – Time – µs
4050
Figure 46
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.8
0.75
O
0.7
V
VO – Output Voltage – V
0.65
0.6
0102030
t – Time – µs
Figure 47
4050
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
2.65
VDD = 5 V
RL = 50 kΩ
CL = 100 pF
2.6
AV = 1
TA = 25°C
2.55
2.5
O
V
VO – Output Voltage – V
2.45
2.4
0102030
t – Time – µs
Figure 48
EQUIVALENT INPUT NOISE VOLTAGE
FREQUENCY
60
50
VDD = 5 V
RS = 20 Ω
TA = 25°C
Hz
nV/
vs
†
4050
EQUIVALENT INPUT NOISE VOLTAGE
†
vs
FREQUENCY
60
VDD = 3 V
RS = 20 Ω
50
40
30
20
10
0
10
TA = 25°C
1
2
10
f – Frequency – Hz
10
3
10
4
nV/ Hz
– Equivalent Input Noise Voltage –
n
V
Figure 49
†
1000
VDD = 5 V
f = 0.1 Hz to 10 Hz
750
TA = 25°C
500
INPUT NOISE VOLTAGE OVER
A 10-SECOND PERIOD
†
40
30
20
10
– Equivalent Input Noise Voltage –
n
V
0
10
1
2
10
f – Frequency – Hz
10
3
10
4
Figure 50
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
250
0
–250
Noise Voltage – nV
–500
–750
–1000
0246
t – Time – s
Figure 51
810
35
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
10
†
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
1
AV = 100
0.1
AV = 10
0.01
0.001
4
10
5
THD + N – Total Harmonic Distortion Plus Noise – %
10
1
AV = 1
2
10
f – Frequency – Hz
10
VDD = 5 V
RL = 50 kΩ
TA = 25°C
3
10
4
Figure 53
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
300
260
†‡
VDD = 5 V
f = 10 kHz
RL = 50 kHz
CL = 100 pF
INTEGRATED NOISE VOLTAGE
vs
FREQUENCY
100
Calculated Using Ideal Pass-Band Filter
Low Frequency = 1 Hz
Vµ
Integrated Noise Voltage –
TA = 25°C
10
1
0.1
110110
2
f – Frequency – Hz
10
3
Figure 52
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
220
210
10
†
5
Gain-Bandwidth Product – kHz
220
180
140
100
–50 –250255010075
TA – Free-Air Temperature – °C
Figure 55
200
190
Gain-Bandwidth Product – kHz
180
170
146
0235
VDD – Supply Voltage – V
78
Figure 54
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
125–75
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
TYPICAL CHARACTERISTICS
TLV225x, TLV225xA
75°
TA = 25°C
60°
45°
30°
m
om – Phase Margin
φ
15°
V
I
0°
1
10
200
TA = 25°C
175
PHASE MARGIN
vs
LOAD CAPACITANCE
R
= 100 Ω
null
R
= 50 Ω
null
R
= 10 Ω
null
50 kΩ
V
50 kΩ
DD+
R
null
–
+
V
DD–
10
CL – Load Capacitance – pF
C
2
Figure 56
UNITY-GAIN BANDWIDTH
vs
LOAD CAPACITANCE
GAIN MARGIN
vs
LOAD CAPACITANCE
Gain Margin – dB
20
15
10
5
0
10
R
= 500 Ω
null
R
= 200 Ω
null
R
= 100 Ω
null
R
= 50 Ω
null
R
= 10 Ω
null
R
= 0
null
TA = 25°C
1
2
10
CL – Load Capacitance – pF
10
3
10
4
10
5
R
= 200 Ω
null
R
= 500 Ω
null
R
= 0
null
L
10
3
10
4
Figure 57
OVERESTIMATION OF PHASE MARGIN
vs
LOAD CAPACITANCE
25
TA = 25°C
R
= 500 Ω
null
20
†
150
125
100
75
50
– Unity-Gain Bandwidth – kHz
1
B
25
0
10
1
2
10
CL – Load Capacitance – pF
10
3
10
4
10
5
Figure 58
†
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
15
R
= 100 Ω
null
10
R
= 50 Ω
null
R
= 10 Ω
null
5
Overestimation of Phase Margin
0
1
10
†
See application information
2
10
CL – Load Capacitance – pF
Figure 59
10
R
= 200 Ω
null
3
10
4
10
5
37
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
APPLICATION INFORMATION
driving large capacitive loads
The TLV2252 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 56
and Figure 57 illustrate its ability to drive loads up to 1000 pF while maintaining good gain and phase margins
(R
= 0).
null
A smaller series resistor (R
when driving large capacitive loads. Figure 55 and Figure 56 show the effects of adding series resistances of
10 Ω, 50 Ω, 100 Ω, 200 Ω, and 500 Ω. The addition of this series resistor has two effects: the first adds a zero
to the transfer function and the second reduces the frequency of the pole associated with the output load in the
transfer function.
The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To
calculate the improvement in phase margin, equation 1 can be used.
) at the output of the device (see Figure 60) improves the gain and phase margins
null
∆φ
m1
+
tan
–1
ǒ
2 ×π×UGBW × R
null
× C
Ǔ
L
(1)
Where :
∆φm1+
improvement in phase margin
UGBW+unity-gain bandwidth frequency
+
R
null
C
output series resistance
+
load capacitance
L
The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 58). To
use equation 1, UGBW must be approximated from Figure 58.
Using equation 1 alone overestimates the improvement in phase margin as illustrated in Figure 59. The
overestimation is caused by the decrease in the frequency of the pole associated with the load, providing
additional phase shift and reducing the overall improvement in phase margin.
Using Figure 60, with equation 1 enables the designer to choose the appropriate output series resistance to
optimize the design of circuits driving large capacitance loads.
50 kΩ
V
DD+
50 kΩ
V
I
–
+
V
DD–
/GND
R
null
C
L
38
Figure 60. Series-Resistance Circuit
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 61 are generated using
the TLV2252 typical electrical and operating characteristics at T
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
DDDDDD
= 25°C. Using this information, output
A
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
PSpice and Parts are trademarks of MicroSim Corporation.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
39
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
14
1
0.069 (1,75) MAX
A
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
0.004 (0,10)
DIM
8
7
PINS **
0.010 (0,25)
0.157 (4,00)
0.150 (3,81)
M
0.244 (6,20)
0.228 (5,80)
Seating Plane
0.004 (0,10)
8
14
0.008 (0,20) NOM
0°–8°
16
Gage Plane
0.010 (0,25)
0.044 (1,12)
0.016 (0,40)
A MAX
A MIN
NOTES: A. All linear dimensions are in inches (millimeters).
40
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.197
(5,00)
0.189
(4,80)
0.344
(8,75)
0.337
(8,55)
0.394
(10,00)
0.386
(9,80)
4040047/D 10/96
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
20
22
23
24
25
19
21
1282627
12131415161817
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358
(9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858
(21,8)
1.063
(27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
41
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
J (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE
14 PIN SHOWN
14
1
B
0.100 (2,54)
0.070 (1,78)
0.065 (1,65)
0.045 (1,14)
8
C
7
0.020 (0,51) MIN
0.200 (5,08) MAX
PINS **
DIM
A MAX
A MIN
B MAX
B MIN
C MAX
C MIN
Seating Plane
0.310
(7,87)
0.290
(7,37)
0.785
(19,94)
0.755
(19,18)
0.280
(7,11)
0.245
(6,22)
0.310
(7,87)
0.290
(7,37)
0.785
(19,94)
0.755
(19,18)
0.300
(7,62)
0.245
(6,22)
0.310
(7,87)
0.290
(7,37)
0.910
(23,10)
0.300
(7,62)
0.245
(6,22)
A
20181614
0.310
(7,87)
0.290
(7,37)
0.975
(24,77)
0.930
(23,62)
0.300
(7,62)
0.245
(6,22)
22
0.410
(10,41)
0.390
(9,91)
1.100
(28,00)
0.388
(9,65)
0.130 (3,30) MIN
0.100 (2,54)
0.023 (0,58)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.
0°–15°
0.014 (0,36)
0.008 (0,20)
4040083/B 04/95
42
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.280 (7,11)
0.245 (6,22)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0.310 (7,87)
0.290 (7,37)
Seating Plane
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
4040107/C 08/96
43
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
16
1
0.035 (0,89) MAX
PINS **
DIM
A
9
0.260 (6,60)
0.240 (6,10)
8
0.070 (1,78) MAX
0.020 (0,51) MIN
0.200 (5,08) MAX
A MAX
A MIN
Seating Plane
14
0.775
(19,69)
0.745
(18,92)
16
0.775
(19,69)
0.745
(18,92)
18
0.920
(23.37)
0.850
(21.59)
20
0.975
(24,77)
0.940
(23,88)
0.310 (7,87)
0.290 (7,37)
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
0.010 (0,25)
M
0.125 (3,18) MIN
0°–15°
0.010 (0,25) NOM
14/18 PIN ONL Y
4040049/C 08/95
44
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
58
0.260 (6,60)
0.240 (6,10)
41
0.070 (1,78) MAX
0.020 (0,51) MIN
0.200 (5,08) MAX
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
0.010 (0,25)
M
0.310 (7,87)
0.290 (7,37)
Seating Plane
0°–15°
0.010 (0,25) NOM
4040082/B 03/95
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
45
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0,65
14
1
1,20 MAX
0,30
0,19
8
6,60
4,50
4,30
6,20
7
A
0,15
0,05
M
0,10
Seating Plane
0,10
0,15 NOM
Gage Plane
0,25
0°–8°
0,75
0,50
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
8
3,10
2,90
14
5,10
4,90
16
5,10
20
6,60
6,404,90
24
7,90
7,70
28
9,80
9,60
4040064/E 08/96
46
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
U (S-GDFP-F10) CERAMIC DUAL FLATPACK
0.250 (6,35)
0.246 (6,10)
0.006 (0,15)
0.080 (2,03)
0.050 (1,27)
0.004 (0,10)
0.045 (1,14)
0.026 (0,66)
0.250 (6,35)
1
0.250 (6,35)
5
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
0.300 (7,62)
1.000 (25,40)
0.750 (19,05)
10
0.350 (8,89)0.350 (8,89)
0.250 (6,35)
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
6
0.025 (0,64)
0.005 (0,13)
4040179/B 03/95
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
47
TLV225x, TLV225xA
Advanced LinCMOS RAIL-TO-RAIL
VERY LOW-POWER OPERATIONAL AMPLIFIERS
SLOS185C – FEBRUARY 1997 – REVISED – MARCH 2001
MECHANICAL INFORMATION
W (R-GDFP-F16) CERAMIC DUAL FLATPACK
0.085 (2,16)
0.045 (1,14)
0.440 (11,18)
0.371 (9,42)
0.285 (7,24)
0.245 (6,22)
0.305 (7,75)
0.355 (9,02)0.355 (9,02)
0.235 (5,97)
0.275 (6,99)
161
Base and Seating Plane
0.235 (5,97)
0.006 (0,15)
0.004 (0,10)
0.045 (1,14)
0.026 (0,66)
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL-STD-1835 GDFP1-F16 and JEDEC MO-092AC
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
13-Sep-2005
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.023 (0,58)
0.015 (0,38)
0.280 (7,11)
0.245 (6,22)
0.310 (7,87)
0.290 (7,37)
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
4040107/C 08/96
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MCFP001A – JANUARY 1995 – REVISED DECEMBER 1995
U (S-GDFP-F10)CERAMIC DUAL FLATP ACK
0.280 (7,11)
0.230 (5,84)
0.045 (1,14)
0.026 (0,66)
0.080 (2,03)
0.050 (1,27)
0.250 (6,35)
0.300 (7,62) MAX
1
5
0.250 (6,35)
0.246 (6,10)
10
Base and Seating Plane
0.008 (0,20)
0.004 (0,10)
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
6
4 Places
0.005 (0,13) MIN
0.350 (8,89)0.350 (8,89)
0.250 (6,35)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
4040179/B 03/95
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
20
22
23
24
25
19
21
1282627
12
131415161817
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358
(9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858
(21,8)
1.063
(27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
0.021 (0,53)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
4
0.070 (1,78) MAX
0.020 (0,51) MIN
0.200 (5,08) MAX
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
Seating Plane
M
0.325 (8,26)
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.010 (0,25) NOM
0.430 (10,92)
MAX
4040082/D 05/98
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
1,20 MAX
14
0,30
0,19
8
4,50
4,30
PINS **
7
Seating Plane
0,15
0,05
8
1
A
DIM
14
0,10
6,60
6,20
M
0,10
0,15 NOM
0°–8°
2016
Gage Plane
24
0,25
0,75
0,50
28
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4040064/F 01/97
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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