TEXAS INSTRUMENTS TLC59025 Technical data

TLC59025
www.ti.com
...................................................................................................................................................................................................... SLVS934 – JUNE 2009
LOW-POWER 16-CHANNEL CONSTANT-CURRENT LED SINK DRIVER
1

FEATURES

Matches Industry Standard IOUT to External 3.3-V to 5-V Supply Voltage
Resistor Ratio
Constant Output Current Invariant to Load Protection
Voltage Change
Excellent Output Current Accuracy:
Between Channels: < ± 5% (Max) – Between ICs: < ± 6% (Max)
Constant Output Current Range:
3 mA to 45 mA
Output Current Adjusted By External Resistor
Fast Response of Output Current, OE (Min):
100 ns
30-MHz Clock Frequency

DESCRIPTION/ORDERING INFORMATION

The TLC59025 is designed for LED displays and LED lighting applications. The TLC59025 contains a 16-bit shift register and data latches, which convert serial input data into parallel output format. At the TLC59025 output stage, 16 regulated-current ports provide uniform and constant current for driving LEDs within a wide range of VF variations. Used in system design for LED display applications (e.g., LED panels), the TLC59025 provides great flexibility and device performance. Users can adjust the output current from 3 mA to 45 mA through an external resistor, R at the output port. The high clock frequency, 30 MHz, also satisfies the system requirements of high-volume data transmission.
, which gives flexibility in controlling the light intensity of LEDs. TLC59025 is designed for up to 17 V
ext
Thermal Shutdown for Overtemperature
ESD Performance: 1-kV HBM

APPLICATIONS

Gaming Machine / Entertainment
General LED Applications
LED Display Systems
Signs LED Lighting
White Goods
The serial data is transferred into TLC59025 via SDI, shifted in the shift register, and transferred out via SDO. LE can latch the serial data in the shift register to the output latch. OE enables the output drivers to sink current.
ORDERING INFORMATION
T
A
PW Reel of 2000 TLC59025IPWR PREVIEW
– 40 ° C to 85 ° C W-SOIC DW Reel of 2000 TLC59025IDWR PREVIEW
SSOP DBQ Reel of 2000 TLC59025IDBQR TLC59025
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com .
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(1)
Copyright © 2009, Texas Instruments Incorporated
SDO
VDD
R-EXT
OE
LE
CLK
SDI
CONTROL
LOGIC
I/O REGULATOR
CONFIGURATION
LATCHES
OUTPUT DRIVER
16-BIT SHIFT
REGISTER
8
16
8
16
16
16
OUT15
OUT14OUT0 OUT1
16-BIT OUTPUT
LATCH
TLC59025
SLVS934 – JUNE 2009 ......................................................................................................................................................................................................
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BLOCK DIAGRAM
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1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
SDI
CLK
LE OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7
VDD R-EXT SDO OE OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8
DBQ, DW, OR PWP PACKAGE
(TOP VIEW)
TLC59025
www.ti.com
OUT0– OUT15 Constant-current outputs
...................................................................................................................................................................................................... SLVS934 – JUNE 2009
TERMINAL
NAME
CLK Clock input for data shift on rising edge
GND Ground for control logic and current sink
Data strobe input
LE
OE
R-EXT Input used to connect an external resistor (R
SDI Serial-data input to the Shift register SDO Serial-data output to the following SDI of next driver IC or to the microcontroller VDD Supply voltage
Serial data is transferred to the respective latch when LE is high. The data is latched when LE goes low. LE has an internal pull-down resistor.
Output enable When OE is active (low), the output drivers are enabled. When OE is high, all output drivers are turned OFF (blanked). OE has an internal pullup resistor.
Terminal Descriptions
DESCRIPTION
) for setting output currents
ext
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1 2 30 4 6 75 9 10 118 12 14 1513
0
1
off
on
off
on
off
on
off
on
off
on
Don't care
CLK
OE
LE
SDI
OUT0
OUT1
OUT2
OUT3
OUT15
SDO
TLC59025
SLVS934 – JUNE 2009 ......................................................................................................................................................................................................
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Timing Diagram

CLK LE OE SDI OUT0... OUT15... OUT15 SDO
H L Dn Dn...Dn 7...Dn 15 Dn 15 L L Dn + 1 No change Dn 14 H L Dn + 2 Dn + 2...Dn 5...Dn 13 Dn 13 X L Dn + 3 Dn + 2...Dn 5...Dn 13 Dn 13 X H Dn + 3 off Dn 13
Figure 1. Timing Diagram
Truth Table in Normal Operation
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TLC59025
www.ti.com
...................................................................................................................................................................................................... SLVS934 – JUNE 2009

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
V
DD
V
I
V
O
I
OUT
I
GND
T
A
T
J
T
stg
Supply voltage 0 7 V Input voltage – 0.4 V Output voltage – 0.5 20 V Output current 45 mA GND terminal current 750 mA Operating free-air temperature range – 40 125 ° C Operating virtual-junction temperature range – 40 150 ° C Storage temperature range – 55 150 ° C

Power Dissipation and Thermal Impedance

P
D
θ
JA
Power dissipation DW package 2.2 W
Thermal impedance, junction to free air
Mounted on JEDEC 4-layer board (JESD 51-7), No airflow, TA= 25 ° C, TJ= 125 ° C
Mounted on JEDEC 1-layer board (JESD 51-3), No airflow
Mounted on JEDEC 4-layer board (JESD 51-7), No airflow
MIN MAX UNIT
MIN MAX UNIT
DBQ package 1.6
PW package 1.1 DBQ package 99.8 DW package 80.5 PW package 118.8 DBQ package 61.0 DW package 45.5 PW package 87.9
+ 0.4 V
DD
° C/W
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TLC59025
SLVS934 – JUNE 2009 ......................................................................................................................................................................................................

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
V
DD
V
O
I
O
I
OH
I
OL
V
IH
V
IL
t
R
t
F
Supply voltage 3 5.5 V Output voltage OUT0 to OUT15 17 V
Output current DC test circuit mA
High-level output current SDO – 1 mA Low-level output current SDO 1 mA High-level input voltage CLK, OE, LE, and SDI 0.7 × V Low-level input voltage CLK, OE, LE, and SDI GND 0.3 × V Rise time CLK 500 ns Fall time CLK 500 ns

Recommended Timing

V
= 3 V to 5.5 V (unless otherwise noted)
DD
t
w(L)
t
w(CLK)
t
w(OE)
t
su(D)
t
h(D)
t
su(L)
t
h(L)
f
CLK
LE pulse duration 15 ns CLK pulse duration 15 ns OE pulse duration 300 ns Setup time for SDI 3 ns Hold time for SDI 2 ns Setup time for LE 5 ns Hold time for LE 5 ns Clock frequency Cascade operation 30 MHz
TEST CONDITIONS MIN MAX UNIT
VO≥ 0.6 V 3 VO≥ 1 V 45
DD
V
MIN MAX UNIT
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V
DD
V
DD
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...................................................................................................................................................................................................... SLVS934 – JUNE 2009

Electrical Characteristics

V
= 3 V, TJ= 40 ° C to 125 ° C (unless otherwise noted)
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
DD
V
O
I
O
I
OH
I
OL
V
IH
V
IL
I
leak
V
OH
V
OL
I
O(1)
I
O(2)
I
OUT
V
OUT
T
sd
T
hys
I
DD
C
IN
(1) Specified by design
Input voltage 3 5.5 V Output voltage 17 V
Output current mA
High-level output current, source -1 Low-level output current, sink 1 High-level input voltage 0.7 × V Low-level input voltage GND 0.3 × V
Output leakage current V
High-level output voltage SDO, IOL= – 1 mA V Low-level output voltage SDO, IOH= 1 mA 0.4 V Output current 1 V
Output current error, die-die ± 3 ± 6 % Output current error, IOL= 13 mA, VO= 0.6 V, R
channel-to-channel TJ= 25 ° C Output current 2 VO= 0.8 V, R
Output current error, die-die ± 3 ± 6 % Output current error, IOL= 26 mA, VO= 0.8 V, R
channel-to-channel TJ= 25 ° C
vs Output current vs
output voltage regulation Pullup resistance OE 500 k
Pulldown resistance LE 500 k Overtemperature shutdown Restart temperature hysteresis 15 ° C
Supply current R
Input capacitance VI= V
VO≥ 0.6 V 3 VO≥ 1 V 45
DD
= 17 V µ A
OH
= 0.6 V, R
OUT
IOL= 13 mA, VO= 0.6 V, R TJ= 25 ° C
ext
IOL= 26 mA, VO= 0.8 V, R TJ= 25 ° C
TJ= 25 ° C 0.5 TJ= 125 ° C 2
0.4 V
DD
= 1440 13 mA
ext
= 1440 ,
ext
= 1440 ,
ext
= 720 26 mA
= 720 ,
ext
= 720 ,
ext
VO= 1 V to 3 V, IO= 13 mA ± 0.1 V
= 3.0 V to 5.5 V, IO= 13 mA to 45 mA ± 1
DD
(1)
R
= Open 7 10
ext
= 1440 9 12 mA
ext
R
= 720 11 13
ext
or GND, CLK, SDI, SDO, OE 10 pF
DD
150 175 200 ° C
V
DD DD
± 1.5 ± 5 %
± 1.5 ± 5 %
mA
V
%/V
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