Texas Instruments TLC3578EVM User Manual

TLC3578EVM Family

User’ s Gu ide

August 2003 Data Acquisition−Digital/Analog Converters

SLAU1 10

IMPORTANT NOTICE

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Copyright  2003, Texas Instruments Incorporated

EVM IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION

PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.

Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR S TATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.

TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.

Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.

Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any

machine, process, or combination in which such TI products or services might be or are used.

Mailing Address:

Texas Instruments
Post Office Box 655303
Dallas, Texas 75265

Copyright  2003, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the input voltage range of 15 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible

damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than
60°C. The EVM is designed to operate properly with certain components above 60°C as long
as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.

Mailing Address:

Texas Instruments
Post Office Box 655303
Dallas, Texas 75265

Copyright  2003, Texas Instruments Incorporated

About This Manual

How to Use This Manual

Preface

Read This First

This user’s guide describes the characteristics, operation, and use of
the following evaluation boards:

- TLC3578 EVM Bipolar-Input, 8-channel 14-bit serial analog-to-digital

converter

- TLC3574 EVM Bipolar-Input, 4-channel 14-bit serial analog-to-digital

- TLC3548 EVM Unipolar-Input, 8-channel 14-bit serial analog-to-digital

- TLC3544 EVM Unipolar-Input, 4-channel 14-bit serial analog-to-digital

- TLC2578 EVM Bipolar-Input, 8-channel 12-bit serial analog-to-digital

- TLC2574 EVM Bipolar-Input, 4-channel 12-bit serial analog-to-digital

A complete circuit description as well as schematic diagram and bill of
materials is included. Contact the Product Information Center or e-mail

[e-mail]

How to Use This Manual

This document contains the following chapters:

- Chapter 1—EVM Overview

- Chapter 2—Analog Interface

converter

converter

converter

converter

converter

for questions regarding this EVM.

- Chapter 3—Digital Interface

- Chapter 4—Power Supply

- Chapter 5—Getting the Most From Your EVM

- Chapter 6—Bill of Materials, Board Layouts, and Schematic

v

Trademarks

FCC Warning

This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.

Trademarks

TI logo is a trademark of Texas Instruments.

Related Documentation From Texas Instruments

To obtain a copy of any of the following TI documents, call the Texas
Instruments Literature Response Center at (800) 477−8924 or the Product
Information Center (PIC) at (972) 644−5580. When ordering, please identify
this booklet by its title and literature number. Updated documents can also be
obtained through our website at www.ti.com.

Data Sheets Literature Number

TLC3578 SLAS262
TLC3574
TLC2578
TLC2574
TLC3548 SLAS266
TLC3544

OPA132 PDS1309

REF3040 SBVS032
REF3033

vi

Contents

Contents

1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Analog Interface 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Analog Interface Block Diagram 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Signal Conditioning 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Single Supply Operation 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Physical Pinout Description 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5 Reference Voltage 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.6 Configuration Options 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 Digital Interface 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Physical Pinout Description 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 Power Supply 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5 Getting the Most From Your EVM 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1 Additional Hardware Options 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1.1 Stand-Alone EVM 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1.2 DSP Interface 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1.3 MSP430 Microcontroller interface 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6 Bill of Materials, Board Layouts, and Schematic 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.1 Bill of Materials for EVM 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2 Board Layouts 6-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3 EVM Schematic 6-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

vii

Contents

Figures

2−1 Block Diagram 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5−1 EVM Selection 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5−2 DSK-To-EVM Stackup Diagram 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−1 Top Layer 6-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−2 Internal Plane 1 6-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−3 Internal Plane 2 6-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−4 Bottom Layer (Mirrored) 6-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables

2−1 Analog Input Pinout Description 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2−2 ADC Reference Voltage 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2−3 Jumper Settings 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−1 Digital Signal Pinout Description 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4−1 Power Connector Pinout Description 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

viii

Chapter 1

EVM Overview

Each evaluation board is based on the equivalent ADC. All ADCs use a
synchronous serial interface which can be simply interfaced to many micro­controllers using the SPI protocol.

Each EVM also incorporates a stable voltage reference, and operational
amplifier to ensure a low-noise voltage reference for the ADC.

Topic Page

1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EVM Overview

1-1

Features

1.1 Features

- Evaluation board featuring one of the following:
J TLC3578 ADC (order TLC3578 EVM)
J TLC3574 ADC (order TLC3574 EVM)
J TLC3548 ADC (order TLC3548 EVM)
J TLC3544 ADC (order TLC3544 EVM)
J TLC2578 ADC (order TLC2578 EVM)
J TLC2574 ADC (order TLC2574 EVM)

- Onboard reference, with recommended buffer circuitry

- Suggested signal conditioning circuitry for 1 channel only

1-2

Chapter 2

Analog Interface

Topic Page

2.1 Analog Interface Block Diagram 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Signal Conditioning 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Single Supply Operation 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Physical Pinout Description 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5 ADC Reference Voltage 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.6 Configuration Options 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog Interface

2-1

Analog Interface Block Diagram

2.1 Analog Interface Block Diagram

A block diagram for the analog interface of the EVM is shown in Figure 2−1.

Figure 2−1.Block Diagram

P1 / J1

The channels are arranged to comply with the EVM standard developed for
data converters. This standard defines eight channels of analog I/O on each
EVM module.

2.2 Signal Conditioning

The facility exists for the signal connected to channel 0 to be conditioned via
an operational amplifier. The amplifier present on the EVM operates from a
dual power supply and is configured with a gain of +1.

If signal conditioning is not required, it can easily be bypassed via a shorting
bar.

Signal

Conditioning

TLC3578
TLC3574
TLC3548
TLC3544
TLC2578
TLC2574

2.3 Single Supply Operation

Should the user wish to operate the amplifier from a single suply rail, this is also
possible by simply removing the dual supply amplifier and replacing it with a
suitable single supply alternative, for example the OPA353.

The suggested procedure is detailed below:

- Carefully desolder amplifier, U1

- Replace with a suitable single-supply alternative, for example TI part num-

ber OPA353UA

- Install appropriate resistor at R9

- Install appropriate capacitor at C11

- Install shorting bar at W1

2-2

2.4 Physical Pinout Description

Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P
provide a convenient 10-pin dual row header/socket combination at P1. This
header/socket provides access to the analog input pins of the TLV2553/6.

Physical Pinout Description

Consult Samtec at www.samtec.com

or 1−800−SAMTEC−9 for a variety of

mating connector options.

Table 2−1.Analog Input Pinout Description

Pin Number
Header Socket

P1.2 J1.2 CH0 Channel 0 input, can be direct from P1/J1 connector or through Op-Amp
P1.4 J1.4 CH1 Channel 1 input, direct from P1/J1 connector
P1.6 J1.6 CH2 Channel 2 input, direct from P1/J1 connector
P1.8 J1.8 CH3 Channel 3 input, direct from P1/J1 connector
P1.10 J1.10 CH4 Channel 4 input, direct from P1/J1 connector
P1.12 J1.12 CH5 Channel 5 input, direct from P1/J1 connector
P1.14 J1.14 CH6 Channel 6 input, direct from P1/J1 connector
P1.16 J1.16 CH7 Channel 7 input, direct from P1/J1 connector
P1.18 J1.18 REF− External Reference negative input
P1.20 J1.20 REF+ External Reference positive input

Signal Description

2.5 Reference Voltage

The accuracy of conversion from a SAR ADC depends directly upon the
accuracy of the reference voltage. It is very important, therefore, that the
reference be stable, accurate and low drift.

The ADC reference pin presents a dynamic capacitive load to the amplifier.
The voltage supplied to the ADC must be capable of driving this dynamic load
properly, ensuring that the reference remain stable regardless of load.

The bipolar and unipolar devices are specified to use a different voltage for the
reference pin.

Table 2−2.ADC Reference Voltage

ADC Reference Voltage

Bipolar input

TLC3578 3.3 V
TLC3574 3.3 V
TLC2578 3.3 V
TLC2574 3.3 V

Unipolar input

TLC3548 4.096 V
TLC3544 4.096 V

Analog Interface

2-3

Configuration Options

2.6 Configuration Options

There are a number of options available via shorting jumpers. These are
detailed below:

Table 2−3.Jumper Settings

Factory Set

Reference

Designator

Designator

W1 Single supply operation Not installed
W2 Select negative supply for op amp −Vs AGND (0 V)
W3 Select positive supply for op amp +Vs +Vcc (5 V)
W4 Select signal source for channel 0 Signal is via op amp Signal is directly from P1.2
W5 Select positive voltage reference Onboard reference Reference via P1.18
W6 Select digital power 5 V 3.3 V
W7 Select negative voltage reference Onboard reference Reference via P1.20
W8 CSTART, initiate manual conversion Disabled Enabled
W9 FS mode Disabled Enabled
W10 Device always selected Disabled Enabled

Description

Condition

Position

1−2 2−3

Optional Position

2-4

Chapter 3

Digital Interface

The digital interface for the EVM is simply the appropriate digital signals from
the ADC routed and presented to the 20-pin digital interface connector.

Topic Page

3.1 Physical Pinout Description 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital Interface

3-1

Physical Pinout Description

3.1 Physical Pinout Description

The EVM is designed for easy interfacing to multiple platforms. Samtec part
numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a
convenient 10-pin dual row header/socket combination.

This header/socket combination provides access to the digital control and
serial data pins of the EVM. Consult Samtec at www.samtec.com
1−800−SAMTEC−9 for a variety of mating connector options.

Table 3−1.Digital Signal Pinout Description

or

Pin Number

Header Socket

P3.1 J3.1 CS Chip select selects the device for data transfer.
P3.3 J3.3 SCLK/CLKX Data transfer clock
P3.5 J3.5 Reserved
P3.7 J3.7 FSX
P3.9 J3.9 FSR
P3.11 J3.11 SDI Serial data into the device
P3.13 J3.13 SDO Serial data out of the device
P3.15 J3.15 EOC or INT/EOC†Selects either EOC or INT − see data sheet for details.
P3.17 J3.17 Reserved
P3.19 J3.19 CSTART Control the beginning of a conversion

†

Programmable as either EOC or INT

Signal Description

3-2

Chapter 4

Power Supply

The EVM accepts four power supplies.

- A dual ± Vs dc supply for the dual-supply op-amps.

- A single 5.0 V dc supply for the analog section of the ADC.

- A single 3.3 V to 5 V dc supply for the digital section of the ADC.

There are two ways to provide these voltages.

- Hook-up the test points on the EVM. The test points are clearly labeled

+Vdd (3.3 V to 5 V), +5VA, +Vs (up to 18 V depending upon the amplifiers)
and –Vs (up to –18 V depending upon the amplifiers).

- Use the power connector P5/J5 and derive the voltages elsewhere.

The pinout for this connector is shown in Table 4−1.

Table 4−1.Power Connector Pinout Description

Signal P5/J5 Pin Number Signal

+VA 1 2 −VA

+5VA 3 4 −5VA

AGND 5 6 DGND
+1.8VD 7 8 VD1
+3.3VD 9 10 +5VD

Power Supply

4-1

4-2

Chapter 5

Getting the Most From Your EVM

A wide range of prototyping options and software solutions are available from
TI, and offer additional flexibility, reducing your time-to-market. Hardware and
software offerings from TI help you easily get from concept to hardware and
software prototype.

Topic Page

5.1 Additional Hardware Options 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Getting the Most From Your EVM

5-1

Additional Hardware Options

5.1 Additional Hardware Options

In general there are three hardware directions that the user can take with the
EVM.

5.1.1 Stand-Alone EVM

The EVM can be used on its own. Using the EVM in this manner obliges the
user to provide a custom digital interface between the EVM and a host system.
Users are entirely responsible for ensuring proper timing requirements are met
in addition to providing any glue logic necessary. Users must also provide the
necessary analog interface and supply power to the EVM.

5.1.2 DSP Interface

Depending upon the DSP that the user chooses, there are a number of TI
DSKs available. DSKs are D
starter system. They contain all the necessary hardware and software to
quickly begin prototype construction.

For example, the TMS320C6711 DSP starter kit includes the DSK hardware,
a parallel port cable to connect to a PC, a 5-V universal power supply, and a
Code Composer Studio CD-ROM containing all the necessary software.

SP Starter Kits, and provide users with a DSP

Each family of DSKs provides different physical interface options. These
interface options enable address, data, and control signals to be decoded and
used by mezzanine-level cards (such as EVMs).

To connect this EVM to any DSK requires selection of the correct interface
card. Generally the procedure is outlined below.

- Select the DSP you wish to use.

- Select the appropriate DSK.

- Select the suitable interface card.

As an example, assume that the user wishes to use the TLC3578 EVM with
the TMS320C6711 DSP, the steps that should be taken are shown below
following a side-elevation of the boards required.

5-2

Figure 5−1.EVM Selection

Additional Hardware Options

TMS320C2000

Interface Card

TLC3574 EVM

TMS320C6711

DSP

1. Select DSP 2. Select DSK 3. Select Interface Card.

TMS320C6711

DSK

TMS320C3000

Interface Card

TMS320C5K / 6K

Interface Card

Figure 5−2.DSK-To-EVM Stackup Diagram

C5K / 6K

Interface Card

Amplifier Site

TLC3578 EVM

TLC3544 EVM

TLC3548 EVM

TLC3578 EVM

TLC3574 EVM

Evaluation Module Site

C5K / 6K

Interface Card

DSK

5.1.3 MSP430 Microcontroller interface

TI also offer a range of low-power microcontrollers that have an SPI
interface. You can check-out these devices and order evaluation
modules at www.ti.com

A microcomputer evaluation board exists, featuring the MSP430F449
that also enables the ADC EVMs to be connected directly.

The HPA449 evaluation board, available from Softbaugh

www.softbaugh.com

80-Pin DSK Common Connector

includes the following features:

Getting the Most From Your EVM

5-3

5-4

Chapter 6

Bill of Materials, Board Layouts, and

Schematic

This chapter contains the EVM bill of materials, board layouts and schematics.

Topic Page

6.1 Bill of Materials for EVM 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2 Board Layouts 6-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3 EVM Schematic 6-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Bill of Materials, Board Layouts, and Schematic

6-1

Bill of Materials for EVM

6.1 Bill of Materials for EVM

Item

no.

1 1 0R R19 Resistor, 0−Ω 1/16 W 5%
2 2 0R R8, R17 Resistor, 0−Ω 1/8 W 5%
3 1 10R R15 Resistor 10−Ω 1/8 W 5%
4 9 33R R1, R2, R3,

5 4 100R R10, R11,
6 2 10 KΩ R16, R18 Resistor, 10−kΩ, 1/8 W
7 1 10 pF C3 Capacitor, 10−pF 50 V
8 8 0.1 µF C1, C13, C15,

9 8 27 nF C4, C5, C6,

10 1 1 µF C18 Capacitor, 1 −ìF 10 V J
11 1 10 µF C17 Capacitor, 1 0 −µF 16 V
12 4 10 µF C2 C12 C19
13 2 W1, W10 2−pin header Samtec TSW−102−07−L−S

14 8 W2, W3, W4,

15 1 P5 10−Pin header Samtec TSM−105−01−T−DV−
16 1 J5 10−Socket strip Samtec SSW−105−22−F−D−
17 4 P1 P2 P3 P4 20−Pin header Samtec TSM−110−01−T−DV−
18 4 J1 J2 J3 J4 20−Socket strip Samtec SSW−110−22−F−D−
19 3 FB1, FB2,
20 2 OPA132UA U1, U3 IC, FET−input op amp,
21 1 REF3033 U2 IC voltage reference,

Qty Value Ref Des Description Vendor Part number

Panasonic ERJ−2GE0R00X

0402 SMD

Panasonic ERJ−8GEY0R00V

1206 SMD

Panasonic ERJ−8GEYJ100V

1206 SMD

R4, R5, R6,
R7, R12, R13

R20, R21

C16, C20,
C22, C23,
C24

C7, C8, C9,
C10, C14

C21

W5, W6, W7,
W8, W9

FB3

Resistor, 3 3 −Ω 1/8 W 5%
1206 SMD

Resistor, 100−Ω 1/8 W 5%
1206 SMD

5% 1206 SMD
Ceramic chip, 0805 SMD

Capacitor, . 1 −µF 25 V
Ceramic, X7R 0805

Capacitor, 27000−pF 50 V,
Ceramic, X7R 0805

Ceramic X5R 0805
tantalum, TE series

Capacitor, 1 0 −µF 16 V,
VS electrolytic, SMD

3−Pin header Samtec TSW−103−07−L−S

Fair−Rite SM beads
#24−−44447

8−SOIC

3.33−V LP SOT−23

Panasonic ERJ−8GEYJ330V

Panasonic ERJ−8GEYJ101V
Panasonic ERJ−8GEYJ103V
Panasonic ECJ−2VC1H100D
Panasonic ECJ−2VB1E104K

Panasonic ECJ−2VB1H273K

Panasonic ECJ−2YB1A105K
Panasonic ECS−T1CX106R
Panasonic ECE−V1CA100SR

P
VS−K
P
VS−K

Fair-Rite 2744044447
Texas

Instruments
Texas
Instruments REF3033AIDBZT

OPA132UA

Contingent on

Item 22

6-2

REF3040 U2 IC, voltage reference,

4.096−V, LP SOT−23

Texas
Instruments

REF3040AIDBZT

Bill of Materials for EVM

22 1 TLC3578 U4 IC, A/D 8−CH, 14−BIT,

LP 24−TSSOP

Alternate TLC3574 U4 IC, A/D, 4−Ch, 14−bit

LP 20−TSSOP

Alternate TLC3548 U4 IC, Unipolar A/D 8−CH

24−SOIC

Alternate TLC3544 U4 IC, Unipolar A/D 4−CH

20−SOIC

Alternate TLC2578 U4 IC, Serial out A/D 8−CH

24−SOIC

Alternate TLC2574 U4 IC, Serial out A/D 4−CH

20−TSSOP

23 2 SN74LVC1

G07

U5, U6 Single IC buffer driver

with open drain o/p

24 1 TLC3578 Rev A PWB Texas

Texas
Instruments
Texas
Instruments
Texas
Instruments
Texas
Instruments
Texas
Instruments
Texas
Instruments
Texas
Instruments

TLC3578IPW
TLC3574IPW
TLC3548IPW
TLC3544IPW
TLC2578IPW
TLC2574IPW
SN74LVC1G07DBVR
6448024

Instruments

25 4 TP_.025 +5VA, +VA,

−VA, Vdd

Test Point − Single .025”
Pin

Keystone
Electronics

5000

26 2 TP_turret AGND, DGND Turret terminal test point Cambion 180−7337−02−05

1 Not

R14 * * *

Installed

1 Not

C11 * * *

Installed

1 Not

R9 * * *

Installed

Bill of Materials, Board Layouts, and Schematic

6-3

Board Layouts

6.2 Board Layouts

Figure 6−1.Top Layer

6-4

Figure 6−2.Internal Plane 1

Board Layouts

Figure 6−3.Internal Plane 2

Bill of Materials, Board Layouts, and Schematic

6-5

Board Layouts

Figure 6−4.Bottom Layer (Mirrored)

6-6

6.3 EVM Schematic

The EVM schematic is a PDF attachment following this page.

EVM Schematic

Bill of Materials, Board Layouts, and Schematic

6-7

654321

REV ECN Number Approved

Revision History

D

P1

1
3
5
7
9
11
13
15

C

AGND

17
19

2
4
6

8
10
12
14
16
18
20

CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
REF­REF+

TLC3578
TLC3578.sch

R17
0R

CS*
CLKX

FSX
FSR
DATA_IN
B_DATA_OUT
B_INT*/EOC

GPIO_1

P3

1
3
5
7
9
11
13
15
17
19

2
4
6

8
10
12
14
16
18
20

DGND

D

C

B

PWR & REF
PWR & REF.sch

A

B

A

ti

12500 TI Boulevard. Dallas, Texas 75243

Title:

Engineer:

Joe Purvis

Drawn By:

Joe Purvis

FILE: SIZE:DATE:

1 2 3 4 5 6

TLC3578 EVM Block Diagram

TLC3578 EVM Block Diagram

DOCUMENTCONTROL #

21-Aug-2003

6448025

REV:

SHEET: OF:

1 3

2

654321

REV ECN Number Approved

GPIO_1

FSX

FS

D

C

B

A

W1

AGND

1 2 3 4 5 6

R9

Not Installed

CH0

CH1

CH2

CH3

CH4

CH5

Amplifier +Supply

2

3

Amplifier -Supply

C11

Not Installed

R8

0R

CH0

W4

R12

R2
33R

R1
33R

33R

AGND

AGND

C5
27nF

C4
27nF

AGND

C14
27nF

C20

0.1uF

9
10
11
12
13
14

15
16

21

AGND

AIN0
AIN1
AIN2

AIN3
AIN4
AIN5
AIN6
AIN7

COMP

74

R7
33R

R6
33R

R5
33R

R4
33R

R3
33R

AGND

AGND

AGND

AGND

AGND

Output

U1

6

C10
27nF

C9
27nF

C8
27nF

C7
27nF

C6
27nF

CH6

CH7

-In

+In

+5V_s

17

AVdd

AGND

22

W9

23

AVdd

AGND

18

DVdd

7

DVdd

SCLK

CSTART*

INT* / EOC

REFP

REFM

DGND

6

DGND

R18

10K

U4

CS*

FS

SDI

SDO

TLC3578

DVdd

8
2

R13

BCLK

1
3
5
24

4

19

20

33R

REF_P

REF_M

REF_P

REF_M

CS*

CS*
FS
CLKX
DATA_IN
DATA_OUT
CSTART*

INT*/EOC

C15

0.1uF

W10

2 4

C18
1uF

DGND

2 4

U5A

A Y

SN74LVC1G07

W5

+ C17

10uF

CSTART*

U6A

A Y

SN74LVC1G07

B_INT*/EOC

REF+

VREF+
REF-

W7

AGND

W8

R16

10K

B_DATA_OUT

Engineer:

Joe Purvis

Drawn By:

Joe Purvis

FILE: SIZE:DATE:

TLC3578.sch

DVdd

DVdd DVdd

R20

100R

Title:

DOCUMENTCONTROL #

R21

100R

12500 TI Boulevard. Dallas, Texas 75243

TLC3578

21-Aug-2003

Revision History

ti

6448025 2

SHEET: OF:

2

D

C

B

A

REV:

3

654321

REV ECN Number Approved

DGND

R15
10R

C21
10uF

DGND

U6B

1

NC

3

GND

SN74LVC1G07

Vdd

Vcc

5

DVdd

C24

0.1uF

W6

+3.3V_D

+5V_D

DGND AGND

+5VA

C16

0.1uF

AGND

+VA

12345678910

P5

-VA

C13

0.1uF

AGND

C1

0.1uF

AGND

+

+5VA

+

+

C19
10uF

+VA

C12
10uF

-VA

C2
10uF

FB3

FB2

FB1

+5V_s

+V_s

-V_s

W3

W2

AGND

Amplifier +Supply

Amplifier -Supply

C3

10pF

R11
100R

R19

R14

AGND DGND

Not Installed

U5B

Vcc

5

DVdd

C23

0.1uF

DVdd

C22

0.1uF

+

1

NC

3

DGND

GND

D

C

SN74LVC1G07

Revision History

D

C

0R

Amplifier +Supply

2

U2

B

P2

1
3
5
7

9
11
13
15
17
19

A

2
4
6
8

10
12
14
16
18
20

P4

1
3
5
7

9
11
13
15
17
19

2
4
6
8

10
12
14
16
18
20

+5V_s

AGND

3

IN1OUT

GND

REF3040

2

3

Amplifier -Supply

74

-In

+In

U3

Output

6

R10

100R

VREF+

DGNDAGND

B

A

ti

12500 TI Boulevard. Dallas, Texas 75243

Title:

Engineer:

Joe Purvis

Drawn By:

Joe Purvis

1 2 3 4 5 6

FILE: SIZE:DATE:

PWR & REF.sch

TLC3578 EVM Power & Reference

DOCUMENTCONTROL #

21-Aug-2003

6448025

REV:

SHEET: OF:

3 3

2