0°C to 70°C...3 V to 16 V
–40°C to 85°C...4 V to 16 V
–55°C to 125°C...4 V to 16 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix types)
D
Low Noise...Typically 25 nV/√Hz at
f = 1 kHz
D
Output Voltage Range Includes Negative
Rail
D
High Input impedance...1012 Ω Typ
D
ESD-Protection Circuitry
D
Small-Outline Package Option Also
Available in Tape and Reel
D
Designed-in Latch-Up Immunity
description
The TLC272 and TLC277 precision dual
operational amplifiers combine a wide range of
input offset voltage grades with low offset voltage
drift, high input impedance, low noise, and speeds
approaching that of general-purpose BiFET
NC
1IN–
NC
1IN+
NC
NC – No internal connection
30
473 Units Tested From 2 Wafer Lots
VDD = 5 V
TA = 25°C
25
P Package
20
FK PACKAGE
(TOP VIEW)
DD
1OUT
NC
NC
GND
V
NC
18
17
16
15
14
NC
2IN +
NC
2OUT
NC
2IN–
NC
NC
3 2 1 20 19
4
5
6
7
8
910111213
NC
DISTRIBUTION OF TLC277
INPUT OFFSET VOLTAGE
devices.
These devices use T exas instruments silicon-gate
15
LinCMOS technology, which provides offset
voltage stability far exceeding the stability
available with conventional metal-gate pro-
10
Percentage of Units – %
cesses.
The extremely high input impedance, low bias
5
currents, and high slew rates make these costeffective devices ideal for applications which have
previously been reserved for BiFET and NFET
products. Four offset voltage grades are available
0
–800
4000–400
VIO – Input Offset Voltage – µV
(C-suffix and I-suffix types), ranging from the
low-cost TLC272 (10 mV) to the high-precision TLC277 (500 µV). These advantages, in combination with good
common-mode rejection and supply voltage rejection, make these devices a good choice for new
state-of-the-art designs as well as for upgrading existing designs.
800
LinCMOS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1994, Texas Instruments Incorporated
1
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
CHIP
500µV
TLC277CD
TLC277CP
0°C to 70°c
500µV
TLC277ID
TLC277IP
40°C to 85°C
55°C to 125°C
µ
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
°
°
–
°
–
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC277CDR).
VIOmax
AT 25°C
500 µVTLC277CD——TLC277CP——
°
°
°
2 mV
5 mVTLC272ACD——TLC272ACP——
10mVTLC272CD——TLC272CPTLC272CPWTLC272Y
500 µVTLC277ID——TLC277IP——
2 mV
5 mVTLC272AID——TLC272AIP——
10 mVTLC272ID——TLC272IP——
500 µVTLC277MDTLC277MFKTLC277MJG TLC277MP——
10 mVTLC272MDTLC272MFKTLC272MJG TLC272MP——
description (continued)
In general, many features associated with bipolar technology are available on LinCMOS operational amplifiers
without the power penalties of bipolar technology . General applications such as transducer interfacing, analog
calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC272 and
TLC277. The devices also exhibit low voltage single-supply operation, making them ideally suited for remote
and inaccessible battery-powered applications. The common-mode input voltage range includes the negative
rail.
SMALL
OUTLINE
(D)
TLC272BCD——
TLC272BID——
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TLC272BCP——
TLC272BIP——
TSSOP
(PW)
FORM
(Y)
A wide range of packaging options is available, including small-outline and chip carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC272 and TLC277 incorporate internal ESD-protection circuits that prevent functional failures at voltages
up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling
these devices as exposure to ESD may result in the degradation of the device parametric performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
equivalent schematic (each amplifier)
P3P4
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
V
DD
R6
N3
D2R4D1R3
N5
C1
N4
P5P6
OUT
N7N6
R7
IN–
IN+
R1
P1
N1
R2
P2
R5
N2
GND
TLC272Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC272C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
DD
+
–
GND
(8)
(4)
(1)
(5)
+
(6)
–
60
1IN+
1IN–
2OUT
(3)
(2)
(7)
1OUT
2IN+
2IN–
73
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
3
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
UNIT
Common-mode input voltage, V
V
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Differential input voltage, V
Input voltage range, V
Input current, I
output current, I
Total current into V
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package 260°C. . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
Because the TLC272 and TLC277 are optimized for single-supply operation, circuit configurations used for the
various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either
circuit gives the same result.
V
I
1/2 V
V
DD
–
V
+
C
L
(a) SINGLE SUPPLY(b) SPLIT SUPPLY
O
V
R
L
I
V
DD+
–
+
V
DD–
Figure 1. Unity-Gain Amplifier
DD
2 kΩ
V
20 Ω
20 Ω
(a) SINGLE SUPPLY
DD
–
+
V
O
2 kΩ
V
DD+
–
+
20 Ω20 Ω
V
(b) SPLIT SUPPLY
C
DD–
V
O
L
R
L
V
O
16
1/2 V
DD
Figure 2. Noise-Test Circuit
10 kΩ
V
100 Ω
V
I
DD
–
V
+
(a) SINGLE SUPPLY(b) SPLIT SUPPLY
O
C
L
100 Ω
V
I
10 kΩ
V
DD+
–
+
V
DD–
V
O
C
L
Figure 3. Gain-of-100 Inverting Amplifier
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC272 and TLC277 operational amplifiers, attempts to measure
the input bias current can result in erroneous readings. The bias current at normal room ambient temperature
is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are
offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using
a picoammeter) with no device in the test socket. The actual input bias current can then be calculated
by subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires that a
device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not
feasible using this method.
85
V = V
IC
14
Figure 4. Isolation Metal Around Device Inputs
(JG and P packages)
low-level output voltage
T o obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. If conditions other than these are to
be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency , without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained
(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(b) BOM > f > 1 kHz(a) f = 1 kHz
Figure 5. Full-Power-Response Output Signal
(c) f = B
OM
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
(d) f > B
OM
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
vsHighleveloututcurrent
10,11
OH
gg
yg
vs Common mode in ut voltage
14, 15
VOLLow-level output voltage
g
vsSulyvoltage
20
VD
ggg
IDDSupply current
yg
SR
Slew rate
yg
B1Unity-gain bandwidth
vsSulyvoltage
34
φ
m
g
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
α
VIO
V
OH
A
VD
I
IB
I
IO
V
IC
V
O(PP)
φ
m
V
n
Input offset voltageDistribution6, 7
Temperature coefficient of input offset voltageDistribution8, 9
While the TLC272 and TLC277 perform well using dual power supplies (also called balanced or split supplies),
the design is optimized for single-supply operation. This design includes an input common-mode voltage range
that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage
range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for
TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC272 and TLC277 permits the use of very large resistive values to implement
the voltage divider, thus minimizing power consumption.
The TLC272 and TLC277 work well in conjunction with digital logic; however, when powering both linear devices
and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.
V
DD
R4
–
+
V
V
+
O
REF
VO+
V
(V
REF
DD
R1)R3
*
VI)
R3
R4
R2
)
V
REF
V
V
REF
R1
R3
R2
C
0.01 µF
I
Figure 38. Inverting Amplifier With Voltage Reference
The TLC272 and TLC277 are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially
in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit
is specified at V
The use of the polysilicon-gate process and the careful input circuit design gives the TLC272 and TLC277 very
good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift
in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC272 and
TLC277 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and
sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good
practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).
– 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
DD
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TLC272 and TLC277 result in a very low
noise current, which is insignificant in most applications. This feature makes the devices especially favorable
over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit
greater noise currents.
The output stage of the TLC272 and TLC277 is designed to sink and source relatively high amounts of current
(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can
cause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC272 and TLC277 are measured using a 20-pF load. The devices can
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole
occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many
cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
output characteristics (continued)
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
(a) CL = 20 pF, RL = NO LOAD
(c) CL = 150 pF, RL = NO LOAD
V
I
(b) CL = 130 pF, RL = NO LOAD
2.5 V
–
+
–2.5 V
(d) TEST CIRCUIT
V
C
L
O
TA = 25°C
f = 1 kHz
V
= 1 V
IPP
Figure 41. Effect of Capacitive Loads and Test Circuit
Although the TLC272 and TLC277 possess excellent high-level output voltage and current capability , methods
for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor
(R
) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages to the
P
use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively
large amount of current. In this circuit, N4 behaves like a linear resistor with an on resistance between
approximately 60 Ω and 180 Ω , depending on how hard the operational amplifier input is driven. With very low
values of R
, a voltage offset from 0 V at the output occurs. Second, pullup resistor R
P
acts as a drain load to
P
N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the
output current.
Ip = Pullup current required by
the operational amplifier
(typically 500 µA)
Figure 42. Resistive Pullup to Increase V
R
I
I
I
P
P
V
O
F
R
L
L
OH
Figure 43. Compensation for Input Capacitance
C
–
V
+
O
feedback
Operational amplifier circuits almost always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically .
electrostatic discharge protection
The TLC272 and TLC277 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents
functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be
exercised, however, when handling these devices as exposure to ESD may result in the degradation of the
device parametric performance. The protection circuit also causes the input bias currents to be temperature
dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC272 and
TLC277 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV . Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MA Y INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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