1.5 µV (Peak-to-Peak) Typ, f = 0 to 10 Hz
47 nV/√Hz Typ, f = 10 Hz
13 nV/√Hz
D
High Chopping Frequency . . . 10 kHz Typ
D
No Clock Noise Below 10 kHz
D
No Intermodulation Error Below 5 kHz
D
Low Input Offset Voltage
Typ, f = 1 kHz
10 µV Max (TLC2654A)
D
Excellent Offset Voltage Stability
With Temperature . . . 0.05 µV/°C Max
D
AVD. . . 135 dB Min (TLC2654A)
D
CMRR...110 dB Min (TLC2654A)
D
k
. . . 120 dB Min (TLC2654A)
SVR
D
Single-Supply Operation
D
Common-Mode Input Voltage Range
Includes the Negative Rail
D
No Noise Degradation With External
Capacitors Connected to V
D
Available in Q-Temp Automotive
DD–
D, JG, OR P PACKAGE
(TOP VIEW)
V
V
C
DD–
C
C
DD–
1
XA
IN–
2
IN+
3
4
D, J, OR N PACKAGE
(TOP VIEW)
1
XB
2
XA
NC
3
IN–
4
IN+
5
NC
6
7
FK PACKAGE
(TOP VIEW)
XA
CCNC
XB
8
7
6
5
14
13
12
11
10
INT/EXT
C
XB
V
DD+
OUT
CLAMP
INT/EXT
CLK IN
CLK OUT
V
DD+
OUT
CLAMP
9
8
C RETURN
CLK IN
HighRel Automotive Applications
Configuration Control/Print Support
Qualification to Automotive Standards
description
The TLC2654 and TLC2654A are low-noise
chopper-stabilized operational amplifiers using
the Advanced LinCMOS process. Combining
this process with chopper-stabilization circuitry
makes excellent dc precision possible. In addition,
circuit techniques are added that give the
TLC2654 and TLC2654A noise performance
NC
NC
IN–
NC
IN+
NC – No internal connection
3 2 1 20 19
4
5
6
7
8
910111213
NC
NC
DD –
V
CLK OUT
18
NC
17
V
16
DD+
NC
15
OUT
14
CLAMP
C RETURN
unsurpassed by similar devices.
Chopper-stabilization techniques provide for extremely high dc precision by continuously nulling input offset
voltage even during variations in temperature, time, common-mode voltage, and power-supply voltage. The
high chopping frequency of the TLC2654 and TLC2654A (see Figure 1) provides excellent noise performance
in a frequency spectrum from near dc to 10 kHz. In addition, intermodulation or aliasing error is eliminated from
frequencies up to 5 kHz.
This high dc precision and low noise, coupled with the extremely high input impedance of the CMOS input stage,
makes the TLC2654 and TLC2654A ideal choices for a broad range of applications such as low-level,
low-frequency thermocouple amplifiers and strain gauges and wide-bandwidth and subsonic circuits. For
applications requiring even greater dc precision, use the TLC2652 or TLC2652A devices, which have a
chopping frequency of 450 Hz.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
The TLC2654 and TLC2654A common-mode
input voltage range includes the negative rail,
10 k
FREQUENCY
thereby providing superior performance in either
single-supply or split-supply applications, even at
power supply voltage levels as low as ±2.3 V.
Two external capacitors are required to operate
the device; however, the on-chip chopper-control
circuitry is transparent to the user. On devices in
the 14-pin and 20-pin packages, the control
circuitry is accessible, allowing the user the option
of controlling the clock frequency with an external
frequency source. In addition, the clock threshold
of the TLC2554 and TLC2654A requires no level
100
TLC2654
shifting when used in the single-supply configuration with a normal CMOS or TTL clock input.
n
V
Innovative circuit techniques used on the
TLC2654 and TLC2654A allow exceptionally fast
overload recovery time. An output clamp pin is
Vn – Equivalent Input Noise Voltage – nV/XXVZ
10
110100
f – Frequency – Hz
available to reduce the recovery time even further.
Figure 1
The device inputs and outputs are designed to
withstand –100-mA surge currents without
sustaining latch-up. In addition, the TLC2654 and TLC2654A incorporate internal ESD-protection circuits that
prevent functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015; however,
exercise care in handling these devices, as exposure to ESD may result in degradation of the device parametric
performance.
1 k
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The Q-suffix devices are characterized for operation from –40°C to 125°C.
The M-suffix devices are characterized for operation over the full military temperature range of –55°C to125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
V
T
A
0°C
to
70°C
–40°C
to
85°C
–40°C
to
125°C
–55°C
to
125°C
max
AT 25°C
SMALL
OUTLINE
(D)
-
-
-
-
The 8-pin and 14-pin D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2654AC-8DR).
8 PIN14 PIN20 PIN
CERAMIC
DIP
(JG)
—
—
—
—
—
—
PLASTIC
DIP
(P)
—
—
SMALL
OUTLINE
(D)
-
-
—
—
-
CERAMIC
DIP
(J)
—
—
—
—
—
—
PLASTIC
DIP
(N)
—
—
CERAMIC
DIP
(FK)
—
—
—
—
—
—
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
V
DD+
11
Clamp
5
IN+
IN–
4
+
–
C
XB
7
B
A
1
C RETURN
B
A
Null
V
DD–
Pin numbers shown are for the D (14 pin), J, and N packages.
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or P package 260°C. . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or JG package 300°C. . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DD+
and V
DD–
.
T
≤ 25°CDERATING FACTORT
POWER RATINGABOVE TA = 25°CAPOWER RATINGAPOWER RATINGAPOWER RATING
Supply voltage, V
Common-mode input voltage, V
Clock input voltageV
Operating free-air temperature, T
DD±
±2.3±8±2.3±8±2.3±8±2.3±8V
V
IC
DD–VDD+
DD–
A
V
070–4085–40125–55125°C
DISSIPATION RATING TABLE
7.6 mW/°C
–2.3V
+5 V
DD–
DD–VDD+
DD–
608 mW
V
DD–
= 70°CT
–2.3V
+5 V
DD–VDD+
DD–
= 85°CT
494 mW
V
DD–
–2.3 V
+5 V
DD–VDD+
DD–
= 125°C
190 mW
–2.3V
V
DD–
+5V
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
T
†
UNIT
V
g
V
Full range
0.01
0.05
0.01
0.05µV/°C
IIOInput offset current
pA
IIBInput bias current
pA
V
R
Ω
Full range
t
t
V
V
R
See Note 6
V
V
g
R
See Note 6
V
A
gg
V
R
kΩ
dB
Clamp on-state current
R
100 kΩ
A
Clamp off-state current
V
4 V to 4 V
pA
CMRR
j
V
V
dB
k
ygj
DD±
,
dB
IDDSupply current
V
No load
mA
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
electrical characteristics at specified free-air temperature, V
A
Input offset voltage
IO
(see Note 4)
α
†
Full range is 0°C to 70°C.
NOTES: 4. This parameter is not production tested full range. Thermocouple ef fects preclude measurement of the actual VIO of these devices
Temperature coefficient of
VIO
input offset voltage
Input offset voltage
long-term drift (see Note 5)
p
p
Common-mode input
ICR
voltage range
Maximum positive peak
OM+
output voltage swing
Maximum negative peak
OM–
output voltage swing
Large-signal differential
VD
voltage amplification
Internal chopping
frequency
p
p
Common-mode rejection
ratio
Supply voltage rejectionV
SVR
ratio (∆V
pp
in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes.
The test ensures that the stabilization circuitry is performing properly.
5. T ypical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25° using the Arrhenius equation and assuming an activation energy of 0.96 eV .
has no bearing on testing or nontesting of other parameters.
f = 10 Hz
f = 1 kHz
f = 0 to 1 Hz
f = 0 to 10 Hz
f = 10 kHz,
RL = 10 kΩ,
CL = 100 pF
RL = 10 kΩ,
CL = 100 pF
A
25°C1.521.52
Full range1.31.3
25°C2.33.72.33.7
Full range1.71.7
°
°
25°C1.91.9MHz
25°C48°48°
MINTYPMAXMINTYPMAX
= ±5 V
DD±
TLC2654CTLC2654AC
474775
131320
0.50.5
1.51.5
n
z
µ
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
T
†
UNIT
V
g
V
Full range
0.01
0.05
0.01
0.05µV/°C
IIOInput offset current
pA
IIBInput bias current
pA
V
R
Ω
Full range
t
t
V
V
R
See Note 6
V
V
g
R
10 kΩ
See Note 6
V
A
gg
V
R
kΩ
dB
Clamp on-state current
R
100 kΩ
A
Clamp off-state current
V
V
pA
CMRR
j
V
V
i
dB
k
ygj
DD±
,
dB
IDDSupply current
V
No load
mA
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
electrical characteristics at specified free-air temperature, V
A
Input offset voltage
IO
(see Note 4)
α
†
Full range is –40°C to 85°C
NOTES: 4. This parameter is not production tested full range. Thermocouple effects preclude measurement of the actual VIO of these devices
Temperature coefficient of
VIO
input offset voltage
Input offset voltage
long-term drift (see Note 5)
p
p
Common-mode input
ICR
voltage range
Maximum positive peak
OM+
output voltage swing
Maximum negative peak
OM–
output voltage swing
Large-signal differential
VD
voltage amplification
Internal chopping
frequency
p
p
Common-mode rejection
ratio
Supply voltage rejectionV
SVR
ratio (∆V
pp
in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes.
The test ensures that the stabilization circuitry is performing properly.
5. T ypical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
has no bearing on testing or nontesting of other parameters.
f = 10 Hz
f = 1 kHz
f = 0 to 1 Hz
f = 0 to 10 Hz
f = 10 kHz
RL = 10 kΩ,
CL = 100 pF
RL = 10 kΩ,
CL = 100 pF
A
25°C1.521.52
Full range1.21.2
25°C2.33.72.33.7
Full range1.51.5
°
°
25°C1.91.9MHz
25°C48°48°
MINTYPMAXMINTYPMAX
= ±5 V
DD±
TLC2654ITLC2654AI
474775
131320
0.50.5
1.51.5
n
z
µ
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
†
T
A
V
g
V
Full range
0.01
0.05∗0.01
0.05
∗
V/°C
IIOInput offset current
pA
IIBInput bias current
pA
C
5to5
ICR
voltage range
S
g
V
R
See Note 6
V
V
g
R
See Note 6
V
A
gg
V
R
kΩ
dB
Clamp on-state current
R
100 kΩ
A
Clamp off-state current
V
V
pA
CMRR
j
V
V
i
dB
k
ygj
DD±
,
dB
IDDSupply current
V
No load
mA
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
electrical characteristics at specified free-air temperature, V
PARAMETERTEST CONDITIONS
Input offset voltage
IO
(see Note 4)
α
V
∗ On products complaint to MIL-STD-883, Class B, this parameter is not production tested.
†
Full range is –40° to 125°C for Q suffix, –55° to 125°C for M suffix.
NOTES: 4. This parameter is not production tested full range. Thermocouple effects preclude measurement of the actual VIO of these devices
Temperature coefficient of
VIO
input offset voltage
Input offset voltage
long-term drift (see Note 5)
p
p
ICR
OM+
OM–
VD
SVR
ommon-mode input
Maximum positive peak
output voltage swing
Maximum negative peak
output voltage swing
Large-signal differential
voltage amplification
Internal chopping
frequency
p
p
Common-mode rejection
ratio
Supply voltage rejectionV
ratio (∆V
pp
in high-speed automated testing. VIO is measured to a limit determined by the test equipment capability at the temperature extremes.
The test ensures that the stabilization circuitry is performing properly.
5. T ypical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
Leakage and dielectric absorption are the two important factors to consider when selecting external capacitors
CXA and CXB. Both factors can cause system degradation, negating the performance advantages realized by
using the TLC2654.
Degradation from capacitor leakage becomes more apparent with increasing temperatures. Low-leakage
capacitors and standoffs are recommended for operation at TA = 125°C. In addition, guard bands are
recommended around the capacitor connections on both sides of the printed-circuit board to alleviate problems
caused by surface leakage on circuit boards.
Capacitors with high dielectric absorption tend to take several seconds to settle upon application of power, which
directly affects input offset voltage. In applications needing fast settling of input voltage, high-quality film
capacitors such as mylar, polystyrene, or polypropylene should be used. In other applications, a ceramic or
other low-grade capacitor can suffice.
Unlike many choppers available today , the TLC2654 is designed to function with values of C
and CXB in the
XA
range of 0.1 µF to 1 µF without degradation to input offset voltage or input noise voltage. These capacitors
should be located as close as possible to C
choppers, connecting these capacitors to V
and CXB and return to either V
XA
causes degradation in noise performance; this problem is
DD –
or C RETURN. On many
DD–
eliminated on the TLC2654.
internal/external clock
The TLC2654 has an internal clock that sets the chopping frequency to a nominal value of 10 kHz. On 8-pin
packages, the chopping frequency can only be controlled by the internal clock; however , on all 14-pin packages
and the 20-pin FK package the device chopping frequency can be set by the internal clock or controlled
externally by use of the INT/EXT
external clocking is desired, connect INT/EXT to V
and CLK IN. To use the internal 10-kHz clock, no connection is necessary . If
and the external clock to CLK IN. The external clock trip
DD–
point is 2.5 V above the negative rail; however, CLK IN can be driven from the negative rail to 5 V above the
negative rail. This allows the TLC2654 to be driven directly by 5-V TTL and CMOS logic when operating in the
single-supply configuration. If this 5-V level is exceeded, damage could occur to the device unless the current
into CLK IN is limited to ±5 mA. A divide-by-two
frequency divider interfaces with CLK IN and sets
the chopping frequency . The chopping frequency
0
V
TA = 25°C
DD±
= ±5 V
appears on CLK OUT.
overload recovery/output clamp
When large differential-input-voltage conditions
are applied to the TLC2654, the nulling loop
attempts to prevent the output from saturating by
driving CXA and CXB to internally-clamped voltage
levels. Once the overdrive condition is removed,
a period of time is required to allow the built-up
charge to dissipate. This time period is defined as
overload recovery time (see Figure 34). Typical
overload recovery time for the TLC2654 is
significantly faster than competitive products;
however, this time can be reduced further by use
of internal clamp circuitry accessible through
CLAMP if required.
– 5
O
V
0
I
VI – Input Voltage – mV VO – Output Voltage – V
– 50
V
0 10203040
t – Time – ms
50 607080
Figure 34. Overload Recovery
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
APPLICATION INFORMATION
overload recovery/output clamp (continued)
The clamp is a switch that is automatically activated when the output is approximately 1 V from either supply
rail. When connected to the inverting input (in parallel with the closed-loop feedback resistor), the closed-loop
gain is reduced and the TLC2654 output is prevented from going into saturation. Since the output must source
or sink current through the switch (see Figure 9), the maximum output voltage swing is slightly reduced.
thermoelectric effects
To take advantage of the extremely low offset voltage temperature coefficient of the TLC2654, care must be
taken to compensate for the thermoelectric effects present when two dissimilar metals are brought into contact
with each other (such as device leads being soldered to a printed-circuit board). It is not uncommon for dissimilar
metal junctions to produce thermoelectric voltages in the range of several microvolts per degree Celsius (orders
of magnitude greater than the 0.01 µV/°C typical of the TLC2654).
To help minimize thermoelectric effects, pay careful attention to component selection and circuit-board layout.
Avoid the use of nonsoldered connections (such as sockets, relays, switches, etc.) in the input signal path.
Cancel thermoelectric effects by duplicating the number of components and junctions in each device input. The
use of low-thermoelectric-coefficient components, such as wire-wound resistors, is also beneficial.
latch-up avoidance
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC2654 inputs
and outputs are designed to withstand –100-mA surge currents without sustaining latch-up; however,
techniques to reduce the chance of latch-up should be used whenever possible. Internal protection diodes
should not, by design, be forward biased. Applied input and output voltages should not exceed the supply
voltage by more than 300 mV . Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be stunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the supply rails and is limited only by the
impedance of the power supply and the forward resistance of the parasitic thyristor. The chance of latch-up
occurring increases with increasing temperature and supply voltage.
electrostatic-discharge protection
The TLC2654 incorporates internal ESD-protection circuits that prevent functional failures at voltages at or
below 2000 V. Care should be exercised in handling these devices, as exposure to ESD may result in
degradation of the device parametric performance.
theory of operation
Chopper-stabilized operational amplifiers offer the best dc performance of any monolithic operational amplifier .
This superior performance is the result of using two operational amplifiers — a main amplifier and a nulling
amplifier – plus oscillator-controlled logic and two external capacitors to create a system that behaves as a
single amplifier. With this approach, the TLC2654 achieves submicrovolt input offset voltage, submicrovolt
noise voltage, and offset voltage variations with temperature in the nV/°C range.
The TLC2654 on-chip control logic produces two dominant clock phases: a nulling phase and an amplifying
phase. The term chopper-stabilized derives from the process of switching between these two clock phases.
Figure 35 shows a simplified block diagram of the TLC2654. Switches A and B are make-before-break types.
During the nulling phase, switch A is closed, shorting the nulling amplifier inputs together and allowing the nulling
amplifier to reduce its own input offset voltage by feeding its output signal back to an inverting input node.
Simultaneously , external capacitor C
remain nulled during the amplifying phase.
IN+
IN–
Pin numbers shown are for the D (14 pin), J, and N packages.
stores the nulling potential to allow the offset voltage of the amplifier to
XA
A
B
Main
+
–
10
OUT
C
XB
7
V
DD–
C
XA
5
4
B
A
Null
+
–
Figure 35. TLC2654 Simplified Block Diagram
During the amplifying phase, switch B is closed, connecting the output of the nulling amplifier to a noninverting
input of the main amplifier. In this configuration, the input offset voltage of the main amplifier is nulled. Also,
external capacitor CXB stores the nulling potential to allow the offset voltage of the main amplifier to remain
nulled during the next nulling phase.
This continuous chopping process allows offset voltage nulling during variations in time and temperature and
over the common-mode input voltage range and power supply range. In addition, because the low-frequency
signal path is through both the null and main amplifiers, extremely high gain is achieved.
The low-frequency noise of a chopper amplifier depends on the magnitude of the component noise prior to
chopping and the capability of the circuit to reduce this noise while chopping. The use of the Advanced LinCMOS
process, with its low-noise analog MOS transistors and patent-pending input stage design, significantly reduces
the input noise voltage.
The primary source of nonideal operation in chopper-stabilized amplifiers is error charge from the switches. As
charge imbalance accumulates on critical nodes, input offset voltage can increase especially with increasing
chopping frequency . This problem has been significantly reduced in the TLC2654 by use of a patent-pending
compensation circuit and the Advanced LinCMOS process.
The TLC2654 incorporates a feed-forward design that ensures continuous frequency response. Essentially , the
gain magnitude of the nulling amplifier and compensation network crosses unity at the break frequency of the
main amplifier. As a result, the high-frequency response of the system is the same as the frequency response
of the main amplifier. This approach also ensures that the slewing characteristics remain the same during both
the nulling and amplifying phases.
The primary limitation on ac performance is the chopping frequency . As the input signal frequency approaches
the chopper’s clock frequency, intermodulation (or aliasing) errors result from the mixing of these frequencies.
To avoid these error signals, the input frequency must be less than half the clock frequency. Most choppers
available today limit the internal chopping frequency to less than 500 Hz in order to eliminate errors due to the
charge imbalancing phenomenon mentioned previously . However , to avoid intermodulation errors on a 500-Hz
chopper, the input signal frequency must be limited to less than 250 Hz.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
APPLICATION INFORMATION
theory of operation (continued)
The TLC2654 removes this restriction on ac performance by using a 10-kHz internal clock frequency . This high
chopping frequency allows amplification of input signals up to 5 kHz without errors due to intermodulation and
greatly reduces low-frequency noise.
THERMAL INFORMATION
temperature coefficient of input offset voltage
Figure 36 shows the effects of package-included thermal EMF. The TLC2654 can null only the offset voltage
within its nulling loop. There are metal-to-metal junctions outside the nulling loop (bonding wires, solder joints,
etc.) that produce EMF . In Figure 36, a TLC2654 packaged in a 14-pin plastic package (N package) was placed
in an oven at 25°C at t = 0, biased up, and allowed to stabilize. At t = 3 min, the oven was turned on and allowed
to rise in temperature to 125°C. As evidenced by the curve, the overall change in input offset voltage with
temperature is less than the specified maximum limit of 0.05 µV/°C.
8
0.08
4
Vµ
0
– 4
– 8
– 12
– Input Offset Voltage –
IO
V
– 15
– 18
03691215 18
0.04
C
°
V/µ
Input Offset Voltage – uV/C
VIO
aVIO – Temperature Coefficient of
α
4
IN–
100 Ω
5
IN+
0.1 µF
Pin numbers shown are for the D (14-pin), J, and N
packages.
NOTES: A. All linear dimensions are in inches (millimeters).
24
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.197
(5,00)
0.189
(4,80)
0.344
(8,75)
0.337
(8,55)
0.394
(10,00)
0.386
(9,80)
4040047/D 10/96
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
MECHANICAL DATA
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
20
22
23
24
25
19
21
1282627
12
131415161817
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358
(9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858
(21,8)
1.063
(27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.
0.130 (3,30) MIN
0°–15°
0.014 (0,36)
0.008 (0,20)
4040083/D 08/98
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2654, TLC2654A
Advanced LinCMOS LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020F – NOVEMBER 1988 – REVISED JUL Y 1999
MECHANICAL DATA
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.280 (7,11)
0.245 (6,22)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0.310 (7,87)
0.290 (7,37)
Seating Plane
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.