Texas Instruments TL1051FR-X, TL1051FR Datasheet

TL1051
VIDEO PREPROCESSOR CIRCUIT
SOCS032B – NOVEMBER 1991
Copyright 1991, Texas Instruments Incorporated
4-1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Solid-State Reliability
Applications
Three Independent Channels Available for
Use With RGB Monitors
Y Signal Generated From Three
Independent Channels
Clamp Pulse-Select Option
White-Clip Function for Y Signal
Gain Control for R, G, B, and Y
Noise Suppression During Video-Blanking
Periods
description
The TL1051 is a bipolar monolithic integrated circuit designed for use in preprocessing three channels of TI CCD image sensors. It receives video inputs from the TI TL1593 three-channel sample-and-hold circuit and outputs three processed channel signals and a single multiplexed Y (luminance) signal. Processing functions of the TL1051 include gain, automatic gain control, clamp, white balance, and white clip.
The TL1051 is supplied in a 44-pin surface-mount plastic package and is characterized for operation from –20°C to 45°C.
AGCOUT REF2V AGCCONT AGCLMT BOUT GOUT ROUT YOUT YALC WCPCONT YCLAMP
12 13
1 2 3 4 5 6 7 8 9 10 11
NC
WB CONTB CONTA
V
CC
BIN
GIN RIN
CLPLVLB CLPLVLG CLPLVLR
14 15 16 17
FR PACKAGE
(TOP VIEW)
GND
ALCREF
AGCSET
AGCDET
43 42 41 40 3944 38
RESET
ALCDRV
ALC–
ALC+
GATE
GATEOUT
GATEIN
HL
YSW
YAGCIN
GND
SWR
SWG
SWB
PCL1
PBL
PCL2
36 35 3437
18 19 20 21 22
YAGC
33 32 31 30 29 28 27 26 25 24 23
NC – No internal connection
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, precautions should be taken to avoid application of any voltage higher than maximum-rated voltages to these
high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for Handling Electrostatic-Discharge-Sensitive
(ESDS) Devices and Assemblies
available from Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
TL1051 VIDEO PREPROCESSOR CIRCUIT
SOCS032B – NOVEMBER 1991
4-2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
functional block diagram
3 3
1
2
3
A/D
ALC AMP
Reset
Gate
AGC
AMP
Blue
Clamp
Green Clamp
Red
Clamp
Blue
Blank
Green Blank
Red
Blank
Clamp Buffer
Blank
Buffer
White Level
White Level
AGC
CONT
YAGC
Blue AGC
Green
AGC
Red
AGC
YSW
HLMIX
Y
Clamp
WCP­CONT
ALC REF
41 42
44 40
38 34
35 4
3 30 31
2 18
23
21 6
9
7 10
8 11
13 14 15
ALC
+
ALC –
RESET
GATE
GATE IN
AGCDET
AGCSET
CONTA CONTB
AGCLMT
AGCCONT
WB
PCL2
YCLAMP
YAGCIN
BIN
CLPLVLB
GIN
CLPLVLG
RIN
CLPLVLR
SWR SWG SWB
43
39
33
19
22
26
29
28
27 25 36
20
ALCDRV
GATEOUT
AGCOUT
HL
YAGC
YOUT
WCPCONT
BOUT
GOUT
ROUT YALC
ALCREF
YSW
3
17
16
PBL
PCL1
24
TL1051
VIDEO PREPROCESSOR CIRCUIT
SOCS032B – NOVEMBER 1991
4-3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME NO.
I/O
DESCRIPTION
AGCCONT 31 I AGC control AGCDET 34 I AGC detect AGCLMT 30 I AGC limit AGCOUT 33 O AGC out AGCSET 35 I AGC set ALCDRV 43 O ALC drive ALCREF 36 O ALC reference ALC+ 41 I ALC noninverting input ALC– 42 I ALC inverting input BIN 6 I Blue channel in BOUT 29 O Blue channel out CLPLVLB 9 I DC clamp level – blue CLPLVLG 10 I DC clamp level – green CLPLVLR 11 I DC clamp level – red CONTA 4 I White balance digital control – A CONTB 3 I White balance digital control – B GATE 40 I Video gate control switch GATEIN 38 I Video gate in GATEOUT 39 O Video gate out GIN 7 I Green channel in GND 12, 37 Ground GOUT 28 O Green channel out HL 19 O Highlight suppression (not used) NC 1 No internal connection PBL 17 I Process blanking PCL1 16 I Clamp signal 1 PCL2 18 I Clamp signal 2 REF2V 32 O 2-V reference RESET 44 I Reset RIN 8 I Red channel in ROUT 27 O Red channel out SWB 15 I Multiplex switch – blue SWG 14 I Multiplex switch – green SWR 13 I Multiplex switch – red V
CC
5 Power supply voltage WB 2 I White balance analog control WCPCONT 24 I White clip control YAGC 22 O YAGC out YAGCIN 21 I Y AGC in YALC 25 O Y automatic level control YCLAMP 23 I Y clamp YOUT 26 O Y signal out YSW 20 O Multiplexed Y out
TL1051 VIDEO PREPROCESSOR CIRCUIT
SOCS032B – NOVEMBER 1991
4-4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
detailed description
white-balance control
White balance in the monochrome mode can be adjusted with either terminal 2 (white-balance analog control) or with terminals 3 and 4 (white-balance digital controls B and A, respectively). If analog control is selected, terminals 3 and 4 should be left open and terminal 2 adjusted appropriately (see Figure 1 and Figure 2 for control characteristics). The white balance is controlled per the following table:
CONTB CONTA VOLTAGE LEVEL ON WB RED BLUE
L L 2.4 V –3 dB –4 dB L H 2.7 V –1 dB –1.5 dB H L 3 V 1 dB 1.5 dB H H 3.5 V 3 dB 4 dB
analog inputs RIN, GIN, BIN
The TI TL1593 sample-and-hold circuit is normally the source for these inputs. The source signals should be ac coupled into the TL1051. Gain control should be used on at least two of the three channels in order to obtain an optimum balance.
clamp level
Input terminals 9, 10, and 11 (CLPLVLB, CLPLVLG, and CLPLVLR, respectively) should initially be set at approximately 2 V dc. The levels should then be balanced so that clock feedthrough on terminal 20 (YSW) is minimized under dark conditions.
multiplexed switching
Input terminals 13, 14, and 15 (SWR, SWG, and SWB, respectively) are the TTL-level signals used to multiplex the three channels.
clamping and process blanking
Input terminals 16, 17, and 18 (PCL1, PBL, and PCL2) are used for TTL clamp and blank signals. The dark references are clamped by the PCL1 signal. Unwanted noise in the video signal is eliminated by the PBL signal. The Y signal can then be reclamped with the PCL2 signal.
Depending on the application, gain and automatic gain control (AGC) may or may not be selected. The following descriptions cover both selections.
YSW
YSW output (terminal 20): Fast sampling of the video input signals with the TTL multiplex signals generates this high-bandwidth output without adjustable gain or AGC.
gain and AGC selected
Y AGCIN input (terminal 21): If gain or AGC operation is selected, the YSW output (terminal 20) should be directly connected to YAGCIN.
YAGC output (terminal 22): The multiplexed signal with controllable gain (controlled by the AGCCONT input) is available at this terminal if terminals 20 (YSW) and 21 (Y AGCIN) are connected. If further signal processing is desired, this terminal should be ac coupled to terminal 23 (YCLAMP).
YCLAMP input (terminal 23): The Y signal from Y AGC can be reclamped at this point by applying a wider clamp pulse to terminal 18 (PCL2).
WCPCONT input (terminal 24): A dc voltage applied to this white clip control input causes the white clip function to be performed on the Y signal. See Figure 4 for the clip control characteristics.
Y ALC output (terminal 25): If either AGC or automatic level control (ALC) is selected, the Y signal at this point should be fed back to either the ALC or AGC block.
YOUT output (terminal 26): The white-clipped Y signal is available at this output.
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