TEXAS INSTRUMENTS TL103W, TL103WA Technical data

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FEATURES

V

CC+

1OUT

V

REF

OPAMP1

OPAMP2

+

+

-

-

1

2

3

4

8
7

6

5

D (SOIC) PACKAGE

(TOP VIEW)

DRJ (QFN) PACKAGE

(TOP VIEW)

2IN+

1OUT

2
3
4

1

8
7

6
5

1IN−
1IN+

V

CC−

2IN−

2OUT

V

CC+

NOTE: Exposed thermal pad is connected
internally to V

CC−

via die attach.

V

CC−

1IN+

1IN–

2IN+

2IN–

2OUT

TYPICAL APPLICATIONS

DESCRIPTION/ORDERING INFORMATION

TL103W, TL103WA

DUAL OPERATIONAL AMPLIFIERS

WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

• OPERATIONAL AMPLIFIER

– Low Offset Voltage Max of:

• TL103WA … 3 mV (25 ° C) and 5 mV

(Full Temperature)

• TL103W … 4 mV (25 ° C) and 5 mV

(Full Temperature)

– Low Supply Current … 350 µ A/Channel (Typ)
– Unity Gain Bandwidth … 0.9 MHz (Typ)
– Input Common-Mode Range Includes GND
– Large Output-Voltage Swing …

0 V to V

CC

– 1.5 V

– Wide Supply-Voltage Range … 3 V to 32 V
– 2-kV ESD Protection (HBM)

• VOLTAGE REFERENCE

– Fixed 2.5-V Reference
– Tight Tolerance Max of:

• TL103WA … 0.4% (25 ° C) and 0.8%

(Full Temperature)

• TL103W . . . 0.7% (25 ° C) and 1.4%

(Full Temperature)

– Low Temperature Drift … 7 mV (Typ) Over

Operating Temperature Range

– Wide Sink-Current Range . . .

0.5 mA (Typ) to 100 mA

– Output Impedance … 0.2 Ω (Typ)

• Battery Chargers

• Switch-Mode Power Supplies

• Linear Voltage Regulation

• Data-Acquisition Systems

The TL103W and TL103WA combine the building blocks of a dual operational amplifier and a fixed voltage
reference – both of which often are used in the control circuitry of both switch-mode and linear power supplies.
OPAMP1 has its noninverting input internally tied to a fixed 2.5-V reference, while OPAMP2 is independent, with
both inputs uncommitted.

For the A grade, especially tight voltage regulation can be achieved through low offset voltages for both
operational amplifiers (typically 0.5 mV) and tight tolerances for the voltage reference (0.4% at 25 ° C and 0.8%
over operating temperature range).

The TL103W and TL103WA are characterized for operation from –40 ° C to 105 ° C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2004–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

查询TL103WAIDE4供应商

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Typical Application Circuit

SMPS

_
+

OPAMP2

_
+

OPAMP1

TL103W/A

Current

Sense

AC

Line

Opto

Isolator

Battery

R6

R3 R4 R5

R8

R2

R1

R7

R9

Constant Voltage Control

Constant Current Control

2.5 V

TL103W, TL103WA
DUAL OPERATIONAL AMPLIFIERS
WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

ORDERING INFORMATION

MAX VIOAND V

REF

T

A

TOLERANCE PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

(25 ° C)

QFN (DRJ) Reel of 1000 TL103WAIDRJR PREVIEW

A grade

Tube of 75 TL103WAID

3 mV, 0.4%

SOIC (D) Z103WQ

Reel of 2500 TL103WAIDR

–40 ° C to 105 ° C

QFN (DRJ) Reel of 1000 TL103WIDRJR PREVIEW

Standard grade

Tube of 75 TL103WID

4 mV, 0.7%

SOIC (D) Z103W

Reel of 2500 TL103WIDR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Figure 1. TL103W/A in a Constant-Current and Constant-Voltage Battery Charger

2

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Absolute Maximum Ratings

(1)

Recommended Operating Conditions

TL103W, TL103WA

DUAL OPERATIONAL AMPLIFIERS

WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

CC

Supply voltage 36 V

V

id

Operational amplifier input differential voltage 36 V

V

I

Operational amplifier input voltage range –0.3 36 V

I

KA

Voltage reference cathode current 100 mA

D package

(2) (3)

97

θ

JA

Package thermal impedance ° C/W

DRJ package

(2) (4)

TBD

T

J

Maximum junction temperature 150 ° C

T

stg

Storage temperature range –65 150 ° C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability

(2) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient

temperature is PD= (TJ(max) – TA)/ θJA. Selecting the maximum of 150 ° C can affect reliability.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
(4) The package thermal impedance is calculated in accordance with JESD 51-5.

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

IN

Supply voltage 3 32 V

I

K

Cathode current 1 100 mA

T

A

Operating free-air temperature –40 105 ° C

3

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OPAMP1, Operational Amplifier With Noninverting Input Connected to the Internal V

REF

TL103W, TL103WA
DUAL OPERATIONAL AMPLIFIERS
WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

Electrical Characteristics

V

CC+

= 5 V, V

CC

= GND, TA= 25 ° C (unless otherwise noted)

PARAMETER TEST CONDITIONS T

A

MIN TYP MAX UNIT

25 ° C 1 4

TL103W V

icm

= 0 V

Full range 5

V

IO

Input offset voltage mV

25 ° C 0.5 3

TL103WA V

icm

= 0 V

Full range 5

α V

IO

Input offset-voltage drift 25 ° C 7 µ V/ ° C

I

IB

Input bias current (negative input) 25 ° C 20 nA

A

VD

Large-signal voltage gain V

CC+

= 15 V, RL= 2 k Ω , V

icm

= 0 V 25 ° C 100 V/mV

k

SVR

Supply-voltage rejection ratio V

CC+

= 5 V to 30 V, V

icm

= 0 V 25 ° C 65 100 dB

I

source

Output source current V

CC+

= 15 V, VO= 2 V, Vid= 1 V 25 ° C 20 40 mA

I

SC

Short circuit to GND V

CC+

= 15 V 25 ° C 40 60 mA

V

CC+

= 15 V, VO= 2 V, Vid= –1 V 10 12 mA

I

sink

Output sink current 25 ° C

V

CC+

= 15 V, VO= 0.2 V, Vid= –1 V 12 50 µ A

25 ° C 26 27

V

CC

= 30 V, RL= 2 k Ω

Full range 26

V

OH

High-level output voltage V

25 ° C 27 28

V

CC

= 30 V, RL= 10 k Ω

Full range 27

25 ° C 5 20

V

OL

Low-level output voltage RL= 10 k Ω mV

Full range 20

V

CC+

= 15 V, CL= 100 pF,

SR Slew rate at unity gain 25 ° C 0.2 0.4 V/ µ s

RL= 2 k Ω , VI= 0.5 V to 2 V, unity gain
V

CC+

= 30 V, VI= 10 mV,

GBW Gain bandwidth product 25 ° C 0.5 0.9 MHz

CL= 100 pF, RL= 2 k Ω , f = 100 kHz
V

CC+

= 30 V, VO= 2 Vpp, CL= 100 pF,

THD Total harmonic distortion 25 ° C 0.02 %

RL= 2 k Ω , f = 1 kHz, AV= 20 dB

4

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OPAMP2, Independent Operational Amplifier

TL103W, TL103WA

DUAL OPERATIONAL AMPLIFIERS

WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

Electrical Characteristics

V

CC+

= 5 V, V

CC

= GND, VO= 1.4 V, TA= 25 ° C (unless otherwise noted)

PARAMETER TEST CONDITIONS T

A

MIN TYP MAX UNIT

25 ° C 1 4

TL103W V

icm

= 0 V

Full range 5

V

IO

Input offset voltage mV

25 ° C 0.5 3

TL103WA V

icm

= 0 V

Full range 5

α V

IO

Input offset voltage drift 25 ° C 7 µ V/ ° C

25 ° C 2 75

I

IO

Input offset current nA

Full range 150

25 ° C 20 150

I

IB

Input bias current nA

Full range 200

25 ° C 50 100

V

CC+

= 15 V, RL= 2 k Ω ,

A

VD

Large-signal voltage gain V/mV

VO= 1.4 V to 11.4 V

Full range 25

k

SVR

Supply-voltage rejection ratio V

CC+

= 5 V to 30 V 25 ° C 65 100 dB

25 ° C 0 V

CC+

– 1.5

V

ICR

Input common-mode voltage range V

CC+

= 30 V

(1)

V

Full range 0 V

CC+

– 2

25 ° C 70 85

CMRR Common-mode rejection ratio dB

Full range 60

I

source

Output source current V

CC+

= 15 V, VO= 2 V, Vid= 1 V 25 ° C 20 40 mA

I

SC

Short circuit to GND V

CC+

= 15 V 25 ° C 40 60 mA

V

CC+

= 15 V, VO= 2 V,

10 12 mA

Vid= –1 V

I

sink

Output sink current 25 ° C

V

CC+

= 15 V, VO= 0.2 V,

12 50 µ A

Vid= –1 V

25 ° C 26 27

V

CC

= 30 V, RL= 2 k Ω

Full range 26

V

OH

High-level output voltage V

25 ° C 27 28

V

CC

= 30 V, RL= 10 k Ω

Full range 27

25 ° C 5 20

V

OL

Low-level output voltage RL= 10 k Ω mV

Full range 20

V

CC+

= 15 V, CL= 100 pF,

SR Slew rate at unity gain RL= 2 k Ω , VI= 0.5 V to 3 V, 25 ° C 0.2 0.4 V/ µ s

unity gain
V

CC+

= 30 V, VI= 10 mV,

GBW Gain bandwidth product CL= 100 pF, RL= 2 k Ω , 25 ° C 0.5 0.9 MHz

f = 100 kHz
V

CC+

= 30 V, VO= 2 Vpp,

THD Total harmonic distortion CL= 100 pF, RL= 2 k Ω , 25 ° C 0.02 %

f = 1 kHz, AV= 20 dB
V

CC

= 30 V, RS= 100 Ω ,

V

n

Equivalent input noise voltage 25 ° C 50 nV/ √ Hz

f = 1 kHz

(1) The input common-mode voltage of either input should not be allowed to go below –0.3 V. The upper end of the common-mode voltage

range is V

CC+

– 1.5 V, but either input can go to V

CC+

+ 0.3 V (but ≤ 36 V) without damage.

5

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|zka| 

V

KA

I

K

Voltage Reference

Total Device

TL103W, TL103WA
DUAL OPERATIONAL AMPLIFIERS
WITH INTERNAL REFERENCE

SLOS437J – APRIL 2004 – REVISED JULY 2005

Electrical Characteristics

PARAMETER TEST CONDITIONS T

A

MIN TYP MAX UNIT

25 ° C 2.482 2.5 2.518

TL103W IK= 10 mA

Full range 2.465 2.535

V

REF

Reference voltage V

25 ° C 2.49 2.5 2.51

TL103WA IK= 10 mA

Full range 2.48 2.52

Reference input voltage deviation

∆ V

REF

V

KA

= V

REF

, IK= 10 mA Full range 7 30 mV

over temperature range
Minimum cathode current for

I

min

V

KA

= V

REF

25 ° C 0.5 1 mA

regulation

V

KA

= V

REF

, ∆ IK= 1 mA to 100 mA,

|zka| Dynamic impedance

(1)

25 ° C 0.2 0.5 Ω

f < 1 kHz

(1) The dynamic impedance is defined as

.

Electrical Characteristics

PARAMETER TEST CONDITIONS T

A

MIN TYP MAX UNIT

V

CC+

= 5 V, No load 0.7 1.2

Total supply current,

I

CC

Full range mA

excluding cathode-current reference

V

CC+

= 30 V, No load 2

6

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

TL103WAID ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WAIDE4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WAIDG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WAIDR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WAIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WAIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WID ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WIDE4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WIDG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WIDR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

TL103WIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

(1)

The marketing status valuesare defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

PACKAGE OPTION ADDENDUM

www.ti.com

23-Apr-2007

Addendum-Page 1

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com

23-Apr-2007

Addendum-Page 2

TAPE AND REEL BOX INFORMATION

Device Package Pins Site Reel

Diameter

(mm)

Reel

Width

(mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm)W(mm)

Pin1

Quadrant

TL103WAIDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1

TL103WIDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com

12-Jan-2008

Pack Materials-Page 1

Device Package Pins Site Length (mm) Width (mm) Height (mm)

TL103WAIDR D 8 SITE 27 342.9 338.1 20.64

TL103WIDR D 8 SITE 27 342.9 338.1 20.64

PACKAGE MATERIALS INFORMATION

www.ti.com

12-Jan-2008

Pack Materials-Page 2

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