SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
24 DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES
•Low-Power Consumption
•Wide Common-Mode and Differential
Voltage Ranges
•Low Input Bias and Offset Currents
•Output Short-Circuit Protection
•Low Total Harmonic
Distortion . . . 0.003% Typ
D, P, OR PW PACKAGE
N1/COMP
IN–
IN+
V
CC–
NC–No internal connection
TL080
(TOP VIEW)
1
2
3
4
NC
IN–
NC
IN+
NC
D, J, N, OR PW PACKAGE
1 OUT
1 IN–
1 IN+
V
CC+
2 IN+
2 IN–
2 OUT
COMP
8
V
7
CC+
OUT
6
OFFSET N2
5
TL081M . . . FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
3212019
4
5
6
7
8
910111213
NC
NC
CC–
V
TL084, TL084A, TL084B
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
7
NC
OFFSET N2
9
8
OFFSET N1
NC
NC
18
V
17
NC
16
OUT
15
NC
14
NC
4 OUT
4 IN–
4 IN+
V
CC–
3 IN+
3 IN–
3 OUT
TL081, TL081A, TL081B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
1
IN–
2
IN+
3
CC+
V
CC–
4
•High Input Impedance . . . JFET-Input Stage
•Internal Frequency Compensation (Except
TL080, TL080A)
•Latch-Up-Free Operation
•High Slew Rate . . . 13 V/µs Typ
•Common-Mode Input Voltage Range
NC
8
V
7
CC+
OUT
6
OFFSET N2
5
Includes V
NC
1 IN–
NC
1 IN+
NC
1 IN+
NC
V
CC+
NC
2 IN+
CC+
TL082, TL082A, TL082B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
1 OUT
1 IN–
1 IN+
V
CC–
TL082M ...FK PACKAGE
NC
3 2 1 20 19
4
5
6
7
8
910111213
NC
TL084M ...FK PACKAGE
1 IN–
3212019
4
5
6
7
8
910111213
1
2
3
4
(TOP VIEW)
CC+
V
1 OUT
NC
NC
CC–
2 IN+
V
(TOP VIEW)
1 OUT
NC
4 OUT
NC
18
17
16
15
14
NC
4 IN–
18
17
16
15
14
NC
2 IN–
2 OUT
3 IN–
3 OUT
8
7
6
5
NC
2 OUT
NC
2 IN–
NC
4 IN+
NC
VCC–
NC
3 IN+
V
CC+
2 OUT
2 IN–
2 IN+
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS
77251–1443
Copyright 1992, Texas Instruments Incorporated
On products compliant to MIL-STD-883, Class B, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
symbols
N1/COMP
COMP
IN+
IN–
OFFSET N2
TL080
TL081
OFFSET N1
IN+
+
–
OUT
IN–
OFFSET N2
+
–
OUT
TL082 (each amplifier)
TL084 (each amplifier)
IN+
IN–
+
–
description
The TL08_ JFET-input operational amplifier family is designed to offer a wider selection than any previously
developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates
well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature
high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset
adjustment and external compensation options are available within the TL08_ family.
Device types with a C suffix are characterized for operation from 0°C to 70°C, those with an I suffix are
characterized for operation from –40°C to 85°C, and those with an M suffix are characterized for operation over
the full military temperature range of –55°C to 125°C.
AVAILABLE OPTIONS
V
IO
T
0°C
to
70°C
–40°C
85°C
–55°C
to
125°C
The D package is available taped and reeled. Add R suffix to device type, (e.g., TL080CDR).
SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
IN–
N1/COMP
TL080
Only
C1 = 18 pF on TL081, TL082, and TL084 only (including their suffix versions).
Component values shown are nominal.
V
CC–
OFFSET N2
COMP
1080 Ω
OFFSET N1
TL081 Only
C1
1080 Ω
OFFSET N2
64 Ω
OUT
128 Ω
64 Ω
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS
77251–1443
3
TL082Y
JFET-INPUT DUAL OPERATIONAL AMPLIFIER
SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
chip information
These chips, when properly assembled, display characteristics similar to the TL082. Thermal compression or
ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(8)
+
–
V
CC–
(4)
(1)
(5)
+
(6)
–
1 IN+
1 IN–
1 OUT
(3)
(2)
(7)
2 OUT
2 IN+
2 IN–
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%
ALL DIMENSIONS ARE IN MILS
PIN (4) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS
77251–1443
JFET-INPUT QUAD OPERATIONAL AMPLIFIER
SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
chip information
These chips, when properly assembled, display characteristics similar to the TL084. Thermal compression or
ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(4)
+
–
+
–
V
CC–
(11)
(1)
(5)
+
(6)
–
(8)
(12)
+
(13)
–
1 IN+
1 IN–
2 OUT
3 IN+
3 IN–
4 OUT
(3)
(2)
(7)
(10)
(9)
(14)
TL084Y
1 OUT
2 IN+
2 IN–
3 OUT
4 IN+
4 IN–
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%
ALL DIMENSIONS ARE IN MILS
PIN (11) INTERNALLY CONNECTED
SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
TL08_C
TL08_AC
TL08_BC
Supply voltage, V
Supply voltage VCC– (see Note 1)–18–18–18V
Differential input voltage (see Note 2)
Input voltage (see Notes 1 and 3)±15±15±15V
Duration of output short circuit (see Note 4)unlimitedunlimitedunlimited
Continuous total dissipationSee Dissipation Rating Table
Operating free-air temperature range0 to 70– 40 to 85– 55 to 125°C
Storage temperature range– 65 to 150– 65 to 150– 65 to 150
Case temperature for 60 secondsFK package260
Lead temperature 1,6 mm (1/16 inch)
from case for 60 seconds
Lead temperature 1,6 mm (1/16 inch)
from case for 10 seconds
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
(see Note 1)181818V
CC+
± 30
J or JG package300°C
D, N, P, or PW package260260°C
TL08_ITL08_MUNIT
± 30± 30V
°C
°C
CC+
and V
CC–
.
DISSIPATION RATING TABLE
PACKAGE
D (8 Pin)680 mW5.8 mW/°C32°C464 mW377 mWN/A
D (14 Pin)680 mW
FK680 mW11.0 mW/°C88°C680 mW680 mW275 mW
J680 mW11.0 mW/°C88°C680 mW680 mW275 mW
JG680 mW8.4 mW/°C69°C672 mW546 mW210 mW
N680 mW9.2 mW/°C76°C680 mW598 mWN/A
P680 mW
PW (8 Pin)525 mW
PW (14 Pin)700 mW5.6 mW/°C25°C448 mWN/AN/A
TA ≤ 25°C
POWER RATING
DERATING
FACTOR
7.6 mW/ °C
8.0 mW/°C
4.2 mW/°C
DERATE
ABOVE T
60°C608 mW494 mWN/A
65°C640 mW520 mWN/A
25°C336 mWN/AN/A
TA = 70°C
POWER RATING
A
TA = 85°C
POWER RATING
POWER RATING
TA = 125°C
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS
77251–1443
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