Texas Instruments TL062MJGB, TL064CPWR, TL064CPWLE, TL064CNSR, TL064CN Datasheet

...

TL061, TL061A, TL061B, TL061Y, TL062, TL062A

TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y

LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Very Low Power Consumption

Typical Supply Current...200 µA (Per Amplifier)

Wide Common-Mode and Differential Voltage Ranges

Low Input Bias and Offset Currents

Common-Mode Input Voltage Range Includes V

CC+

Output Short-Circuit Protection

High Input Impedance...JFET-Input Stage

Internal Frequency Compensation

Latch-Up-Free Operation

High Slew Rate...3.5 V/µs Typ

description

The JFET-input operational amplifiers of the TL06_ series are designed as low-power versions of the TL08_ series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset and input bias currents. The TL06_ series feature the same terminal assignments as the TL07_ and TL08_ series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit.

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C, and the M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

1 2 3 4

8 7 6 5

OFFSET N1

IN– IN+

CC–

NC V

CC+

OUT OFFSET N2

TL061, TL061A, TL061B

D, JG, P, OR PW PACKAGE

(TOP VIEW)

1 2 3 4

8 7 6 5

1OUT

1IN–

1IN+

CC–

CC+

2OUT 2IN– 2IN+

TL062, TL062A, TL062B

D, JG, P, OR PW PACKAGE

(TOP VIEW)

1 2 3 4 5

9 8 7 6

OFFSET N1

IN– IN+

CC–

NC NC V

CC+

OUT OFFSET N2

TL061 ...U PACKAGE

(TOP VIEW)

1 2 3 4 5 6 7

14 13 12 11 10

9 8

1OUT

1IN–

1IN+

CC+

2IN+

2IN–

2OUT

4OUT 4IN– 4IN+ V

CC–

3IN+ 3IN– 3OUT

TL064 . . . D, J, N, PW, OR W PACKAGE

TL064A, TL064B ...D OR N PACKAGE

(TOP VIEW)

•

1 2 3 4 5

9 8 7 6

1OUT

1IN– 1IN+

CC–

NC V

CC+

2OUT 2IN– 2IN+

TL062 ...U PACKAGE

(TOP VIEW)

•

NC – No internal connection

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NC 2OUT NC 2IN– NC

3212019

910111213

4 5 6 7 8

18 17 16 15 14

NC V

CC+

NC OUT NC

IN–

IN+

TL061 ...FK PACKAGE

(TOP VIEW)

OFFSET N1

OFFSET N2

3212019

910111213

4 5 6 7 8

18 17 16 15 14

4IN+ NC V

CC–

NC 3IN+

1IN+

CC+

2IN+

1IN–

1OUT

3OUT

3IN–

4OUT

4IN–

2IN–

2OUT

3 2 1 20 19

910111213

4 5 6 7 8

18 17 16 15 14

1IN–

1IN+

TL062 . . . FK PACKAGE

(TOP VIEW)

1OUT

2IN+

CC–

CC+

TL064 . . . FK PACKAGE

(TOP VIEW)

NC – No internal connection

CC–

AVAILABLE OPTIONS

PACKAGED DEVICES

VIOMAX

AT 25°C

SMALL

OUTLINE

(D008)

†

SMALL

OUTLINE

(D014)

†

PLASTIC

DIP

(N)

PLASTIC

DIP

(P)

TSSOP

(PW)

CHIP FORM

(Y)

15 mV TL061CD TL061CP TL061CPW TL061Y

15 mV

6 mV

TL061CD

TL061ACD

TL061CP

TL061ACP

TL061CPW

TL061Y

3 mV TL061BCD TL061BCP

0°C

15 mV TL062CD TL062CP TL062CPW TL062Y

15 mV

6 mV

TL062CD

TL062ACD

TL062CP

TL062ACP

TL062CPW

TL062Y

70°C

3 mV TL062BCD TL062BCP

15 mV TL064CD TL064CN TL064CPW TL064Y

6 mV TL064ACD TL064ACN 3 mV TL064BCD TL064BCN

PACKAGE

VIOMAX AT 25°C

SMALL

OUTLINE

(D008)

†

SMALL

OUTLINE

(D014)

†

CHIP

CARRIER

(FK)

CERAMIC

DIP

(J)

CERAMIC

DIP

(JG)

PLASTIC

DIP

(N)

PLASTIC

DIP (P)

FLAT

PACK

(U)

FLAT

PACK

(W)

–40°C

40 C

6 mV

TL061ID

TL064ID TL064IN

TL061IP

85°C

TL062ID

TL062IP

–55°C 6 mV TL061MFK TL061MJG TL061MU

to 6 mV TL062MFK TL062MJG TL062MU

125°C 9 mV TL064MFK TL064MJ TL064MW

†

The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL061CDR).

TL061, TL061A, TL061B, TL061Y, TL062, TL062A

TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y

LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

symbol (each amplifier)

+ –

IN+

IN–

OUT

OFFSET N1

Offset Null/Compensation

TL061 Only

OFFSET N2

schematic (each amplifier)

IN+

50 Ω

100 Ω

CC+

OUT V

CC–

OFFSET N1

TL061 Only

OFFSET N2

IN–

C1 = 10 pF on TL061, TL062, and TL064 Component values shown are nominal.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL061Y chip information

This chip, when properly assembled, has characteristics similar to the TL061. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

–

OUT

IN+

IN–

CC+

(7)

(3)

(2)

(6)

(4)

CC–

(1)

(5)

OFFSET N1

OFFSET N2

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum TJ(max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (4) is Internally Connected to Backside of Chip.

(6)

(7)

(8)

(1) (2)

(3)

(4)(5)

TL061, TL061A, TL061B, TL061Y, TL062, TL062A

TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y

LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL062Y chip information

This chip, when properly assembled, has characteristics similar to the TL062. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum TJ(max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (4) is Internally Connected to Backside of Chip.

–

1OUT

1IN+

1IN–

CC+

(8)

(6)

(3)

(2)

(5)

(1)

–

(7)

2IN+

2IN–

2OUT

(4)

CC–

(6) (5)

(4)

(3)(2)(1)

(8)

(7)

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL064Y chip information

This chip, when properly assembled, has characteristics similar to the TL064. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum TJ(max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (11) is Internally Connected to Backside of Chip.

–

1OUT

1IN+

1IN–

CC+

(4)

(6)

(3)

(2)

(5)

(1)

–

(7)

2IN+

2IN–

2OUT

(11)

CC–

–

4OUT

4IN+

4IN–

(13)

(10)

(9)

(12)

(8)

–

(14)

3OUT

3IN+

3IN–

110

(13)

(14)

(1)

(2)

(3) (5) (6)

(7)

(8)

(9)

(10)

(12)

(11)

(4)

TL061, TL061A, TL061B, TL061Y, TL062, TL062A

TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y

LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

TL06_C TL06_AC TL06_BC

TL06_I TL06_M UNIT

Supply voltage, V

CC+

(see Note 1) 18 18 18 V

Supply voltage, V

CC–

(see Note 1) –18 –18 –18 V Differential input voltage, VID (see Note 2) ±30 ±30 ±30 V Input voltage, VI (see Notes 1 and 3) ±15 ±15 ±15 V Duration of output short circuit (see Note 4) unlimited unlimited unlimited Continuous total dissipation See Dissipation Rating Table Storage temperature range, T

stg

–65 to 150 –65 to 150 –65 to 150 °C

Case temperature for 60 seconds FK package 260 °C

J, JG, U, or

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds

,,,

W package

300

°C

D, N, P, or

Lead temperature 1,6 mm (1/6 inch) from case for 10 seconds

PW package

260

°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values except differential voltages are with respect to the midpoint between V

CC+

and V

CC–

2. Differential voltages are at IN+ with respect to IN–.

3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING

FACTOR

DERATE

ABOVE T

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

TA = 125°C

POWER RATING

D (8 pin) 680 mW 5.8 mW/°C 33°C 465 mW 378 mW N/A

D (14 pin) 680 mW 7.6 mW/°C 60°C 604 mW 490 mW N/A

FK 680 mW 1 1.0 mW/°C 88°C 680 mW 680 mW 273 mW

J 680 mW 1 1.0 mW/°C 88°C 680 mW 680 mW 273 mW

JG 680 mW 8.4 mW/°C 69°C 672 mW 546 mW 210 mW

N 680 mW 9.2 mW/°C 76°C 680 mW 597 mW N/A P 680 mW 8.0 mW/°C 65°C 640 mW 520 mW N/A

PW (8 pin) 525 mW 4.2 mW/°C 25°C 336 mW N/A N/A

PW (14 pin) 700 mW 5.6 mW/°C 25°C 448 mW N/A N/A

U 675 mW 5.4 mW/°C 25°C 432 mW 351 mW 135 mW

W 680 mW 8.0 mW/°C 65°C 640 mW 520 mW 200 mW

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Texas Instruments TL062MJGB, TL064CPWR, TL064CPWLE, TL064CNSR, TL064CN Datasheet

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