TEXAS INSTRUMENTS TIBPAL16R4-10C, TIBPAL16R6-10C, TIBPAL16R8-10C, TIBPAL16R4-12M, TIBPAL16R6-12M Technical data
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TIBPAL16L8-10C, TIBPAL16R4-10C, TIBPAL16R6-10C, TIBPAL16R8-10C
TIBPAL16L8-12M, TIBPAL16R4-12M, TIBPAL16R6-12M, TIBPAL16R8-12M
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
CIRCUITS
• High-Performance Operation:
f
(w/o feedback)
max
TIBPAL16R’-10C Series . . . 62.5 MHz Min
TIBPAL16R’-12M Series . . . 56 MHz Min
f
(with feedback)
max
TIBPAL16R’-10C Series . . . 55.5 MHz Min
TIBPAL16R’-12M Series . . . 48 MHz Min
Propagation Delay
TIBPAL16L’-10C Series . . . 10 ns Max
TIBPAL16L’-12M Series . . . 12 ns Max
• Functionally Equivalent, but Faster than,
Existing 20-Pin PLDs
• Preload Capability on Output Registers
Simplifies Testing
• Power-Up Clear on Registered Devices (All
Register Outputs are Set Low, but Voltage
Levels at the Output Pins Go High)
• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs
• Security Fuse Prevents Duplication
• Dependable Texas Instruments Quality and
Reliability
DEVICE
PAL16L8 10 2 0 6
PAL16R4 8 0 4 (3-state buffers) 4
PAL16R6 8 0 6 (3-state buffers) 2
PAL16R8 8 0 8 (3-state buffers) 0
I
INPUTS
description
3-STATE
O OUTPUTS
REGISTERED
Q OUTPUTS
I/O
PORT
S
TIBPAL16L8’
C SUFFIX . . . J OR N PACKAGE
M SUFFIX . . . J PACKAGE
(TOP VIEW)
I
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
GND
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
I
I
I
I
I
10
TIBPAL16L8’
(TOP VIEW)
I
I
3 2 1 20 19
4
5
6
7
8
910111213
I
V
20
CC
O
19
I/O
18
I/O
17
I/O
16
15
I/O
14
I/O
13
I/O
12
O
11
I
CC
I
O
V
I/O
18
I/O
17
I/O
16
I/O
15
I/O
14
I
O
I/O
GND
Pin assignments in operating mode
These programmable array logic devices feature high speed and functional equivalency when compared with
currently available devices. These IMPACT-X circuits combine the latest Advanced Low-Power Schottky
technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for
conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically
results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board
space.
All of the register outputs are set to a low level during power up. Extra circuitry has been provided to allow loading
of each register asynchronously to either a high or low state. This feature simplifies testing because the registers
can be set to an initial state prior to executing the test sequence.
The TIBPAL16’ C series is characterized from 0°C to 75°C. The TIBPAL16’ M series is characterized for
operation over the full military temperature range of –55°C to 125°C.
These devices are covered by U.S. Patent 4,410,987.
IMPACT-X is a trademark of Texas Instruments Incorporated.
PAL is a registered trademark of Advanced Micro Devices Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1992, Texas Instruments Incorporated
1
TIBPAL16R4-10C, TIBPAL16R6-10C, TIBPAL16R8-10C
TIBPAL16R4-12M, TIBPAL16R6-12M, TIBPAL16R8-12M
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
CIRCUITS
TIBPAL16R4’
C SUFFIX . . . J OR N PACKAGE
M SUFFIX . . . J PACKAGE
(TOP VIEW)
CLK
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
GND
C SUFFIX . . . J OR N PACKAGE
M SUFFIX . . . J PACKAGE
GND
CLK
I
I
I
I
I
I
I
I
10
TIBPAL16R6’
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
V
I/O
I/O
Q
Q
Q
Q
I/O
I/O
OE
V
I/O
Q
Q
Q
Q
Q
Q
I/O
OE
CC
CC
TIBPAL16R4’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
(TOP VIEW)
CC
I
CLK
I/O
V
18
17
16
15
14
3 2 1 20 19
I
4
I
5
I
6
I
7
I
8
910111213
I
I
I/O
I/O
OE
GND
TIBPAL16R6’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
(TOP VIEW)
I
GND
CLK
OE
CC
V
I/O
I/O
18
17
16
15
14
Q
3 2 1 20 19
I
4
I
5
I
6
I
7
I
8
910111213
I
I
I/O
Q
Q
Q
Q
Q
Q
Q
Q
Q
TIBPAL16R8’
C SUFFIX . . . J OR N PACKAGE
M SUFFIX . . . J PACKAGE
(TOP VIEW)
CLK
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
GND
Pin assignments in operating mode
2
10
V
20
CC
Q
19
Q
18
Q
17
Q
16
15
Q
14
Q
13
Q
12
Q
11
OE
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TIBPAL16R8’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
(TOP VIEW)
I
GND
CLK
OE
CC
V
Q
Q
18
17
16
15
14
Q
3 2 1 20 19
I
4
I
5
I
6
I
7
I
8
910111213
I
I
Q
Q
Q
Q
Q
functional block diagrams (positive logic)
TIBPAL16L8-10C, TIBPAL16R4-10C
TIBPAL16L8-12M, TIBPAL16R4-12M
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
TIBPAL16L8 ’
CIRCUITS
OE
CLK
10 16
I
16 x
&
32 X 64
166
TIBPAL16R4’
7
7
7
7
7
7
7
7
6
EN
≥1
O
O
I/O
I/O
I/O
I/O
I/O
I/O
EN 2
C1
denotes fused inputs
816
I
16 x
4
164
&
32 X 64
1D
I = 0
2
Q
Q
Q
Q
I/O
I/O
I/O
I/O
8
8
8
8
7
7
7
7
4
≥1
≥1
EN
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TIBPAL16R6-10C, TIBPAL16R8-10C
TIBPAL16R6-12M, TIBPAL16R8-12M
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
functional block diagrams (positive logic)
CIRCUITS
TIBPAL16R6 ’
OE
CLK
816
I
16 x
6
162
&
32 X 64
EN 2
C1
1D
I = 0
2
Q
Q
Q
Q
Q
Q
I/O
I/O
8
8
8
8
8
8
7
7
2
≥1
≥1
EN
6
OE
CLK
denotes fused inputs
816
I
16 x
168
TIBPAL16R8’
&
32 X 64
EN 2
C1
1D
I = 0
2
Q
Q
Q
Q
Q
Q
Q
Q
8
8
8
8
8
8
8
8
8
≥1
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1
I
First
Fuse
Numbers
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
I
0 4 8 12 16 20 24 28 31
0
32
64
96
128
160
192
224
256
288
320
352
384
416
448
480
512
544
576
608
640
672
704
736
768
800
832
864
896
928
960
992
1024
1056
1088
1120
1152
1184
1216
1248
1280
1312
1344
1376
1408
1440
1472
1504
1536
1568
1600
1632
1664
1696
1728
1760
1792
1824
1856
1888
1920
1952
1984
2016
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
Increment
TIBPAL16L8-10C
TIBPAL16L8-12M
CIRCUITS
19
O
18
I/O
17
I/O
16
I/O
15
I/O
14
I/O
13
I/O
12
O
11
I
Fuse number = First fuse number + Increment
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TIBPAL16R4-10C
TIBPAL16R4-12M
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
logic diagram (positive logic)
1
CLK
First
Fuse
Numbers
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
I
0 4812 16 20 24 28 31
0
32
64
96
128
160
192
224
256
288
320
352
384
416
448
480
512
544
576
608
640
672
704
736
768
800
832
864
896
928
960
992
1024
1056
1088
1120
1152
1184
1216
1248
1280
1312
1344
1376
1408
1440
1472
1504
1536
1568
1600
1632
1664
1696
1728
1760
1792
1824
1856
1888
1920
1952
1984
2016
Fuse number = First fuse number + Increment
Increment
CIRCUITS
I = 0
1D
I = 0
1D
I = 0
1D
I = 0
1D
C1
C1
C1
C1
19
18
17
16
15
14
13
12
11
I/O
I/O
Q
Q
Q
Q
I/O
I/O
OE
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1
CLK
First
Fuse
Numbers
2
I
3
I
4
I
5
I
6
I
7
I
8
I
9
I
Fuse number = First fuse number + Increment
0 4 8 12 16 20 24 28 31
0
32
64
96
128
160
192
224
256
288
320
352
384
416
448
480
512
544
576
608
640
672
704
736
768
800
832
864
896
928
960
992
1024
1056
1088
1120
1152
1184
1216
1248
1280
1312
1344
1376
1408
1440
1472
1504
1536
1568
1600
1632
1664
1696
1728
1760
1792
1824
1856
1888
1920
1952
1984
2016
HIGH-PERFORMANCE IMPACT-X PAL
SRPS017 – D3023, MA Y 1987 – REVISED MARCH 1992
Increment
TIBPAL16R6-10C
TIBPAL16R6-12M
CIRCUITS
19
I/O
I = 0
1D
C1
I = 0
1D
C1
I = 0
1D
C1
I = 0
1D
C1
I = 0
1D
C1
I = 0
1D
C1
18
17
16
15
14
13
12
11
Q
Q
Q
Q
Q
Q
I/O
OE
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
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