TEXAS INSTRUMENTS THS4504, 4505 Technical data
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
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−
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
FEATURES
D Fully Differential Architecture
D Bandwidth: 260 MHz
D Slew Rate: 1800 V/µs
D IMD
D OIP
: −73 dBc at 30 MHz
3
: 29 dBm at 30 MHz
3
D Output Common-Mode Control
D Wide Power Supply Voltage Range: 5 V, ±5 V,
12 V, 15 V
D Input Common-Mode Range Shifted to
Include the Negative Power Supply Rail
D Power-Down Capability (THS4504)
D Evaluation Module Available
DESCRIPTION
The THS4504 and THS4505 are high-performance fully
differential amplifiers from Texas Instruments. The
THS4504, featuring power-down capability, and the
THS4505, without power-down capability, set new
performance standards for fully differential amplifiers
with unsurpassed linearity, supporting 12-bit operation
through 40 MHz. Package options include the 8-pin
SOIC and the 8-pin MSOP with PowerPAD for a
smaller footprint, enhanced ac performance, and
improved thermal dissipation capability.
APPLICATION CIRCUIT DIAGRAM
APPLICATIONS
D High Linearity Analog-to-Digital Converter
Preamplifier
D Wireless Communication Receiver Chains
D Single-Ended to Differential Conversion
D Differential Line Driver
D Active Filtering of Differential Signals
1
V
IN−
OCM
V
S+
2
3
4
V
V
OUT+
RELATED DEVICES
DEVICE(1) DESCRIPTION
THS4504/5 260 MHz, 1800 V/µs, V
THS4500/1 370 MHz, 2800 V/µs, V
THS4502/3 370 MHz, 2800 V/µs, Centered V
THS4120/1 3.3 V , 100 MHz, 43 V/µs, 3.7 nV√Hz
THS4130/1 ±15 V, 150 MHz, 51 V/µs, 1.3 nV√Hz
THS4140/1 ±15 V, 160 MHz, 450 V/µs, 6.5 nV√Hz
THS4150/1 ±15 V, 150 MHz, 650 V/µs, 7.6 nV√Hz
(1)
Even numbered devices feature power-down capability
8.2 pF
8
7
6
5
V
IN+
PD
V
S−
V
OUT−
Includes V
ICR
Includes V
ICR
S−
S−
ICR
499 Ω
5 V
5 V
ADC
12 Bit/80 MSps
V
ref
Copyright 2002, Texas Instruments Incorporated
50 Ω
V
S
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
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487 Ω
53.6 Ω
1 µF
523 Ω
+
V
−
OCM
0.1 µF 10 µF
−
+
24.9 Ω
IN
IN
24.9 Ω
499 Ω
8.2 pF
(1)
PACKAGE
θ
JC
θ
JA
(1)
Supply voltage
V
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
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ABSOLUTE MAXIMUM RATINGS
over operat i n g f ree-air temperature range unless otherwise noted
UNIT
Supply voltage, V
Input voltage, V
Output current, IO
S
I
(2)
Differential input voltage, V
ID
16.5 V
±V
S
150 mA
4 V
Continuous power dissipation See Dissipation Rating Table
Maximum junction temperature, T
Operating free-air temperature range, T
Storage temperature range, T
J
A
stg
Lead temperature
1,6 mm (1/16 inch) from case for 10 seconds
(1)
Stresses above these ratings may cause permanent damage.
150°C
−40°C to 85°C
−65°C to
150°C
300°C
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2)
The THS450x may incorporate a PowerPAD on the underside of
the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure
to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI
technical brief SLMA002 for more information about utilizing the
PowerPAD thermally enhanced package.
PIN ASSIGNMENTS
THS4504
(TOP VIEW)
D AND DGN
(1)
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible t o damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE DISSIPATION RATINGS
θ
(°C/W)
θ
(°C/W)
D (8 pin) 38.3 167 740 mW 390 mW
DGN (8 pin) 4.7 58.4 2.14 W 1.11 W
POWER RATING
TA ≤ 25°C TA = 85°C
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
Dual supply ±5 ±7.5
Single supply 4.5 5 15
Operating free-air temperature, TA−40 85 °C
PACKAGE/ORDERING INFORMATION
ORDERABLE PACKAGE AND NUMBER
PLASTIC
SMALL OUTLINE
(1)
(D)
THS4504D THS4504DGN BDB
THS4505D THS4505DGN BDC
(1)
This package is available taped and reeled. To order this
packaging option, add an R suffix to the part number (e.g.,
THS4504DR).
THS4505
(TOP VIEW)
PLASTIC MSOP
(DGN)
D AND DGN
PACKAGE
MARKING
V
1
IN−
V
2
OCM
V
3
S+
V
4
OUT+
V
8
IN+
7
PD
6
V
S−
V
5
OUT−
V
1
IN−
V
2
OCM
V
3
S+
V
4
OUT+
V
8
IN+
7
NC
6
V
S−
V
5
OUT−
2
MIN/
PARAMETER
TEST CONDITIONS
MIN/
/
Small-signal bandwidth
2nd harmonic
3rd harmonic
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SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
ELECTRICAL CHARACTERISTICS VS = ±5 V
Rf = Rg = 499 Ω, RL = 800 Ω, G = +1, Single-ended input unless otherwise noted.
THS4504 AND THS4505
TYP OVER TEMPE R ATURE
25°C 25°C
AC PERFORMANCE
G = 1, PIN= −20 dBm, Rf = 499 Ω 260 MHz Typ
G = 2, PIN= −20 dBm, Rf = 499 Ω 110 MHz Typ
G = 5, PIN= −20 dBm, Rf = 499 Ω 40 MHz Typ
G = 10, PIN = −20 dBm, Rf = 499 Ω 20 MHz Typ
Gain-bandwidth product G > +10 210 MHz Typ
Bandwidth for 0.1dB flatness PIN = −20 dBm 65 MHz Typ
Large-signal bandwidth G = 1, VP = 2 V 250 MHz Typ
Slew rate 4 VPP Step 1800 V/µs Typ
Rise time 2 VPP Step 0.8 ns Typ
Fall time 2 VPP Step 1 ns Typ
Settling time to 0.01% VO = 4 V
0.1% VO = 4 V
Harmonic distortion G = 1, VO = 2 V
Third-order intermodulation
distortion
Third-order output intercept point
Input voltage noise f > 1 MHz 8 nV/√Hz Typ
Input current noise f > 100 kHz 2 pA/√Hz Typ
Overdrive recovery time Overdrive = 5.5 V 60 ns Typ
VO = 2 VPP, fc = 30 MHz,
Rf = 499 Ω, 200 kHz tone spacing
fc = 30 MHz, Rf = 499 Ω,
Referenced to 50 Ω
PP
PP
PP
f = 8 MHz −79 dBc Typ
f = 30 MHz −66 dBc Typ
f = 8 MHz −93 dBc Typ
f = 30 MHz −65 dBc Typ
100 ns Typ
20 ns Typ
−73 dBc Typ
29 dBm Typ
0°C to
70°C
−40°C to
85°C
UNITS
TYP
MAX
Typ
DC PERFORMANCE
Open-loop voltage gain 55 52 50 50 dB Min
Input offset voltage −4 −7 / −1 −8 / 0 −9 / +1 mV Max
Average offset voltage drift ±10 ±10 µV/°C Typ
Input bias current 4 4.6 5 5.2 µA Max
Average bias current drift ±10 ±10 nA/°C Typ
Input offset current 0.5 1 2 2 µA Max
Average offset current drift ±40 ±40 nA/°C Typ
INPUT
Common-mode input range −5.7 / 2.6 −5.4 / 2.3 −5.1 / 2 −5.1 / 2 V Min
Common-mode rejection ratio 80 74 70 70 dB Min
Input impedance 107 || 1 Ω || pF Typ
OUTPUT
Differential output voltage swing RL = 1 kΩ ±8 ±7.6 ±7.4 ±7.4 V Min
Differential output current drive RL = 20 Ω 130 110 100 100 mA Min
Output balance error PIN = −20 dBm, f = 100 kHz −65 dB Typ
Closed-loop output impedance
(single-ended)
f = 1 MHz 0.1 Ω Typ
3
MIN/
PARAMETER
TEST CONDITIONS
MIN/
/
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
ELECTRICAL CHARACTERISTICS VS = ±5 V (continued)
Rf = Rg = 499 Ω, RL = 800 Ω, G = +1, Single-ended input unless otherwise noted.
THS4504 AND THS4505
TYP OVER TEMPE R ATURE
25°C 25°C
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth RL = 400 Ω 200 MHz Typ
Slew rate 2 VPP step 92 V/µs Typ
Minimum gain 1 0.98 0.98 0.98 V/V Min
Maximum gain 1 1.02 1.02 1.02 V/V Max
Common-mode offset voltage −0.4 −4.6/+3.8 −6.6/+5.8 −7.6/+6.8 mV Max
Input bias current V
Input voltage range ±4 ±3.7 ±3.4 ±3.4 V Min
Input impedance 25 || 1 kΩ || pF Typ
Maximum default voltage V
Minimum default voltage V
POWER SUPPLY
Specified operating voltage ±5 ±7.5 ±7.5 ±7.5 V Max
Maximum quiescent current 16 20 23 25 mA Max
Minimum quiescent current 16 13 11 9 mA Min
Power supply rejection (±PSRR) 80 76 73 70 dB Min
= 2.5 V 100 150 170 170 µA Max
OCM
left floating 0 0.05 0.10 0.10 V Max
OCM
left floating 0 −0.05 −0.10 −0.10 V Min
OCM
0°C to
70°C
−40°C to
85°C
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UNITS
TYP
MAX
POWER DOWN (THS4505 ONL Y)
Enable voltage threshold Device enabled ON above –2.9 V −2.9 V Min
Disable voltage threshold Device disabled OFF below –4.3 V −4.3 V Max
Power-down quiescent current 800 1000 1200 1200 µA Max
Input bias current 200 240 260 260 µA Max
Input impedance 50 || 1 kΩ || pF Typ
Turnon time delay 1000 ns Typ
Turnoff time delay 800 ns Typ
4
MIN/
PARAMETER
TEST CONDITIONS
MIN/
/
Small-signal bandwidth
2nd harmonic
3rd harmonic
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SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
ELECTRICAL CHARACTERISTICS VS = 5 V
Rf = Rg = 499 Ω, RL = 800 Ω, G = +1, Single-ended input unless otherwise noted.
THS4504 AND THS4505
TYP OVER TEMPERATURE
25°C 25°C
AC PERFORMANCE
G = 1, PIN = −20 dBm, Rf = 499 Ω 210 MHz Typ
G = 2, PIN = −20 dBm, Rf = 499 Ω 120 MHz Typ
G = 5, PIN = −20 dBm, Rf = 499 Ω 40 MHz Typ
G = 10, PIN = −20 dBm, Rf = 499 Ω 20 MHz Typ
Gain-bandwidth product G > +10 200 MHz Typ
Bandwidth for 0.1 dB flatness PIN = −20 dBm 100 MHz Typ
Large-signal bandwidth G = 1, VP = 1 V 200 MHz Typ
Slew rate 2 VPP Step 900 V/µs Typ
Rise time 2 VPP Step 1.1 ns Typ
Fall time 2 VPP Step 1 ns Typ
Settling time to 0.01% VO = 2 V Step 100 ns Typ
0.1% VO = 2 V Step 20 ns Typ
Harmonic distortion G = 1, VO = 2 V
f = 8 MHz, −77 dBc Typ
f = 30 MHz −56 dBc Typ
f = 8 MHz −74 dBc Typ
f = 30 MHz −57 dBc Typ
Third-order intermodulation
distortion
Third-order output intercept point
Input voltage noise f > 1 MHz 8 nV/√Hz Typ
Input current noise f > 100 kHz 2 pA/√Hz Typ
Overdrive recovery time Overdrive = 5.5 V 60 ns Typ
VO = 2 VPP, fc = 30 MHz,
Rf = 499 Ω, 200 kHz tone spacing
fc = 30 MHz, Rf = 499 Ω,
Referenced to 50 Ω
PP
−72 dBc Typ
28 dBm Typ
0°C to
70°C
−40°C to
85°C
UNITS
TYP
MAX
Typ
DC PERFORMANCE
Open-loop voltage gain 54 51 49 49 dB Min
Input offset voltage −4 −7 / −1 −8 / 0 −9 / +1 mV Max
Average offset voltage drift ±10 ±10 µV/°C Typ
Input bias current 4 4.6 5 5.2 µA Max
Average bias current drift ±10 ±10 nA/°C Typ
Input offset current 0.5 0.7 1.2 1.2 µA Max
Average offset current drift ±20 ±20 nA/°C Typ
INPUT
Common-mode input range −0.7/2.6 −0.4 / 2.3 −0.1 / 2 −0.1 / 2 V Min
Common-mode rejection ratio 80 74 70 70 dB Min
Input impedance 107 || 1 Ω || pF Typ
OUTPUT
Differential output voltage swing RL = 1 kΩ, Referenced to 2.5 V ±3.3 ±3 ±2.8 ±2.8 V Min
Output current drive RL = 20 Ω 110 90 80 80 mA Min
Output balance error PIN = −20 dBm, f = 100 kHz −38 dB Typ
Closed-loop output impedance
(single-ended)
f = 1 MHz 0.1 Ω Typ
5
PARAMETER
TEST CONDITIONS
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
ELECTRICAL CHARACTERISTICS VS = 5 V (continued)
Rf = Rg = 499 Ω, RL = 800 Ω, G = +1, Single-ended input unless otherwise noted.
THS4504 AND THS4505
TYP OVER TEMPERATURE
25°C 25°C
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth RL = 400 Ω 160 MHz Typ
Slew rate 2 VPP Step 80 V/µs Typ
Minimum gain 1 0.98 0.98 0.98 V/V Min
Maximum gain 1 1.02 1.02 1.02 V/V Max
Common-mode offset voltage 0.4 −2.6/3.4 −4.2/5.4 −5.6/6.4 mV Max
Input bias current V
Input voltage range 1 / 4 1.2 / 3.8 1.3 / 3.7 1.3 / 3.7 V Min
Input impedance 25 || 1 kΩ || pF Typ
Maximum default voltage V
Minimum default voltage V
POWER SUPPLY
Specified operating voltage 5 15 15 15 V Max
Maximum quiescent current 14 17 19 21 mA Max
Minimum quiescent current 14 11 10 8 mA Min
Power supply rejection (+PSRR) 75 72 69 66 dB Min
= 2.5 V 1 2 3 3 µA Max
OCM
left floating 2.5 2.55 2.6 2.6 V Max
OCM
left floating 2.5 2.45 2.4 2.4 V Min
OCM
0°C to
70°C
−40°C
to 85°C
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UNITS
MIN/
MAX
POWER DOWN (THS4505 ONL Y)
Enable voltage threshold Device enabled ON above 2.1 V 2.1 V Min
Disable voltage threshold Device disabled OFF below 0.7 V 0.7 V Max
Power-down quiescent current 600 800 1200 1200 µA Max
Input bias current 100 125 140 140 µA Max
Input impedance 50 || 1 kΩ || pF Typ
Turnon time delay 1000 ns Typ
Turnoff time delay 800 ns Typ
6
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SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS
Table of Graphs (±5 V)
Small signal unity gain frequency response 1
Small signal frequency response 2
0.1 dB gain flatness frequency response 3
Large signal frequency response 4
Harmonic distortion (single-ended input to differential output) vs Frequency 5
Harmonic distortion (single-ended input to differential output) vs Output voltage swing 6, 7
Harmonic distortion (single-ended input to differential output) vs Load resistance 8
Third order intermodulation distortion (single-ended input to differential output) vs Frequency 9
Third order output intercept point vs Frequency 10
Slew rate vs Differential output voltage step 11
Settling time 12, 13
Large signal transient response 14
Small signal transient response 15
Overdrive recovery 16, 17
Voltage and current noise vs Frequency 18
Rejection ratios vs Frequency 19
Rejection ratios vs Case temperature 20
Output balance error vs Frequency 21
Open-loop gain and phase vs Frequency 22
Open-loop gain vs Case temperature 23
Input bias offset current vs Case temperature 24
Quiescent current vs Supply voltage 25
Input offset voltage vs Case temperature 26
Common-mode rejection ratio vs Input common-mode range 27
Output voltage vs Load resistance 28
Closed-loop output impedance vs Frequency 29
Harmonic distortion (single-ended and differential input to differential output) vs Output common-mode voltage 30
Small signal frequency response at V
Output offset voltage at V
Quiescent current vs Power-down voltage 33
Turnon and turnoff delay times 34
Single-ended output impedance in power down vs Frequency 35
Power-down quiescent current vs Case temperature 36
Power-down quiescent current vs Supply voltage 37
OCM
OCM
vs Output common-mode voltage 32
FIGURE
31
7
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS
Table of Graphs (5 V)
Small signal unity gain frequency response 38
Small signal frequency response 39
0.1 dB gain flatness frequency response 40
Large signal frequency response 41
Harmonic distortion (single-ended input to differential output) vs Frequency 42
Harmonic distortion (single-ended input to differential output) vs Output voltage swing 43, 44
Harmonic distortion (single-ended input to differential output) vs Load resistance 45
Third-order intermodulation distortion vs Frequency 46
Third-order intercept point vs Frequency 47
Slew rate vs Differential output voltage step 48
Settling time 49, 50
Overdrive recovery 51, 52
Large-signal transient response 53
Small-signal transient response 54
Voltage and current noise vs Frequency 55
Rejection ratios vs Frequency 56
Rejection ratios vs Case temperature 57
Output balance error vs Frequency 58
Open-loop gain and phase vs Frequency 59
Open-loop gain vs Case temperature 60
Input bias offset current vs Case temperature 61
Quiescent current vs Supply voltage 62
Input offset voltage vs Case temperature 63
Common-mode rejection ratio vs Input common-mode range 64
Output voltage vs Load resistance 65
Closed-loop output impedance vs Frequency 66
Harmonic distortion (single-ended and differential input) vs Output common-mode voltage 67
Small signal frequency response at V
Output offset voltage vs Output common-mode voltage 69
Quiescent current vs Power-down voltage 70
Turnon and turnoff delay times 71
Single-ended output impedance in power down vs Frequency 72
Power-down quiescent current vs Case temperature 73
Power-down quiescent current vs Supply voltage 74
OCM
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FIGURE
68
8
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SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS (±5 V Graphs)
SMALL SIGNAL UNITY GAIN FREQUENCY
RESPONSE
1
0.5
0
−0.5
−1
−1.5
−2
Gain = 1
−2.5
RL = 800 Ω
Rf = 499 Ω
−3
Small Signal Unity Gain − dB
PIN = −20 dBm
−3.5
VS = ±5 V
−4
0.1 1 10 100 1000
f − Frequency − MHz
Figure 1
LARGE SIGNAL FREQUENCY RESPONSE
25
Gain = 10, Rf = 1.8 kΩ
20
Gain = 5, Rf = 1.8 kΩ
15
10
Gain = 2, Rf = 1.8 kΩ
5
Large Signal Gain − dB
Gain = 1, Rf = 499 Ω
0
−5
0.1 1 10 100 1000
f − Frequency − MHz
RL = 800 Ω
VO = 2 V
VS = ±5 V
PP
Figure 4
SMALL SIGNAL FREQUENCY RESPONSE
22
Gain = 10
20
18
16
Gain = 5
14
12
10
8
Gain = 2
6
RL = 800 Ω
4
Small Signal Gain − dB
Rf =499 Ω
2
PIN = −20 dBm
0
VS = ±5 V
−2
0.1 1 10 100 1000
f − Frequency − MHz
Figure 2
HARMONIC DISTORTION
vs
FREQUENCY
0
Single-Ended Input to
−10
Differential Output
Gain = 1
−20
RL = 800 Ω
−30
Rf = 499 Ω
VO = 2 V
−40
−50
−60
−70
−80
Harmonic Distortion − dBc
−90
−100
0.1 1 10 100
VS = ±5 V
PP
HD2
HD3
f − Frequency − MHz
Figure 5
0.1 dB GAIN FLATNESS
FREQUENCY RESPONSE
0.05
Rf = 499 Ω
0
−0.05
−0.1
−0.15
Gain = 1
−0.2
−0.25
−0.3
RL = 800 Ω
PIN = −20 dBm
VS = ±5 V
1
10 100 1000
f − Frequency − MHz
0.1 dB Gain Flatness − dB
Figure 3
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
0
Single-Ended Input to
−10
Differential Output
Gain = 1
−20
RL = 800 Ω
−30
Rf = 499 Ω
f= 8 MHz
−40
VS = ±5 V
−50
−60
−70
−80
Harmonic Distortion − dBc
−90
−100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VO − Output Voltage Swing − V
HD2
Figure 6
HD3
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
0
Single Input to
−10
Differential Output
Gain = 1
−20
RL = 800 Ω
−30
Rf = 499 Ω
f= 30 MHz
−40
VS = ±5 V
−50
−60
−70
−80
Harmonic Distortion − dBc
−90
−100
HD3
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VO − Output Voltage Swing − V
Figure 7
HD2
HARMONIC DISTORTION
vs
LOAD RESISTANCE
0
−10
−20
−30
−40
−50
−60
−70
Harmonic Distortion − dBc
−80
−90
HD3, 8 MHz
−100
0 400 800 1200 1600
RL − Load Resistance − Ω
HD3, 30 MHz
Single-Ended Input to
Differential Output
Gain = 1
VO = 2 V
PP
Rf = 499 Ω
VS = ±5 V
HD2, 30 MHz
HD2, 8 MHz
Figure 8
THIRD-ORDER INTERMODULATION
DISTORTION
vs
FREQUENCY
−30
Single-Ended Input to
Differential Output
−40
Gain = 1
RL = 800 Ω
−50
Rf = 499 Ω
VS = ±5 V
−60
−70
−80
−90
−100
Third-Order Intermodulation Distortion − dBc
10 100
f − Frequency − MHz
VO = 2 V
PP
VO = 1 V
200 kHz Tone Spacing
Figure 9
PP
9
E
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS (±5 V Graphs)
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THIRD-ORDER OUTPUT INTERCEPT
POINT
vs
60
50
40
30
20
10
3
0
OIP − Third-Order Output Intersept Point − dBm
0 20 40 60 80 100
FREQUENCY
Gain = 1
Rf = 499 Ω
VO = 2 V
VS = ± 5 V
200 kHz Tone Spacing
Normalized to 200 Ω
200 kHz Tone Spacing
f − Frequency − MHz
PP
Normalized to 50 Ω
RL = 800 Ω
Figure 10
SETTLING TIME
3
2
1
0
−1
− Output Voltage − V
O
V
−2
−3
0 5 10 15 20 25 30 35 40
Rising Edge
Gain = 1
RL = 800 Ω
Rf = 499 Ω
f= 1 MHz
VS = ±5 V
t − Time − ns
Falling Edge
SLEW RATE
vs
DIFFERENTIAL OUTPUT VOLTAGE STEP
2000
Gain = 1
1800
RL = 800 Ω
Rf = 499 Ω
1600
sµ
VS = ±5 V
1400
V/
1200
1000
800
600
SR − Slew Rate −
400
200
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
VO − Differential Output Voltage Step − V
Fall
Rise
Figure 11
LARGE-SIGNAL TRANSIENT RESPONSE
2
1.5
1
0.5
0
−0.5
− Output Voltage − V
O
−1
V
−1.5
−2
−100 0 100 200 300 400 500
Gain = 1
RL = 800 Ω
Rf = 499 Ω
tr/tf = 300 ps
VS = ±5 V
t − Time − ns
1.5
1
0.5
0
−0.5
− Output Voltage − V
O
V
−1
−1.5
0 50 100 150 200 250 300
SETTLING TIME
Rising Edge
Gain = 1
RL = 800 Ω
Rf = 499 Ω
f= 1 MHz
VS = ±5 V
Falling Edge
t − Time − ns
Figure 12
SMALL-SIGNAL TRANSIENT RESPONS
0.4
0.3
0.2
0.1
0
−0.1
− Output Voltage − V
O
−0.2
V
−0.3
−0.4
−100 0 100 200 300 400 500
Gain = 1
RL = 800 Ω
Rf = 499 Ω
tr/tf = 300 ps
VS = ±5 V
t − Time − ns
OVERDRIVE RECOVERY
5
Gain = 4
4
RL = 800 Ω
Rf = 499 Ω
3
Overdrive = 4.5 V
2
VS = ±5 V
1
0
−1
−2
−3
Single-Ended Output Voltage − V
−4
−5
0 0.1 0.2 0.3 0.4 0.5 0.6
10
Figure 13
t − Time − µs
Figure 16
0.7 0.8 0.9 1
2.5
2
1.5
1
0.5
0
−0.5
−1
−1.5
−2
−2.5
Figure 14
OVERDRIVE RECOVERY
6
Gain = 4
5
RL = 800 Ω
4
Rf = 499 Ω
Overdrive = 5.5 V
3
VS = ±5 V
2
1
0
−1
−2
− Input Voltage − VV
I
−3
−4
Single-Ended Output Voltage − V
−5
−6
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t − Time − µs
Figure 17
3
2
1
0
−1
−2
−3
Figure 15
VOLTAGE AND CURRENT NOISE
vs
FREQUENCY
100
nV/ Hz
10
− Input Voltage − VV
I
− Voltage Noise −
n
V
1
0.01 0.1 1 10 100
f − Frequency − kHz
Figure 18
V
n
I
n
1000 10 k
pA/ Hz
− Current Noise −
n
I
www.ti.com
0
INPUT OFFSET VOLTAGE
COMMON-MODE REJECTION RATIO
SLOS363A − AUGUST 2002 − REVISED AUGUST 2003
TYPICAL CHARACTERISTICS (±5 V Graphs)
REJECTION RATIOS
vs
90
80
70
60
50
40
30
20
Rejection Ratios − dB
10
0
−10
0.1 1 10 100
FREQUENCY
PSRR−
RL = 800 Ω
VS = ±5 V
f − Frequency − MHz
PSRR+
CMMR
Figure 19
OPEN-LOOP GAIN AND PHASE
vs
60
50
40
30
20
Open-Loop Gain − dB
10
0
0.01 0.1 1 10 100 1000
FREQUENCY
Gain
Phase
f − Frequency − MHz
PIN = −30 dBm
RL = 800 Ω
VS = ±5 V
Figure 22
Rejection Ratios − dB
30
0
−30
°
−60
Phase −
−90
Open-Loop Gain − dB
−120
−150
REJECTION RATIOS
vs
120
100
CASE TEMPERATURE
CMMR
80
60
40
20
0
−40−30−20−10 0 10 20 30 40 50 60 70 80 90
PSRR+
RL = 800 Ω
VS = ±5 V
Case Temperature − °C
Figure 20
OPEN-LOOP GAIN
vs
CASE TEMPERATURE
58
57
56
55
54
53
52
51
50
49
−40−30−20−10 0 10 20 30 40 50 60 70 80 9
Case Temperature − °C
RL = 800 Ω
VS = ±5 V
Figure 23
OUTPUT BALANCE ERROR
vs
10
0
−10
−20
−30
−40
−50
−60
Output Balance Error − dB
−70
−80
0.1 1 10 100
FREQUENCY
PIN = 16 dBm
RL = 800 Ω
Rf = 499 Ω
VS = ±5 V
f − Frequency − MHz
Figure 21
INPUT BIAS AND OFFSET CURRENT
vs
CASE TEMPERATURE
3.4
VS = ±5 V
3.3
Aµ
3.2
3.1
3
2.9
2.8
− Input Bias Current −
2.7
IB
I
2.6
2.5
−40−30−20−100 10 20 30 40 50 60 70 80 90
I
Case Temperature − °C
IB+
I
IB−
I
OS
Figure 24
0
−0.01
Aµ
−0.02
−0.03
−0.04
−0.05
−0.06
− Input Offset Current −
−0.07
OS
I
−0.08
−0.09
QUIESCENT CURRENT
25
20
15
10
Quiescent Current − mA
5
0
SUPPLY VOLTAGE
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VS − Supply Voltage − ±V
Figure 25
vs
TA = 85°C
TA = 25°C
TA = −40°C
CASE TEMPERATURE
5
VS = ±5 V
4
3
2
− Input Offset Voltage − mV
1
OS
V
0
−40−30−20−10 0 10 20 30 40 50 60 70 80 90
Case Temperature − °C
Figure 26
vs
INPUT COMMON-MODE RANGE
110
100
90
80
70
60
50
40
30
20
10
0
−10
CMRR − Common-Mode Rejection Ratio − dB
−6 −5 −4 −3 −2 −1 0 1 2 3 4 5 6
Input Common-Mode Voltage Range − V
VS = ±5 V
Figure 27
vs
11
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