TEXAS INSTRUMENTS THS3092, THS3096 Technical data

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V
OUT
TOTAL HARMONIC DISTORTION
FREQUENCY
TYPICAL ARBITARY WAVEFORM
GENERATOR OUTPUT DRIVE CIRCUIT
−90
−80
−70
−60
−50
−40
−20
1 M 10 M 100 M
f − Frequency − Hz
Total Harmonic Distortion − dBc
G = 5, RF = 715 , RL = 100 , VS = ±15 V
100 k
−30
VO = 20 V
PP
VO = 10 V
PP
VO = 5 V
PP
VO = 2 V
PP
+
+
THS3092
THS3092
+
THS4271
IOUT1
IOUT2
DAC5686
查询THS3092供应商
HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK
OPERATIONAL AMPLIFIERS
FEATURES DESCRIPTION
Low Distortion
66 dBc HD2 at 10 MHz, R – 76 dBc HD3 at 10 MHz, R
Low Noise 13 pA/Hz Noninverting Current Noise and VDSL line drivers. 13 pA/Hz Inverting Current Noise – 2 nV/Hz Voltage Noise
High Slew Rate: 5700 V/µs (G = 5, V
Wide Bandwidth: 160 MHz (G = 5, R
High Output Current Drive: ±250 mA
Wide Supply Range: ±5 V to ±15 V
Power-Down Feature: (THS3096 Only)
APPLICATIONS
High-Voltage Arbitrary Waveform
Power FET Driver
Pin Driver
VDSL Line Driver
L L
= 100 = 100
= 20 V
O
= 100 )
L
)
PP
THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
The THS3092 and THS3096 are dual high-voltage, low-distortion, high speed, current-feedback amplifiers designed to operate over a wide supply range of ±5 V to ±15 V for applications requiring large, linear output signals such as Pin, Power FET,
The THS3096 features a power-down pin (PD) that puts the amplifier in low power standby mode, and lowers the quiescent current from 9.5 mA to 500 µA.
The wide supply range combined with total harmonic distortion as low as -66 dBc at 10 MHz, in addition, to the high slew rate of 5700 V/µs makes the THS3092/6 ideally suited for high-voltage arbitrary waveform driver applications. Moreover, having the ability to handle large voltage swings driving into high-resistance and high-capacitance loads while maintaining good settling time performance makes the THS3092/6 ideal for Pin driver and PowerFET driver applications.
The THS3092 is offered in an 8-pin SOIC (D), and the 8-pin SOIC (DDA) packages with PowerPAD™. The THS3096 is offered in the 8-pin SOIC (D) and the 14-pin TSSOP (PWP) packages with PowerPAD.
UNLESS OTHERWISE NOTED this document contains PRO­DUCTION DATA information current as of publication date. Prod­ucts conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright © 2003–2004, Texas Instruments Incorporated
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1 2 3 4
8 7 6 5
1V
OUT
1V
IN−
1V
IN+
V
S−
V
S+
2V
OUT
2V
IN−
2V
IN+
D, DDATOP VIEW
THS3092
NC = No Internal Connection
D, PWPTOP VIEW
1 2 3 4 5 6 7
9 8
1V
OUT
1V
IN−
1V
IN+
V
S−
V
S+
2V
OUT
2V
IN−
2V
IN+
NC = No Internal Connection
THS3096
See Note A.
NC
REF
NC
NC PD NC
Note A: The devices with the power down option defaults to the ON state if no signal is applied to the PD pin. Additionallly, the REF pin functional range is from VS− to (VS+ − 4 V).
THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
PART NUMBER PACKAGE TYPE TRANSPORT MEDIA, QUANTITY
THS3092D Rails, 75 THS3092DR Tape and Reel, 2500 THS3092DDA Rails, 75 THS3092DDAR Tape and Reel, 2500
Power-down
THS3096D Rails, 75 THS3096DR Tape and Reel, 2500 THS3096PWP Rails, 90 THS3096PWPR Tape and Reel, 2000
ORDERING INFORMATION
SOIC-8
SOIC-8-PP
SOIC-8
TSSOP-14-PP
(1)
(1)
(1) The PowerPAD is electrically isolated from all other pins.
DISSIPATION RATING TABLE
PACKAGE Θ
D-8 38.3 97.5 1.02 W 410 mW
(3)
DDA-8
PWP-14
(1) This data was taken using the JEDEC standard High-K test PCB. (2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long term reliability.
(3) The THS3092 and THS3096 may incorporate a PowerPAD™ on the underside of the chip. This acts as a heatsink and must be
connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD™ thermally enhanced package.
(3)
(°C/W) Θ
JC
9.2 45.8 2.18 W 873 mW
2.07 37.5 2.67 W 1.07 W
JA
(1)
(°C/W)
TA≤ 25°C TA= 85°C
2
POWER RATING
(2)
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SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
Supply voltage V
Operating free-air temperature, T
A
Dual supply ±5 ±15 Single supply 10 30
-40 85 °C
THS3092 THS3096
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted)
Supply voltage, VS-to V Input voltage, V Differential input voltage, V Output current, I Continuous power dissipation See Dissipation Ratings Table Maximum junction temperature, T Maximum junction temperature, continuous operation, long term reliability, T Storage temperature, T Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300°C ESD ratings:
(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may
cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
S+
I
ID
O
J
stg
HBM 2000 CDM 1500 MM 150
(1)
UNIT
33 V ± V
S
± 4 V
350 mA
150°C
(2)
J
125°C
-65°C to 150°C
3
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THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
ELECTRICAL CHARACTERISTICS
VS= ±15 V, RF= 909 , RL= 100 , and G = 2 (unless otherwise noted)
TYP OVER TEMPERATURE
PARAMETER TEST CONDITIONS
AC PERFORMANCE
G = 1, RF= 1.1 k, VO= 200 mV
Small-signal bandwidth, -3 dB
0.1 dB bandwidth flatness G = 2, RF= 909 , VO= 200 mV Large-signal bandwidth G = 5, RF= 715 , VO= 5 V
Slew rate (25% to 75% level) V/µs TYP
Rise and fall time G = 2, VO= 5-V Settling time to 0.1% G = -2, VO= 2 VPPstep 42 Settling time to 0.01% G = -2, VO= 2 VPPstep 72 Harmonic distortion
2nd Harmonic distortion
3rd Harmonic distortion
Input voltage noise f > 10 kHz 2 nV / Hz TYP Noninverting input current noise f > 10 kHz 13 pA / Hz TYP Inverting input current noise f > 10 kHz 13 pA / Hz TYP
Differential gain
Differential phase
Crosstalk RL= 100 , dB
DC PERFORMANCE
Transimpedance VO= ±7.5 V, Gain = 1 850 350 300 300 k MIN Input offset voltage 0.9 3 4 4 mV MAX
Average offset voltage drift ±10 ±10 µV/°C TYP
Noninverting input bias current 4 15 20 20 µA MAX
Average bias current drift ±20 ±20 µA/°C TYP
Inverting input bias current 3.5 15 20 20 µA MAX
Average bias current drift ±20 ±20 µA/°C TYP
Input offset current 1.7 10 15 15 µA MAX
Average offset current drift ±20 ±20 µA/°C TYP
INPUT CHARACTERISTICS
Common-mode input range ±13.6 ±13.3 ±13 ±13 V MIN Common-mode rejection ratio VCM= ±10 V 78 68 65 65 dB MIN Noninverting input resistance 1.3 M TYP Noninverting input capacitance 0.1 pF TYP Inverting input resistance 30 TYP Inverting input capacitance 1.4 pF TYP
G = 2, RF= 909 , VO= 200 mV G = 5, RF= 715 , VO= 200 mV G = 10, RF= 604 , VO= 200 mV
G = 2, VO= 10-V step, RF= 909 4000 G = 5, VO= 20-V step, RF= 715 5700
, RF= 909 5 ns TYP
PP
G = 2, RF= 909 , VO= 2 VPP, f = 10 MHz
G = 2, RL= 150 , TYP RF= 909
G = 2, Ch 1 to 2 60 f = 10 MHz
VCM= 0 V
PP PP PP
PP
PP
PP
RL= 100 66 RL= 1 k 66 RL= 100 76 RL= 1 k 78
NTSC 0.013% PAL 0.011% NTSC 0.020° PAL 0.026°
Ch 2 to 1 56
25°C 25°C UNIT
135 145 160 145
50
150
0°C to -40°C to MIN/TYP/
70°C 85°C MAX
MHz TYP
ns TYP
dBc TYP
4
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SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
ELECTRICAL CHARACTERISTICS (CONTINUED)
VS= ±15 V, RF= 909 , RL= 100 , and G = 2 (unless otherwise noted)
TYP OVER TEMPERATURE
PARAMETER TEST CONDITIONS
OUTPUT CHARACTERISTICS
Output voltage swing V MIN
Output current (sourcing) RL= 40 280 225 200 200 mA MIN Output current (sinking) RL= 40 250 200 175 175 mA MIN Output impedance f = 1 MHz, Closed loop 0.06 TYP
POWER SUPPLY
Specified operating voltage ±15 ±16 ±16 ±16 V MAX Maximum quiescent current 9.5 10.5 11 11 mA MAX Minimum quiescent current 9.5 8.5 8 8 mA MIN Power supply rejection (+PSRR) VS+= 15.5 V to 14.5 V, VS-= 15 V 75 70 65 65 dB MIN Power supply rejection (-PSRR) VS+= 15 V, VS-= -15.5 V to -14.5 V 73 68 65 65 dB MIN
POWER-DOWN CHARACTERISTICS (THS3096 ONLY)
Power-down voltage level V MAX
Power-down quiescent current PD = 0V 500 700 800 800 µA MAX
VPDquiescent current µA MAX
Turnon time delay 90% of final value 60 Turnoff time delay 10% of final value 150
RL= 1 k ±13.2 ±12.8 ±12.5 ±12.5 RL= 100 ±12.5 ±12.1 ±11.8 ±11.8
Per channel
Enable, REF = 0 V 0.8 Power-down , REF = 0 V 2
VPD= 0 V, REF = 0 V, 11 15 20 20 VPD= 3.3 V, REF = 0 V 11 15 20 20
25°C 25°C UNIT
0°C to -40°C to MIN/TYP/
70°C 85°C MAX
µs TYP
THS3092 THS3096
5
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THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
ELECTRICAL CHARACTERISTICS
VS= ±5 V, RF= 909 , RL= 100 , and G = 2 (unless otherwise noted)
TYP OVER TEMPERATURE
PARAMETER TEST CONDITIONS
AC PERFORMANCE
G = 1, RF= 1.1 k, VO= 200 mV
Small-signal bandwidth, -3 dB
0.1 dB bandwidth flatness G = 2, RF= 909 , VO= 200 mV Large-signal bandwidth G = 2, RF= 909 , VO= 5 V
Slew rate (25% to 75% level) V/µs TYP
Rise and fall time G = 2, VO= 5-V step, RF= 909 5 ns TYP Settling time to 0.1% G = -2, VO= 2 VPPstep 35 Settling time to 0.01% G = -2, VO= 2 VPPstep 73 Harmonic distortion
2nd Harmonic distortion
3rd Harmonic distortion
Input voltage noise f > 10 kHz 2 nV / Hz TYP Noninverting input current noise f > 10 kHz 13 pA / Hz TYP Inverting input current noise f > 10 kHz 13 pA / Hz TYP
Differential gain
Differential phase
Crosstalk RL= 100 , dB
DC PERFORMANCE
Transimpedance VO= ±2.5 V, Gain = 1 700 250 200 200 k MIN Input offset voltage 0.3 2 3 3 mV MAX
Average offset voltage drift ±10 ±10 µV/°C TYP
Noninverting input bias current 2 15 20 20 µA MAX
Average bias current drift ±20 ±20 µA/°C TYP
Inverting input bias current 5 15 20 20 µA MAX
Average bias current drift ±20 ±20 µA/°C TYP
Input offset current 1 10 15 15 µA MAX
Average offset current drift ±20 ±20 µA/°C TYP
INPUT CHARACTERISTICS
Common-mode input range ±3.6 ±3.3 ±3 ±3 V MIN Common-mode rejection ratio VCM= ±2.0 V, VO= 0 V 66 60 57 57 dB MIN Noninverting input resistance 1.1 M TYP Noninverting input capacitance 1.2 pF TYP Inverting input resistance 32 TYP Inverting input capacitance 1.5 pF TYP
G = 2, RF= 909 , VO= 200 mV G = 5, RF= 715 , VO= 200 mV G = 10, RF= 604 , VO= 200 mV
G = 2, VO= 5-V step, RF= 909 1050 G = 5, VO= 5-V step, RF= 715 1350
G = 2, RF= 909 , VO= 2 VPP, f = 10 MHz
G = 2, RL= 150 , TYP RF= 909
G = 2, Ch 1 to 2 60 f = 10 kHz
VCM= 0 V
PP PP PP
PP
PP
PP
RL= 100 64 RL= 1 k 67 RL= 100 75 RL= 1 k 75
NTSC 0.027% PAL 0.025% NTSC 0.04° PAL 0.05°
Ch 2 to 1 56
25°C 25°C UNIT
125 140 145 135
42
125
0°C to -40°C to MIN/TYP/
70°C 85°C MAX
MHz TYP
ns TYP
dBc TYP
6
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SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
ELECTRICAL CHARACTERISTICS (CONTINUED)
VS= ±5 V, RF= 909 , RL= 100 , and G = 2 (unless otherwise noted)
TYP OVER TEMPERATURE
PARAMETER TEST CONDITIONS
OUTPUT CHARACTERISTICS
Output voltage swing V MIN
Output current (sourcing) RL= 10 200 160 140 140 mA MIN Output current (sinking) RL= 10 180 150 125 125 mA MIN Output impedance f = 1 MHz, Closed loop 0.09 TYP
POWER SUPPLY
Specified operating voltage ±5 ±4.5 ±4.5 ±4.5 V MAX Maximum quiescent current 8.2 9 9.5 9.5 mA MAX Minimum quiescent current 8.2 7 6.5 6.5 mA MIN Power supply rejection (+PSRR) VS+= 5.5 V to 4.5 V, VS-= -5 V 73 68 63 63 dB MIN Power supply rejection (-PSRR) VS+= 5 V, VS-= -4.5 V to 5.5 V 71 65 60 60 dB MIN
POWER-DOWN CHARACTERISTICS (THS3096 ONLY)
Power-down voltage level V MAX
Power-down quiescent current PD = 0V 300 500 600 600 µA MAX
VPDquiescent current µA MAX
Turnon time delay 90% of final value 60 Turnoff time delay 10% of final value 150
RL= 1 k ±3.4 ±3.1 ±2.8 ±2.8 RL= 100 ±3.1 ±2.7 ±2.5 ±2.5
Per channel
Enable, REF = 0 V 0.8 Power-down , REF = 0 V 2
VPD= 0 V, REF = 0 V, 11 15 20 20 VPD= 3.3 V, REF = 0 V 11 15 20 20
25°C 25°C UNIT
0°C to -40°C to MIN/TYP/
70°C 85°C MAX
µs TYP
THS3092 THS3096
7
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THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
±15-V graphs
Noninverting frequency response 1, 2 Inverting frequency response 3
0.1 dB flatness 4 Noninverting frequency response 5 Inverting frequency response 6 Frequency response capacitive load 7 Recommended R 2nd Harmonic distortion vs Frequency 9, 11 3rd Harmonic distortion vs Frequency 10, 12 Slew rate vs Output voltage step 13, 14, 15 Noise vs Frequency 16 Settling time 17, 18 Quiescent current vs Supply voltage 19 Output voltage vs Load resistance 20 Input bias and offset current vs Case temperature 21 Input offset voltage vs Case temperature 22 Transimpedance vs Frequency 23 Rejection ratio vs Frequency 24 Noninverting small signal transient response 25 Inverting large signal transient response 26, 27 Overdrive recovery time 28 Differential gain vs Number of loads 29 Differential phase vs Number of loads 30 Closed loop output impedance vs Frequency 31 Crosstalk vs Frequency 32 Power-down quiescent current vs Supply voltage 33 Turnon and turnoff time delay 34
ISO
vs Capacitive load 8
8
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THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
TYPICAL CHARACTERISTICS (continued) TABLE OF GRAPHS
FIGURE
±5-V graphs
Noninverting frequency response 35 Inverting frequency response 36
0.1 dB flatness 37 Noninverting frequency response 38 Inverting frequency response 39 Settling time 40 2nd Harmonic distortion vs Frequency 41 3rd Harmonic distortion vs Frequency 42 Slew rate vs Output voltage step 43, 44, 45 Noninverting small signal transient response 46 Output voltage load resistance 47 Input bias and offset current vs Case temperature 48 Overdrive recovery time 49 Rejection ratio vs Frequency 50 Crosstalk vs Frequency 51
9
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f − Frequency − Hz
Noninverting Gain − dB
RF = 499
RF = 1.2 k
Gain = 2, RL = 100 , VO = 200 mVPP, VS = ±15 V
0
1
2
3
4
5
6
7
8
9
1 M 10 M 100 M 1 G
RF = 909
−4
−2
0
2
4
6
8
10
12
14
16
18
20
22
24
1 M 10 M 100 M 1 G
f − Frequency − Hz
Noninverting Gain − dB
G = 10, RF = 604
RL = 100 , VO = 200 mVPP, VS = ±15 V
G = 5, RF = 715
G =2, RF = 909
G =1, RF = 1.1 k
−4
−2
0
2
4
6
8
10
12
14
16
18
20
22
24
1 M
10 M 100 M 1 G
f − Frequency − Hz
Inverting Gain − dB
G = −1, RF = 909
G = −10, RF = 604
G = −5, RF = 715
G = −2, RF = 806
RL = 100 , VO = 200 mVPP, VS = ±15 V
5.7
5.8
5.9
6
6.1
6.2
6.3
100 k
1 M 10 M 100 M
f − Frequency − Hz
Noninverting Gain − dB
Gain = 2, RF = 909 Ω, RL = 200 , VO = 200 mVPP, VS = ±15 V
0
2
4
6
8
10
12
16
1 M 10 M 100 M 1 G
14
f − Frequency − Hz
VO = 5 V
PP
Gain = −5, RF = 715 Ω, RL = 100 , VS = ±15 V
VO = 1 V
PP
VO = 2 V
PP
VO = 10 V
PP
VO = 20 V
PP
Inverting Gain − dB
0
2
4
6
8
10
12
14
16
1 M 10 M 100 M 1 G
f − Frequency − Hz
VO = 2V
PP
VO = 1V
PP
VO = 20V
PP
VO = 10V
PP
VO = 5V
PP
Gain = 5, RF = 715 Ω, RL = 100 , VS = ±15 V
Noninverting Gain − dB
0
5
10
15
20
25
30
35
40
45
10 100
C
L
− Capacitive Load − pF
Recommended
R
ISO
Gain = 5, VS = ±15 V
+
178
715
R
ISO
C
L
−90
−80
−70
−60
−50
−40
100 k 1 M 10 M 100 M
f − Frequency − Hz
2nd Harmonic Destortion − dBc
VS = ±15 V, VO = 2 V
PP
G = 2 RF = 909 Ω, RL = 1 k
G = 2 RF = 909 Ω, RL = 100
G = 1
RF = 1.1 kΩ,
RL = 1 k
G = 1
RF = 1.1 kΩ,
RL = 100
−2
0
2
4
6
8
10
12
14
16
10 M 100 M 1 G
f − Frequency − Hz
Signal Gain − dB
R
(ISO)
= 15
CL = 100 pF
Gain = 5 RL = 100 VS =±15 V
R
(ISO)
= 39.2
CL = 10 pF
R
(ISO)
= 30.9
CL = 22 pF
R
(ISO)
= 20
CL = 47 pF
THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
NONINVERTING NONINVERTING INVERTING
FREQUENCY RESPONSE FREQUENCY RESPONSE FREQUENCY RESPONSE
Figure 1. Figure 2. Figure 3.
TYPICAL CHARACTERISTICS (±15 V)
0.1 dB FLATNESS FREQUENCY RESPONSE FREQUENCY RESPONSE
NONINVERTING INVERTING
Figure 4. Figure 5. Figure 6.
FREQUENCY RESPONSE vs vs
RECOMMENDED R
ISO
2ND HARMONIC DISTORTION
CAPACITIVE LOAD CAPTIVATE LOAD FREQUENCY
10
Figure 7. Figure 8. Figure 9.
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−100
−90
−80
−70
−60
−50
−40
−30
100 k 1 M 10 M 100 M
f − Frequency − Hz
Harmonic Distortion −dBc
G = 5 RF = 715 Ω, RL = 100 Ω,
Vs = ±15 V
VO = 20 V
PP
VO = 10 V
PP
VO = 5 V
PP
VO = 2 V
PP
−90
−80
−70
−60
−50
−40
100 k 1 M 10 M 100 M
f − Frequency − Hz
3rd Harmonic Distortion − dBc
VS = ±15 V, VO = 2 V
PP
G = 1
RF = 1.1 kΩ,
RL = 1 k
G = 2 RF = 909 Ω, R
L
= 1 k
G = 2
RF = 909 Ω,
RL = 100
G = 1
RF = 1.1 kΩ,
RL = 100
−100
−90
−80
−70
−60
−50
−40
−30
100 k
1 M
10 M 100 M
f − Frequency − Hz
Harmonic Distortion −dBc
G = 5 RF = 715 Ω, RL = 100 Ω,
Vs = ±15 V
VO = 20 V
PP
VO = 10 V
PP
VO = 5 V
PP
VO = 2 V
PP
0
500
1000
1500
2000
2500
3000
3500
4000
0 1 2 3 4 5 6 7 8 9 10
SR − Slew Rate − V/
V
O
− Output Voltage −V
PP
sµ
Gain = 2 RL = 100 RF = 909 VS = ±15 V
Fall
Rise
0
1000
2000
3000
4000
5000
6000
0 2 4 6 8 10 12 14 16 18 20
SR − Slew Rate − V/
V
O
− Output Voltage −V
PP
sµ
Gain = 5 RL = 100 RF = 715 VS = ±15 V
Fall
Rise
0
100
200
300
400
500
600
700
800
0 0.5 1 1.5 2 2.5 3 3.5 4
SR − Slew Rate − V/
V
O
− Output Voltage − V
PP
sµ
Gain = 1 RL = 100 RF = 1.1 k VS = ±15 V
Fall
Rise
1
10
100
1000
10 100 1 k 10 k 100 k
f − Frequency − Hz
− Current Noise −
V
n
I
n
− Voltage Noise −
pA/ Hz
nV/ Hz
I
n−
I
n+
V
n
−1.25
−1
−0.75
−0.5
−0.25
0
0.25
0.5
0.75
1
1.25
0 1 2 3 4 5 6 7 8 9 10
t − Time − ns
− Output Voltage − VV O
Gain = −2 RL = 100 RF =806 VS = ±15 V
Rising Edge
Falling Edge
−4.5
−4
−3.5
−3
−2.5
−2
−1.5
−1
−0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0 2 4 6 8 10 12
t − Time − ns
− Output Voltage − VV O
Gain = −2 RL = 100 RF = 806 VS = ±15 V
Rising Edge
Falling Edge
TYPICAL CHARACTERISTICS (±15 V) (continued)
THS3092 THS3096
SLOS428A – DECEMBER 2003 – REVISED FEBRUARY 2004
3RD HARMONIC DISTORTION 2ND HARMONIC DISTORTION 3RD HARMONIC DISTORTION
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
Figure 10. Figure 11. Figure 12.
SLEW RATE SLEW RATE SLEW RATE
vs vs vs
OUTPUT VOLTAGE STEP OUTPUT VOLTAGE STEP OUTPUT VOLTAGE STEP
Figure 13. Figure 14. Figure 15.
NOISE
vs
FREQUENCY SETTLING TIME SETTLING TIME
Figure 16. Figure 17. Figure 18.
11
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