Texas Instruments THMC10DBQR Datasheet

THMC10
REMOTE/LOCAL TEMPERATURE MONITOR
WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
T wo-Wire SMBus Serial Interface
D
D
Programmable Under/Overtemperature Limits
D
Under/Overtemperature Interrupt Signal to Host Controller
D
Low Operating Current ...35 µA (Average)
D
Low Standby Current ...3 µA
D
3-V to 3.6-V Supply Voltage Range
description
The THMC10 is a dual digital temperature monitor with under/overtemperature alerts intended for use in personal computer systems or any other system requiring local as well as remote temperature monitoring and management (e.g., servers and workstations). The device may be used in smart battery applications and memory modules. The device is designed to measure the temperature on a microprocessor using a diode-connected transistor on the microprocessor die, such as the one present on the Intel
Pentium II, III, and the Sun UltraSP ARC. The device may also be used with a low-cost, diode-connected, discrete transistor, such as a 2N3904 or 2N3906, for remote temperature sensing applications.
The THMC10 uses a two-current measurement technique on a single diode-connected transistor that cancels the absolute value of the remote transistor’s VBE; therefore, no calibration is needed. The second channel measures an on-chip temperature sensor which can be used to monitor the ambient temperature in the THMC10’s operating environment.
The THMC10 uses a two-wire, SMBus interface to report temperature in an 8-bit, 2s complement format in °C. Under/overtemperature limits for both the on-chip and remote temperature sensors are user programmable via the SMBus interface. The ALERT
terminal can be used as an interrupt or SMBus alert function to indicate
under/overtemperature. The STBY terminal and the
start/stop
bit in the SMBus interface allow the device to
enter a low current standby mode (typically <10 µA). The THMC10 also provides diagnostics via the ALERT terminal and the SMBus interface for an open remote
sensor connection or if the sensor connection is shorted to V
DD.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Intel and Pentium are registered trademarks of Intel Corporation. Sun is a registered trademark and UltraSPARC is a trademark of Sun Microsystems.
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10
9
N/C
V
DD
DXP DXN
N/C
ADD1
GND GND
N/C STBY SCLK N/C SDATA ALERT ADD0 N/C
SSOP DBQ Package
(TOP VIEW)
THMC10
THMC10 REMOTE/LOCAL TEMPERATURE MONITOR WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematic/block diagram
Interrupt Masking
GND
STBY
DXP
Configuration
Register
High Limit
Register
Low Limit
Register
High Limit
Register
Low Limit
Register
Auto-Acquire
Rate Register
ADDR Pointer
Register
One-Shot
Register
Low Limit
Comparator
High Limit
Comparator
Status
Register
8-Bit A/D
Converter
Power-up
Clear
On-Chip
Temp
Sensor
Analog
MUX
Local Temp
Register
Remote Temp
Register
Low Limit
Comparator
High Limit
Comparator
SDATA
SMBus Interface
DXN
ALERT
V
DD
To All Registers
SCLK ADD0 ADD1
THMC10
REMOTE/LOCAL TEMPERATURE MONITOR
WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME NO.
I/O
DESCRIPTION
ADD0 10 I SMBus address select terminal 0 (Note: Excess capacitance on this terminal may cause SMBus address
recognition problems.)
ADD1 6 I SMBus address select terminal 1 (Note: Excess capacitance on this terminal may cause SMBus address
recognition problems.) ALERT 11 O Active low temperature interrupt signal DXN 4 I/O Current sink for external diode connected transistor and A/D negative input (Do not leave floating if no external
diode is used – should be tied to GND.) DXP 3 I/O Current source for external diode connected transistor and A/D positive input GND 7, 8 I IC ground N/C 1, 5, 9,
13, 16
N/C No connection
SCLK 14 I SMBus serial clock input terminal – clock signal for SMBus serial data SDATA 12 I/O SMBus serial data I/O terminal – serial data I/O for SMBus STBY 15 I Active low standby mode input V
DD
2 I IC supply voltage – should be decoupled with external 0.1 µF capacitor
absolute maximum ratings over operating case temperature (see Note 1) (unless otherwise noted)
Input voltage on: VDD supply terminal, V
(DDIN)
–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O terminals, V
(IOIN)
–0.3 V to V
DD
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMBus terminals, V
(SMBIN)
–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DXN terminal, V
(DXN)
–0.3 V to 0.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SMBus input/output current, I
(SMBIN)
–1 mA to 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DXN input current, I
(DXN)
–1 mA to 1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous power dissipation, P
D
330 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating case temperature range, TC –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
–65°C to 165°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (soldering, 10 sec), T
(LEAD)
300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND.
recommended operating conditions
MIN MAX UNITS
Supply voltage, V
DD
3 3.6 V
SMBus input high voltage, V
IH
2.2 V
SMBus input low voltage, V
IL
0.8 V
SMBus operating frequency, f
(SCLK)
10 100 kHz
Operating ambient temperature, T
A
0 85 °C
THMC10 REMOTE/LOCAL TEMPERATURE MONITOR WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
dc electrical characteristics, VDD = 3.3 V, TA = 25°C (unless otherwise noted)
A/D and supply
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
T
(RES)
T emperature resolution No missed codes 1 °C Initial temperature error from internal
TA = 60°C to 100°C –2 2
°
T
(ERR1)
diode
TA = full range
–3 3
°C
Initial temperature error from external
TA = 60°C to 100°C –2.5 2.5
°
T
(ERR2)
diode (see Note 2)
TA = full range
–3.5 3.5
°C
V
(UVLOCK)
Under voltage lockout voltage VDD input, disables acquisition, rising edge 2.65 2.8 2.95 V
V
(POR)
Power-up reset threshold On VDD input, falling edge 1 2.25 2.5 V
pp
Logic inputs forced to VDD or GND, STBY
mode, SMBus is static
3 10 µA
I
(DD,STANDBY)VDD
standby supply current
Logic inputs forced to VDD or GND, STBY
mode, SCLK = 10 kHz
4 µA
VDD operating supply current (aver-
Slow auto-aquire rate (0.25 samples/sec) 40 70
I
DD
aged over 4 seconds in auto-acquire mode)
Fast auto-aquire rate (2 samples/sec)
45 180
µ
A
V
(D,SOURCE)
DXN source voltage 0.7 V
I
(DLEAK)
DXP and DXN leakage current STBY = 0, DXP = DXN = 0 2 µA
I
(ADD,BIAS)
Add {0:1} bias current Momentary on power up 35 100 µA
DXP = 1.5 V, high level 100
I
(DIODE)
Diode source current
DXP = 1.5 V , low level 10
µ
A
I
(RATIO)
Diode source current ratio
DXP+1.5 V,
high level
low level
9.7 10 10.2
BasedonT(°C)
+
q
ǒ
D
V
BE
Ǔ
nk[ln(10
)]
*
273
Where
q = 1.6 × 10
–19
(charge) n = 1.0085 (diode ideality factor) k = 1.38 × 10
–23
(Boltzman’s constant)
NOTE 2:
SMBus
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
V
IH
Input high voltage 2.2 V
V
IL
Input low voltage 0.8 V
I
OL1
SMBus output low current SDATA = 0.6 V 6 mA
I
OL2
ALERT output low current ALERT = 0.4 V 1 mA
I
I
SMBus input current –1 1 µA
THMC10
REMOTE/LOCAL TEMPERATURE MONITOR
WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ac electrical characteristics, VDD = 3.3 V, TA = 25°C (unless otherwise noted)
A/D and supply
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
t
(CONV)
One-shot conversion time
One-shot mode from SMBus stop bit to temperature conversion completed (both channels)
12 ms
Acquisition rate accuracy Auto-aquire mode –25% 25%
SMBus
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
f
(SCLK
) SCLK operating frequency See Figure 1 10 100 kHz
t
(BUF)
Bus free time between stop and start condition See Figure 1 4.7 µs
t
(HDSTA)
Hold time after (repeated) start condition. After this period, the first clock is generated
See Figure 1 4 µs
t
(SUSTA)
Repeated start condition setup time See Figure 1 4.7 µs
t
(SUSTO)
Stop condition setup time See Figure 1 4 µs
t
(HDDAT)
Data hold time See Figure 1 300 ns
t
(SUDAT)
Data setup time See Figure 1 250 ns
t
(LOW)
SCLK clock low period See Figure 1 4.7 µs
t
(HIGH)
SCLK clock high period See Figure 1 4 50 µs
t
(LOWSEXT)
Cumulative clock low extend time (slave device) See Figure 1 25 ms
t
(LOWMEXT)
Cumulative clock low extend time (master device) See Figure 1 10 ms
t
F
Clock/data fall time See Figure 1 300 ns
t
R
Clock/data rise time See Figure 1 1000 ns
THMC10 REMOTE/LOCAL TEMPERATURE MONITOR WITH SMBus INTERFACE
SLIS089 – DECEMBER 1999
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SMBus timing diagrams
PS
t
(HDSTA)
t
(HDDAT)
t
(HIGH)
t
(SUDAT)
t
(SUSTA)
t
(HDSTA)
t
(SUSTO)
SP
SCLK
SDATA
Start
Stop
SCLK
ACK
SCLK
ACK
t
(LOWMEXT)
SCLK
SDATA
t
(LOW)
t
(LOWSEXT)
t
F
t
R
t
(BUF)
t
(LOWMEXT)
t
(LOWMEXT)
Figure 1. SMBus Timing Diagram
Frame 3 Data Byte
Frame 1 SMBus Slave Address Byte
Frame 2 Address Pointer Register Byte
A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0R/W
SCLK
SDATA
Start By
Master
ACK By
THMC10
ACK By
THMC10
D7 D6 D5 D4 D3 D2 D1 D0
ACK By
THMC10
SCLK
(Continued)
SDATA
(Continued)
1
91 9
1
9
Stop By Master
Figure 2. SMBus Timing Diagram for Write Byte Format
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