The TCM37C14A and TCM37C15A PCM combo with programmable gain control devices are single-chip PCM
combos (pulse-code-modulated CODECs with voice-band filtering). They are designed to perform transmit
encoding (A/D conversion) and receive decoding (D/A conversion), as well as the transmit and receive filtering
functions required to meet CCITT/(D3/D4) G.711 and G.714 specifications in a PCM system. Each device
provides all the functions required to interface a full-duplex, 4-line voice telephone circuit with a TDM
(time-division-multiplexed) system, and also perform the encoding and decoding of call progress tones. The
TCM37C14A and TCM37C15A are based on the proven TI TCM29C13A core, and have the added feature of
programmable transmit and receive gain.
Primary applications include line interface for digital transmission and switching of T1/E1 carrier (P ABX [private
branch automatic exchange] and central office telephone systems), subscriber line concentrators, digital
encryption systems, and digital signal processing. They are intended to be used at the analog termination of
a PCM line or trunk to the POTS (plain old telephone system) local-loop line.
The TCM37C15A is available in 20-pin DW SOIC (small-outline IC) or 20-pin N PDIP (plastic dual-in-line
package) packages, and the TCM37C14A is available in a 24-pin DW SOIC package and includes differential
output. All are characterized for operation from –40°C to 85°C.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
TCM37C14A, TCM37C15A
T
A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
AVAILABLE OPTIONS
PACKAGE
20 PIN24 PIN
SMALL OUTLINE
(DW)
–40°C to 85°CTCM37C15AIDWTCM37C15AINTCM37C14AIDW
functional block diagram
PLASTIC DIP
(N)
SMALL OUTLINE
(DW)
TS1
TS2
ANLGIN
GSX
RIN
GSR
RS1
RS2
PWRO+
PWRO–
Transmit Section
22
21
20
23
4
7
5
6
2
3
†
Gain
Set
Transmit
Third-Order
Antialias
Low-Pass
Filter
(Analog)
Gain
Set
Transmit
Sixth-Order
Low-Pass
Filter
(Switched Cap)
Fc = 3400 Hz
Reference
Filter
(Switched Cap)
Buffer
Auto Zero
Transmit
Third-Order
High-Pass
Filter
Fc = 200 Hz
Analog to
Digital Control
Logic
Digital-to-
Analog
Converter
Sample
and Hold
ADC
Control SectionReceive Section
Digital-to-
Analog Control
Logic
Output
Register
Control
Logic
Input
Register
17
18
16
14
10
15
9
8
11
PCMOUT
†
TSX
FSX
MCLK
CLKSEL
†
ASEL
GS0
GS1
PCMIN
†
241131912
FSRAGNDDGNDVBBVCC
†
TCM37C14A only
NOTE A: Terminal numbers shown are for the TCM37C14A.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
NAME
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
Terminal Functions
TERMINAL
NO.
’37C15A ’37C14A
AGND1519Analog ground return for all internal voice circuits. AGND is connected internally to DGND.
ANLGIN1620IAnalog input to transmit operational amplifier.
ASEL15ISelection between A-law and µ-law operation. When ASEL is connected to VBB, A-law is selected.
CLKSEL10IClock frequency selection. CLKSEL must be connected to VBB, VCC, or ground to select the master
DGND1113Digital ground for all internal logic circuits. DGND is internally connected to AGND.
FSR1012IFrame-synchronization clock input/time-slot enable for receive channel. The receive channel enters
FSX1316IFrame-synchronization clock input/time-slot enable for transmit. The transmit channel enters the
GS089IInput for first bit of the programmable gain control circuitry. GS0 works in combination with GS1 to
GS178IInput for second bit of the programmable gain control circuitry . GS1 works in combination with GS0
GSR67IInput to gain-setting network of the output power amplifier. Gain is set by external resistors with three
GSX1923OOutput terminal of internal uncommitted operational amplifier. Internally , GSX is the voice signal input
MCLK1214IMaster clock (input). For the TCM37C14A, the master clock frequency can be either 2.048 MHz,
PCMIN911IReceive PCM input. PCM data is clocked in on PCMIN on eight consecutive negative transitions of
PCMOUT1417OTransmit PCM output. PCM data is clocked out on PCMOUT on eight consecutive positive transitions
PWRO+22ONoninverting output of power amplifier. PWRO+ can drive transformer hybrids or high-impedance
PWRO–3OInverting output of power amplifier. PWRO– is functionally identical with and complementary to
RIN34IInput to receive section amplifiers. (See Figure 6 and Figure 7 for recommended circuitry.)
RS145Terminal for first gain-control resistor of the receive section. RS1 is selected through closure of the
RS256Terminal for second gain control resistor of the receive section. RS2 is selected through closure of
TS11822Terminal for gain-control resistor on input of transmit section. TS1 is selected through closure of the
TS21721Terminal for gain-control resistor on input of transmit section. TS2 is selected through closure of the
TSX18OTransmit channel time-slot strobe for the transmit channel (active low). TSX is an open drain output
V
BB
V
CC
11Negative supply voltage. Input is –5 V ± 5%.
2024Positive supply voltage. Input is 5 V ± 5%.
I/ODESCRIPTION
When ASEL is connected to VCC or ground, µ-law is selected.
clock frequency. When CLKSEL is tied to VBB, MCLK is 2.048 MHz. When it is tied to ground, MCLK
is at 1.544 MHz. When it is tied to VCC, MCLK is 1.536 MHz.
the standby state when FSR is held low for 300 ms.
standby state when FSX is held low for 300 ms.
simultaneously control transmit and receive gain, and controls power-down instruction. (See
Table 1 and 2 for control logic information.)
to simultaneously control transmit and receive gain, and controls power-down instruction. (See T able
1 and 2 for control logic information.)
levels of programmable gain or attenuation control. (See Figure 6 and Figure 7 for recommended
configuration.)
to the transmit filter.
1.544 MHz, or 1.536 MHz, and is selected by CLKSEL. MCLK for the TCM37C15A is 2.048 MHz.
the receive data clock (MCLK).
of the transmit data clock (MCLK).
loads directly in a differential or a single-ended configuration.
PWRO +.
first gain control switch. (See Figure 6 and Figure 7 for recommended circuitry.)
the second gain control switch. (See Figure 6 and Figure 7 for recommended configuration.)
first gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
second gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
and can be used as an enable signal for a 3-state output buffer .
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TCM37C14A, TCM37C15A
Load resistance, R
Load capacitance, C
pF
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
Voltage range at any analog input, V
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage values are with respect to GND.
recommended operating conditions (see Note 2)
MINNOMMAXUNIT
Supply voltage, VCC (see Notes 2 and 3)4.7555.25V
Supply voltage, V
DGND voltage with respect to AGND0V
High-level input voltage, V
Low-level input voltage, V
p
Operating free-air temperature, T
NOTES: 2. To avoid possible damage to these CMOS devices and resulting reliability problems, the power-up procedure described in the device
BB
IH
IL
L
L
A
power-up sequence paragraphs later in this document should be followed.
3. Voltages at analog inputs and outputs, VCC and VBB terminals, are with respect to the AGND terminal. All other voltages are
referenced to the DGND terminal unless otherwise noted.
At GSX/GSR10kΩ
At PWRO+ and/or PWRO–300Ω
At GSX/GSR50
At PWRO+ and/or PWRO–100
–4.75–5 –5.25V
2.2V
0.8V
p
–4085°C
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
UNIT
V
CC
V
BB
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted)
supply current
0°C to 85°C–40°C to 0°C
MINTYPMAXMINTYPMAX
Supply current from
I
CC
Supply current from
I
BB
PDPower dissipation
digital interface
V
High-level output voltage at PCMOUTIOH = –9.6 mA2.4V
OH
V
Low-level output voltage at PCMOUT, TSXIOL = 3.2 mA0.5V
OL
I
High-level input current, any digital inputVI = 2.2 V to V
IH
I
Low-level input current, any digital inputVI = 0 to 0.8 V12µA
IL
C
Input capacitance5pF
i
C
Output capacitance5pF
o
†
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
Operating710811
StandbyFSX, FSR at VIL (after 300 ms)0.51.311.7
Power down GS0, GS1 = VIL (after 300 ms)0.51.211.7
Operating–7–9–9 –11.5
StandbyFSX, FSR at VIL (after 300 ms)–0.6–1–0.8–1.2
Power down GS0, GS1 = VIL (after 300 ms)–0.3–0.9–0.4–1.2
Operating7010080110
Standby
Power down GS0, GS1 = VIL (after 300 ms)7121017
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
FSX, FSR at VIL (after 300 ms)9131017
CC
mA
mA
mW
12µA
transmit amplifier input
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
Input current at ANLGINVI = –2.17 V to 2.17 V±100nA
Input offset voltage at ANLGINVI = –2.17 V to 2.17 V±25mV
Common-mode rejection at ANLGINVI = –2.17 V to 2.17 V55dB
Open-loop voltage amplification at GSX5000
Open-loop unity-gain bandwidth at GSX1MHz
Input resistance at ANLGIN10MΩ
†
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
receive filter output‡
PARAMETERMIN TYP†MAXUNIT
Output offset voltage PWRO+, PWRO– (single ended), Relative to AGND80mV
Output resistance at PWRO+, PWRO–1Ω
†
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
‡
PWRO– on TCM37C14A only
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TCM37C14A, TCM37C15A
R
600 Ω
Zero-transmission-level point, transmit channel (0 dBm0)
dBm
R
900 Ω
R
600 Ω
Zero-transmission-level point, receive channel (0 dBm0)
dBm
R
900 Ω
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted) (continued)
gain and dynamic range, V
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Encoder milliwatt response (transmit gain tolerance)
Encoder milliwatt response variation with temperature and
supplies
Digital milliwatt response (receive gain tolerance) relative to zero-
transmission level point
Digital milliwatt response variation with temperature and supplies TA = –40°C – 85°C, supplies = ±5%±0.08dB
p
p
NOTES: 4. Unless otherwise noted, the analog input is a 0-dBm0, 1020-Hz sine wave, where 0 dBm0 is defined as the zero-reference point
of the channel under test with unity gain set on the amplifier. This corresponds to an analog signal input of 1.064 V rms, or an output
of 1.503 Vrms.
5. The input amplifier is set for unity gain, noninverting. The digital input is a PCM bit stream generated by passing a 0-dBm0, 1020-Hz
sine wave through an ideal encoder.
6. Receive output is measured single ended with the output amplifier in the unity-gain configuration. All output levels are (sin x)/x
corrected.
= 5 V, VBB = –5 V, TA = 25°C (see Notes 4, 5, and 6) (unless otherwise noted)
CC
µ-law
A-law
µ-law
A-law
µ-law
A-law
µ-law
A-law
Signal input = 1.064 Vrms for µ-law,
Signal input = 1.068 Vrms for A-law
TA = –40°C – 85°C, supplies = ±5%±0.08dB
Signal input per CCITT G.711,
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted) (continued)
power supply rejection and crosstalk attenuation
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
pp
su
CC
BB
V
(single ended)
V
(single ended)
Crosstalk attenuation, transmit-to-receive at PWRO+ (single ended)
Crosstalk attenuation, receive-to-transmit at PWRO+ (single ended)
†
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
y v
pp
su
y v
supply voltage rejection ratio, receive channel
supply voltage rejection ratio, receive channel
0 < f < 30 kHz
30 < f < 50 kHz
0 < f < 30 kHz
30 < f < 50 kHz
0 < f < 30 kHz
30 < f < 50 kHz
0 < f < 30 kHz
30 < f < 50 kHz
Idle channel,
pp
supply signal =
f measured at PCMOUT
Idle channel,
suppl
signal = 200 mVpp,
f measured at PCMOUT
Idle channel,
Idle channel,
suppl
signal = 200 mVpp,
narrow-band,
f measured at PWRO+
Idle channel,
suppl
signal = 200 mVpp,
narrow-band,
f measured at PWRO+
ANLGIN = 0 dBm0,
f = 1.02 kHz, unity gain,
PCMIN = lowest decode level
PCMIN = 0 dBm0,
f = 1.02 kHz
pp
pp,
–40
–45
–35
–55
–40
–45
–40
–45
75dB
75dB
distortion
PARAMETERTEST CONDITIONSMINMAXUNIT
0 > ANLGIN ≥ –30 dBm036
Transmit signal to distortion ratio, sinusoidal input (CCITT G.712 – Method 2)
Receive signal to distortion ratio, sinusoidal input (CCITT G.712 – Method 2)
Transmit single-frequency distortion productsInput signal = 0 dBm0–46 dBm0
Receive single-frequency distortion productsInput signal = 0 dBm0–46 dBm0