Texas Instruments TCM29C16N, TCM29C16DW, TCM129C16N, TCM29C17N, TCM29C17DW Datasheet

...
TCM29C13, TCM29C14, TCM29C16, TCM29C17,
TCM129C13, TCM129C14, TCM129C16, TCM129C17
COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
D
Reliable Silicon-Gate CMOS Technology
D
Low Power Consumption:
Operating Mode...80 mW Typical Power-Down Mode...5 mW Typical
D
Excellent Power-Supply Rejection Ratio Over Frequency Range of 0 Hz to 50 kHz
D
No External Components Needed for Sample, Hold, and Autozero Functions
D
Precision Internal Voltage References
D
Direct Replacement for Intel 2913, 2914, 2916, and 2917
D
Recommended for Direct V oice Applications
description
The TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, and TCM129C17 are single-chip PCM codecs (pulse-code-modulated encoders and decoders) and PCM line filters. They provide all the functions required to interface a full-duplex (4-wire) voice telephone circuit with a TDM (time-division-multiplexed) system, and are intended to replace the TCM2910A in tandem with the TCM2912C. Primary applications include:
Line interface for digital transmission and switching of T1 carrier, PABX, and central office telephone
systems
Subscriber line concentrators
Digital-encryption systems
Digital voice-band data-storage systems
Digital signal processing
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10
9
V
BB
PWRO+ PWRO–
PDN
DCLKR
PCM IN
FSR/TSRE
DGTL GND
V
CC
GSX ANLG IN– ANLG GND TSX/DCLKX PCM OUT FSX/TSXE CLKR/CLKX
TCM29C16, TCM29C17,
TCM129C16, TLC129C17
DW OR N PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
V
BB
PWRO+ PWRO–
GSR PDN
CLKSEL
DCLKR
PCM IN
FSR/TSRE
DGTL GND
V
CC
GSX ANLG IN– ANLG IN+ ANLG GND SIGX/ASEL TSX/DCLKX PCM OUT FSX/TSXE CLKR/CLKX
TCM29C13, TCM129C13
DW OR N PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
V
BB
PWRO+ PWRO–
GSR PDN
CLKSEL
ANLG LOOP
SIGR
DCLKR
PCM IN
FSR/TSRE
DGTL GND
V
CC
GSX ANLG IN– ANLG IN+ ANLG GND NC SIGX/ASEL TSX
/DCLKX PCM OUT FSX/TSXE CLKX CLKR
TCM29C14, TCM129C14
DW PACKAGE
(TOP VIEW)
NC – No internal connection
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Number of Pins:
24 X 20 X 16 X X
µ-Law/A-Law Coding:
µ-Law X X X
A-Law X X X
Gain Timing Rates:
Variable Mode 64 kHz to 2.048 MHz X X X X
Fixed Mode
1.536 MHz X X
1.544 MHz X X
2.048 MHz X X X X Loopback Test Capability X 8th-Bit Signaling X
FEATURES TABLE
FEATURE
29C13
129C13
29C14
129C14
29C16
129C16
29C17
129C17
TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, TCM129C17 COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A conversion) as well as the transmit and receive filtering functions in a pulse-code-modulated system. They are intended to be used at the analog termination of a PCM line or trunk.
The TCM129C13, TCM129C14, TCM129C16, TCM129C17, TCM29C13, TCM29C14, TCM29C16, and TCM29C17 provide the band-pass filtering of the analog signals prior to encoding and after decoding. These combination devices perform the encoding and decoding of voice and call progress tones as well as the signaling and supervision information.
The TCM29C13, TCM29C14, TCM29C16, and TCM29C17 are characterized for operation from 0°C to 70°C. The TCM129C13, TCM129C14, TCM129C16, and TCM129C17 are characterized for operation from –40°C to 85°C.
functional block diagram
Successive
Approximation
Buffer
PWRO+
PWRO–
GSR
GSX
ANLG IN–
ANLG IN+
Transmit Section
Receive Section
SIGR
Control Section
PDN
Control
Logic
DCLKR
PCM IN
Input
Register
Digital-
to-Analog
Control
Logic
Reference
Sample and Hold and DAC
Analog-
to-Digital
Control
Logic
Gain
Set
Filter
Reference
FSX/TSXE
Autozero
Output
Register
TSX/DCLKX
PCM OUT
Comparator
Sample and Hold and DAC
Filter
SIGX/ASEL
CLKX
CLKSEL
ANLG LOOP
FSR/TSRE
CLKR
ANLG
GND
DGTL
GND
V
BB
V
CC
TCM29C14 and TCM129C14 only
TCM29C13, TCM29C16, TCM29C17, TCM129C13, TCM129C16, and TCM129C17 only
TCM29C13, TCM29C14, TCM29C16, TCM29C17,
TCM129C13, TCM129C14, TCM129C16, TCM129C17
COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Terminal Functions
TERMINAL NO.
NAME
TCM29C13
TCM129C13
TCM29C14
TCM129C14
TCM29C16
TCM29C17 TCM129C16 TCM129C17
I/O DESCRIPTION
ANLG GND 16 20 13 Analog ground return for all internal voice circuits. Not internally
connected to DGTL GND.
ANLG IN+ 17 21 I Noninverting analog input to uncommitted transmit operational amplifier .
Internally connected to ANLG GND on TCM129C16, TCM29C16, TCM129C17, and TCM29C17.
ANLG IN– 18 22 14 I Inverting analog input to uncommitted transmit operational amplifier.
ANLG LOOP 7 I Provides loopback test capability. When this input is high, PWRO + is
internally connected to ANLG IN.
CLKR 11 13 9 I Receive master clock and data clock for the fixed-data-rate mode.
Receive master clock only for variable-data-rate mode. CLKR and CLKX are internally connected together for TCM129C13, TCM129C16, TCM129C17, TCM29C13, TCM29C16, and TCM29C17.
CLKSEL 6 6 I Clock-frequency selection. Input must be connected to VBB, VCC, or
ground to reflect the master-clock frequency . When tied to VBB, CLK is
2.048 MHz. When tied to GND, CLK is 1.544 MHz. When tied to VCC, CLK is 1.536 MHz.
CLKX 11 14 9 I Transmit master clock and data clock for the fixed-data-rate mode.
Transmit master clock only for variable-date-rate mode. CLKR and CLKX are internally connected for the TCM129C13, TCM129C16, TCM129C17, TCM29C13, TCM29C16, and TCM29C17.
DCLKR 7 9 5 I Fixed or variable-data-rate operation select. When connected to VBB,
the device operates in the fixed-data-rate mode. When DCLKR is not connected to VBB, the device operates in the variable-data-rate mode, and DCLKR becomes the receiver data clock. DCLKR then operates at frequencies from 64 kHz to 2.048 MHz.
DGTL GND 10 12 8 Digital ground for all internal logic circuits. Not internally connected to
ANLG GND.
FSR/TSRE 9 11 7 I Frame synchronization clock input/time-slot enable for receive channel.
In the fixed-data-rate mode, FSR distinguishes between signaling and nonsignaling frames by a double- or single-length pulse, respectively . In the variable-data-rate mode, this signal must remain high for the duration of the time slot. The receive channel enters the standby state when FSR is TTL low for 300 ms.
FSX/TSXE 12 15 10 I Frame-synchronization clock input/time-slot enable for transmit
channel. Operates independently of, but in an analagous manner to, FSR/TSRE. The transmit channel enters the standby state when FSX is low for 300 ms.
GSR 4 4 I Input to the gain-setting network on the output power amplifier.
Transmission level can be adjusted over a 12-dB range depending on the voltage at GSR.
GSX 19 23 15 O Output terminal of internal uncommitted operational amplifier . Internally ,
this is the voice signal input to the transmit filter.
PCM IN 8 10 6 I Receive PCM input. PCM data is clocked in on eight consecutive
negative transitions of the receive data clock, which is CLKR in fixed-data-rate timing and DCLKR in variable-data-rate timing.
PCM OUT 13 16 11 O Transmit PCM output. PCM data is clocked out on this output on eight
consecutive positive transitions of the transmit data clock, which is CLKX in fixed-data-rate timing and DCLKX in variable-data-rate timing.
TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, TCM129C17 COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Terminal Functions
TERMINAL NO.
NAME
TCM29C13
TCM129C13
TCM29C14
TCM129C14
TCM29C16
TCM29C17 TCM129C16 TCM129C17
I/O DESCRIPTION
PDN 5 5 4 I Power-down select. The device is inactive with a TTL low-level input to
this terminal and active with a TTL high-level input to the terminal.
PWRO+ 2 2 2 O Noninverting output of power amplifier. Can drive transformer hybrids or
high-impedance loads directly in either a differential or a single-ended configuration
PWRO– 3 3 3 O Inverting output of power amplifier. Functionally identical with and
complementary to PWRO+.
SIGR 8 O Signaling bit output, receive channel. In a fixed-data-rate mode, outputs
the logical state of the 8th bit (LSB) of the PCM word in the most recent signaling frame.
SIGX/ASEL 15 18 I A-law and µ-law operation select. When connected to VBB, A-law is
selected. When connected to VCC or GND, µ-law is selected. When not connected to VBB, a TTL-level input is transmitted as the eighth bit (LBS) of the PCM word during signaling frames on PCM OUT (TCM29C14 and TCM129C14 only). SIGX/ASEL is internally connected to provide µ-law operational for TCM29C16 and TCM129C16 and A-law operation for TCM29C17 and TCM129C17.
TSX/DCLKX 14 17 12 I/O Transmit channel time-slot strobe (output) or data clock (input) for the
transmit channel. In the fixed-data-rate mode, this terminal is an open-drain output to be used as an enable signal for a 3-state output buffer. In the variable-data rate mode, DCLKX becomes the transmit data clock, which operates at TTL level from 64 kHz to 2.048 MHz.
V
BB
1 1 1 Most negative supply voltage. Input is –5 V ±5%.
V
CC
20 24 16 Most positive supply voltage. Input is 5 V ±5%
TCM29C13, TCM29C14, TCM29C16, TCM29C17,
TCM129C13, TCM129C14, TCM129C16, TCM129C17
COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
(see Note 1) –0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
–0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
–0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital ground voltage range –0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation at (or below) 25°C free-air temperature 1375 mW. . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: TCM29Cxx 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TCM129Cxx –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package 260°C. . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage values for maximum ratings are with respect to VBB.
recommended operating conditions (see Note 2)
MIN NOM MAX UNIT
Supply voltage, VCC (see Note 3) 4.75 5 5.25 V Supply voltage, V
BB
–4.75 –5 –5.25 V Digital ground voltage with respect to ANGL GND 0 V High-level input voltage, VIH (all inputs except CLKSEL) 2.2 V Low-level input voltage, VIL (all inputs except CLKSEL) 0.8 V
2.048 MHz V
BB
VBB +0.5
Clock-select input voltage
1.544 MHz 0 0.5
V
1.536 MHz VCC –0.5 V
CC
GSX 10 k
Load resistance, R
L
PWRO+ and/or PWRO– 300
p
GSX 50
p
Load capacitance, C
L
PWRO+ and/or PWRO– 100
pF
p
p
TCM29Cxx 0 70
°
Operating free-air temperature, T
A
TCM129Cxx –40 85
°C
NOTES: 2. T o avoid possible damage to these CMOS devices and resulting reliability problems, the power-up procedure described in the device
power-up sequence paragraphs later in this document should be followed.
3. V oltage at analog inputs and outputs, VCC and VBB terminals, are with respect to the ANLG GND terminal. All other voltages are referenced to the digital ground terminal unless otherwise noted.
TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, TCM129C17 COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
supply current, f
DCLK
= 2.048 MHz, outputs not loaded
TCM29Cxx TCM129Cxx
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
Operating 7 9 8 13
I
CC
Supply current
Standby FSX, FSR = VIL after 300 ms 0.5 1 0.7 1.5
mA
CC
from V
CC
Power down
PDN = VIL after 10 µs
0.3 0.8 0.4 1
Operating –7 –9 –8 –13
I
BB
Supply current
Standby FSX, FSR = VIL after 300 ms –0.5 –1 –0.7 –1.5
mA
BB
from V
BB
Power down
PDN = VIL after 10 µs
–0.3 –0.8 –0.4 –1
Operating 70 90 80 130
P
D
Power dissipation
Standby FSX, FSR = VIL after 300 ms 5 10 7 15
mW
Power down
PDN = VIL after 10 µs
3 8 4 10
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
digital interface
TCM29Cxx TCM129Cxx
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
p
PCM OUT IOH = –9.6 mA 2.4 2.4
VOHHigh-level output voltage
SIGR IOH = –1.2 mA 2.4 2.4
V
V
OL
Low-level output voltage at PCM OUT, TSX, SIGR
IOL = 3.2 mA 0.4 0.5 V
I
IH
High-level input current, any digital input VI = 2.2 V to V
CC
10 12 µA
I
IL
Low-level input current, any digital input VI = 0 to 0.8 V 10 12 µA
C
i
Input capacitance 5 10 5 10 pF
C
o
Output capacitance 5 5 pF
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
transmit amplifier input
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Input current at ANLG IN+, ANLG IN – ±100 nA Input offset voltage at ANLG IN+, ANLG IN –
VI = –2.17 V to 2.17 V
±25 mV Common-mode rejection at ANLG IN +, ANLG IN – 55 dB Open-loop voltage amplification at GSX 5000 Open-loop unity-gain bandwidth at GSX 1 MHz Input current at ANLG IN+, ANLG IN – 10 M
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
receive filter output
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Output offset voltage PWRO+, PWRO– (single ended) Relative to ANLG GND 80 180 mV Output resistance at PWRO+, PWRO– 1
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
TCM29C13, TCM29C14, TCM29C16, TCM29C17,
TCM129C13, TCM129C14, TCM129C16, TCM129C17
COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
gain and dynamic range, VCC = 5 V, VBB = 5 V, TA = 25°C (unless otherwise noted) (see Notes 4, 5, and 6)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
p
Signal input = 1.064 Vrms for µ-law,
Encoder milliwatt response (transmit gain tolerance)
g µ ,
Signal input = 1.068 Vrms for A-law
±
0.04±0.02
dBm0
Encoder milliwatt response additional tolerance (nominal supplies and temperature)
TA = 0°C to 70°C, Supplies = ± 5% ± 0.08 dB
Digital milliwatt response (receive tolerance gain) relative to zero-transmission-level point
Signal input per CCITT G.711, Output signal = 1 kHz
±
0.04±0.02
dBm0
Digital milliwatt response variation with temperature and supplies
TA = 0°C to 70°C, Supplies = ± 5% ±0.08 dB
µ-law
2.76
Zero-transmission-level point, transmit channel
A-law
R
L
=
600 Ω
2.79
,
(0 dBm0)
µ-law
1
dBm
A-law
R
L
=
900 Ω
1.03
µ-law
5.76
Zero-transmission-level point, receive channel
A-law
R
L
=
600 Ω
5.79
(0 dBm0)
µ-law
4
dBm
A-law
R
L
=
900 Ω
4.03
NOTES: 4. Unless otherwise noted, the analog input is a 0-dBm0, 1020-Hz sine wave, where 0 dBm0 is defined as the zero-reference point of
the channel under test. This corresponds to an analog signal input of 1.064 Vrms or an output of 1.503 Vrms.
5. The input amplifier is set for noninverting unity gain. The digital input is a PCM bit stream generated by passing a 0-dBm0, 1020-Hz sine wave through an ideal encoder.
6. Receive output is measured single ended in the maximum gain configuration. To set the output amplifier for maximum gain, GSR is connected to PWRO– and the output is taken at PWRO+. All output levels are (sin x)/x corrected.
gain tracking over recommended ranges of supply voltage and operating free-air temperature, reference level = –10 dBm0
PARAMETER TEST CONDITIONS MIN MAX UNIT
3 input level –40 dBm0 ±0.25
Transmit gain-tracking error , sinusoidal input
–40 > input level –50 dBm0 ±0.5
dB
–50 > input level –55 dBm0 ±1.2
3 input level –40 dBm0 ±0.25
Receive gain-tracking error, sinusoidal input
–40 > input level –50 dBm0 ±0.5
dB
–50 > input level –55 dBm0 ±1.2
TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, TCM129C17 COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
noise over recommended ranges of supply voltage and operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
Transmit noise, C-message weighted ANLG IN+ = ANLG GND, ANLG IN– = GSX 15 dBrnC0 Transmit noise, C-message weighted with 8-bit-
signaling (TCM29C14 and TCM129C14 only)
ANLG IN+ = ANLG GND, ANLG IN– = GSX, 6th frame signaling
18 dBrnC0 Transmit noise, psophometrically weighted ANLG IN+ = ANLG GND, ANLG IN– = GSX –69 dBm0p Receive noise, C-message-weighted quiet code
PCM IN = 11111111 (µ-law), PCM IN = 10101010 (A-law), measured at PWRO+
11 dBrnC0
Receive noise, C-message-weighted sign bit toggled
Input to PCM IN is zero code with sign bit toggled at 1-kHz rate
12 dBrmC0 Receive noise, psophometrically weighted PCM = lowest positive decode level –79 dBm0p
power-supply rejection ratio and crosstalk attenuation over recommended ranges of supply voltage and operating free-air temperature
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
supply-voltage rejection ratio,
0 f < 30 kHz
Idle channel,
pp
–30
CC
ygj ,
transmit channel
30 f < 50 kHz
Supply signal
=
200 mV
(peak-to-peak)
,
f measured at PCM OUT
–45
dB
V
supply-voltage rejection ratio,
0 f < 30 kHz
Idle channel,
pp
–30
BB
ygj ,
transmit channel
30 f < 50 kHz
Supply signal
=
200 mV
(peak-to-peak)
,
f measured at PCM OUT
–55
dB
V
supply-voltage rejection ratio,
0 f < 30 kHz
Idle channel,
pp
–20
CC
ygj ,
receive channel (single ended)
30 f < 50 kHz
Supply signal
=
200 mV
(peak-to-peak)
,
f measured at PWRO+
–45
dB
V
supply-voltage rejection ratio,
0 f < 30 kHz
Idle channel,
pp
–20
BB
ygj ,
receive channel (single ended)
30 f < 50 kHz
Supply signal
=
200 mV
(peak-to-peak)
,
Narrow band, f measured at PWRO+
–45
dB
Crosstalk attenuation, transmit to receive (single ended)
ANLG IN+ = 0 dBm0, f = 1.02 kHz, Unity gain, PCM IN = lowest decode level, Measured at PWRO+
71 dB
Crosstalk attenuation, receive to transmit (single ended)
PCM IN = 0 dBm0, f = 1.02 kHz, Measured at PCM OUT
71 dB
All typical values are at VBB = –5 V , VCC = 5 V, and TA = 25°C.
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