TC211
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
• Full-Frame Operation
• Antiblooming Capability
• Single-Phase Clocking for Horizontal and
DUAL-IN-LINE PACKAGE
(TOP VIEW)
ABG
1
IAG
6
Vertical Transfers
• Fast Clear Capability
• Dynamic Range...60 dB Typical
• High Blue Response
V
SS
ADB
SRG
2
3
5
OUT
4
• High Photoresponse Uniformity
• Solid-State Reliability With No Image
Burn-In, Residual Imaging, Image
Distortion, Image Lag, or Microphonics
• 6-Pin Dual-In-Line Ceramic Package
• Square Image Area:
– 2640 µm by 2640 µm
– 192 Pixels (H) by 165 Pixels (V)
– Each Pixel 13.75 µm (H) by 16 µm (V)
description
The TC211 is a full-frame charge-coupled device (CCD) image sensor designed specifically for industrial
applications requiring ruggedness and small size. The image-sensing area is configured into 165 horizontal
lines each containing 192 pixels. Twelve additional pixels are provided at the end of each line to establish a dark
reference and line clamp. The antiblooming feature is activated by supplying clock pulses to the antiblooming
gate, an integral part of each image-sensing element. The charge is converted to signal voltage at 4 µV per
electron by a high-performance structure with built-in automatic reset and a voltage-reference generator. The
signal is further buffered by a low-noise two-stage source-follower amplifier to provide high output-drive
capability.
The TC21 1 is supplied in a 6-pin dual-in-line ceramic package approximately 7,5 mm (0.3 in.) square. The glass
window can be cleaned using any standard method for cleaning optical assemblies or by wiping the surface with
a cotton swab soaked in alcohol.
The TC211 is characterized for operation from –10°C to 45°C.
This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no
circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent
allowed to flow. Specific guidelines for handling devices of this type are contained in the publication
Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies
damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is
Guidelines for Handling
available from Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1990, Texas Instruments Incorporated
2-1
TC211
I/O
DESCRIPTION
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
functional block diagram
165
ABG
ADB
OUT
V
SS
1
3
1
1 192
4
2
Serial Register
Clear Gate
12 Dark Pixels
192 Image Pixels
6 Dummy Pixels
6
IAG
5
SRG
Terminal Functions
TERMINAL
NAME NO.
ABG 1 I Antiblooming gate
V
SS
ADB 3 I Supply voltage for amplifier drain bias
OUT 4 O Output signal
SRG 5 I Serial-register gate
IAG 6 I Image-area gate storage
2 Amplifier ground
functional description
The image-sensing area consists of 165 horizontal image lines each containing 192 photosensitive elements
(pixels). Each pixel is 13.75 µm (horizontal) by 16.00 µm (vertical). As light enters the silicon in the
image-sensing area, free electrons are generated and collected in potential wells (see Figure 1). During this
time, the antiblooming gate is activated by applying a burst of pulses every horizontal blanking interval. This
prevents blooming caused by the spilling of charge from overexposed elements into neighboring elements. The
antiblooming gate is typically held at a midlevel voltage during readout. The quantity of charge collected in each
pixel is a linear function of the incident light and the exposure time. After exposure and under dark conditions,
the charge packets are transferred from the image area to the serial register at the rate of one image line per
each clock pulse applied to the image-area gate. Once an image line has been transferred into the serial register,
the serial-register gate can be clocked until all of the charge packets are moved out of the serial register to the
charge detection node at the amplifier input.
There are 12 dark pixels to the right of the 192 image pixels on each image line. These dark pixels are shielded
from incident light and the signal derived from them can be used to generate a dark reference for restoration
of the video black level on the next image line.
2-2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
functional description (continued)
Each clock pulse applied to the image area gate causes an automatic fast clear of the 192 image pixels and
12 dark pixels of the serial register before the next image line is transferred into the serial register. (Note that
the six dummy pixels at the front of the serial register, which are used to transport charge packets from the serial
register to the amplifier input, are not cleared by the image area gate clock.) The automatic fast-clear feature
can be used to initialize the image area by transferring all 165 image lines to the serial register gate under dark
conditions without clocking the serial register gate.
Barriers
Antiblooming Gate
Representative
Top View of Pixels
Potential
Wells
Vertical 16 µm
Horizontal
13.75 µm
TC211
Cross Section
of Pixels
Cross Section
of Potentials
in Silicon
Virtual
Phase
1 Pixel
Clocked
Phase
(imagearea
gate)
Virtual
Phase
Clocked
Phase
(imagearea
gate)
IAG Low ABG Low
Virtual
Phase
Clocked
Phase
(imagearea
gate)
Etched Polysilicon
Insulating Oxide
Silicon
ABG Intermediate
Channel Stop
IAG High
Direction of Vertical Charge Transfer
ABG High
Figure 1. Charge Accumulation and Transfer Process
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2-3
TC211
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
Readout Integration
ABG
165 Cycles
IAG
210 Cycles
SRG
IAG
t2
SRG
t1
t
w1
t
t3
w2
t4
Figure 2. Timing Diagram, Noninterlace Mode
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range for ADB (see Note 1) 0 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range for IAG, SRG, ABG, VI –15 V to 5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range –30°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.
–30°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
†
2-4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC211
I
V
†
SRG
V
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, ADB 11 12 13 V
Substrate bias voltage 0 V
High level 1.5 2 2.5
IAG Intermediate level
Low level –11 –10 –9
nput voltage,
Clock frequency, f
t1 Time interval, SRG↓ to IAG↑ 70 ns
t2 Time interval, IAG↑ to SRG transfer pulse ↑ 0 ns
t
W1
t
W2
t3 Time interval, IAG↓ to SRG transfer pulse ↓ 350 ns
t4 Time interval, SRG transfer pulse ↓ to SRG clock pulse ↑ 70 ns
Capacitive load OUT 12 pF
Operating free-air temperature, T
†
The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for clock voltage
levels.
‡
Adjustment is required for optimal performance.
I
clock
ABG Intermediate level
IAG 1.5
SRG 10 MHz
ABG 2
Pulse duration, IAG high 350 ns
Pulse duration, SRG transfer pulse high 350 ns
A
High level 1.5 2 2.5
Low level –11 –10
High level 4 4.5 5
Low level –7.5 –7 –6.5
‡
‡
–10 –5 2
–9
–3 –2.5 –2
–10 45 °C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2-5
TC211
Dynamic range (see Note 2)
dB
Noise voltage
V/√H
Rejection ratio at 7.16 MH
dB
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
electrical characteristics over recommended operating range of supply voltage, TA = –10°C to 45°C
PARAMETER MIN TYP
Antiblooming disabled (see Note 3) 60
Antiblooming enabled 57
Charge conversion factor 4 µV/e
Charge transfer efficiency (see Note 4) 0.99990 0.99998
Signal response delay time, τ (see Note 5 and Figure 5) 25 ns
Gamma (see Note 6) 0.97 0.98 0.99
Output resistance 700 800 Ω
1/f noise (5 kHz) 370
Random noise, f = 100 kHz 70
Noise equivalent signal 150 electrons
z
Supply current 5 10 mA
Input capacitance, C
†
All typical values are at TA = 25°C
NOTES: 2. Dynamic range is –20 times the logarithm of the mean noise signal divided by the saturation output signal.
3. For this test, the antiblooming gate must be biased at the intermediate level.
4. Charge transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using
5. Signal response delay time is the time between the falling edge of the SRG clock pulse and the output signal valid state.
6. Gamma (γ) is the value of the exponent in the equation below for two points on the linear portion of the transfer function curve (this
7. ADB rejection ratio is –20 times the logarithm of the ac amplitude at the OUT divided by the ac amplitude at ADB.
8. SRG rejection ratio is –20 times the logarithm of the ac amplitude at the OUT divided by the ac amplitude at SRG.
i
an electrical input signal.
value represents points near saturation):
From ADB to OUT (see Note 7) 19
From SRG to OUT (see Note 8) 37
IAG 1600
SRG 25 pF
ABG 780
Exposure (2)
ǒ
Exposure (1)
g
Ǔ
Output signal (2)
ǒ
+
Output signal (1)
Ǔ
†
MAX UNIT
n
z
2-6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC211
Sensitivity (see Note 9)
Measured at V
(see Note 10)
mV/l
Saturation signal (see Note 11)
mV
Blooming overload ratio (see Note 12)
Modulation transfer function
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
optical characteristics, TA = 25°C (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
No IR filter
With IR filter
Antiblooming disabled 400 600
Antiblooming enabled 350 450
Strobe 5
Shuttered light 100
Output signal nonuniformity (1/2 saturation) (see Note 13) 10% 20%
Image-area well capacity 150×10
Dark current TA = 21°C 0.027 nA/cm
Dark signal (see Note 14) 10 15 mV
Dark signal nonuniformity for entire field (see Note 15) 4 15 mV
Horizontal 50%
Vertical 70%
NOTES: 9. Sensitivity is measured at an integration time of 16.667 ms and a source temperature of 2856 K. A CM-500 filter is used.
10. VU is the output voltage that represents the threshold of operation of antiblooming. VU ≈ 1/2 saturation signal.
11. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal.
12. Blooming overload ratio is the ratio of blooming exposure to saturation exposure.
13. Output signal nonuniformity is the ratio of the maximum pixel-to-pixel difference in output signal to the mean output signal for
exposure adjusted to give 1/2 the saturation output signal.
14. Dark-signal level is measured from the dummy pixels.
15. Dark-signal nonuniformity is the maximum pixel-to-pixel difference in a dark condition.
U
260
33
3
electrons
x
2
VIH min
Intermediate Level
VIL max
tr = 220 ns, tf = 330 ns for IAG
tr = 115 ns, tf = 135 ns for ABG
100%
90%
10%
0%
PARAMETER MEASUREMENT INFORMATION
t
r
Figure 3. Typical Clock Waveform for IAG and ABG
t
f
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2-7
TC211
V
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
PARAMETER MEASUREMENT INFORMATION
VIH min
VIL max
tr = 25 ns, tf = 30 ns
SRG
OUT
100%
90%
10%
0%
t
r
t
f
Figure 4. Typical Clock Waveform for SRG
– 8.5 V
1.5 V to 2.5 V
– 8.5 V to –10
0%
90%
100%
Sample
and
Hold
CCD Delay
t
15 ns10 ns
Figure 5. SRG and OUT Waveforms
2-8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
192- × 165-PIXEL CCD IMAGE SENSOR
)
0
TYPICAL CHARACTERISTICS
TC211
SOCS008B – JANUARY 1990
VERTICAL MODULATION
TRANSFER FUNCTION
(BARS PARALLEL TO SERIAL REGISTER)
1
0.8
0.6
0.4
0.2
MTF – Modulation Transfer Function
λ = 400 to 700-nm Monochromatic Light
V
= 12 V
ADB
TA = 25°C
0
0 0.2 0.4 0.6
Normalized Spatial Frequency
0
6.3 12.5 18.8 25.0 31.3
Spatial Frequency – Cycles/mm
0.8 1
HORIZONTAL MODULATION
TRANSFER FUNCTION
(BARS PERPENDICULAR TO SERIAL REGISTER
1
0.8
0.6
0.4
0.2
MTF – Modulation Transfer Function
λ = 400 to 700-nm Monochromatic Light
V
= 12 V
ADB
TA = 25°C
0
0 0.2 0.4 0.6
Normalized Spatial Frequency
0
7.3 14.6 21.8 29.1 36.4
Spatial Frequency – Cycles/mm
0.8 1
1000
100
nV/ Hz
Noise –
10
Figure 6 Figure 7
NOISE SPECTRUM OF OUTPUT AMPLIFIER
V
= 12 V
ADB
TA = 25°C
1
10
3
4
10
f – Frequency – Hz
10
5
10
6
Figure 8 Figure 9
10
CCD SPECTRAL RESPONSIVITY
1
V
= 12 V
ADB
TA = 25°C
0.1
Responsivity – A/W
0.01
7
300 500 700 1100 130
Incident Wavelength – nm
900
100%
50%
20%
10%
5%
3%
2%
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2-9
TC211
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
TYPICAL APPLICATION DATA
1
7
Master Oscillator
User-Defined Timer
GND
CLK
CMP
CBNK
CSYNC
TRIG
V
CC
CKGND
IAG
ABG
GT1
S/H
SRG
14
V
CC
8
SS
CC
CC
SS
NC
CC
CC
V
22 kΩ
20
19
18
17
16
ABLVL
15
14
13
12
11
V
20
19
18
17
16
15
14
13
12
11
ABG–
47 kΩ
ADB
TC211
1
ABG
2
V
SS
3
ADB
Image Sensor
IAG
SRG
OUT
6
5
4
1 kΩ
1
2
3
4
ADB
2N3904
500
ANLG V
ANLG IN
ANLG GND
ANLG OUT
327
TL1591
CC
2.2 kΩ
5 kΩ
ADB
EL2020
4
V
DD
DGTL V
DGTL IN
DGTL GND
SUB GND
ADB
6
V
CC
8
CC
7
S/H
6
5
S/H
V
SS
V
IALVL1
V
CC
ABG+
V
CC
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
IALVL
I
IAIN
ABIN
MIDSEL
SAIN
PD
GND
V
V
SEL0OUT
GND
PD
SRG3IN
SRG2IN
SRG1IN
TRGIN
NC
SEL1OUT
V
TMS3473B
/N
ABG+
SS
Parallel Driver
SN28846
SRG3OUT
SRG2OUT
SRG1OUT
TRGOUT
SS
Serial Driver
V
IASR
ABSR
V
ABLVL
IAOUT
ABOUT
SAOUT
V
V
ABG–
V
SEL0
V
V
SEL1
2-10
Sample-and-Hold
OUT
SUPPORT CIRCUITS
DEVICE PACKAGE APPLICATION FUNCTION
SN28846DW 20 pin small outline Serial driver Driver for SRG
TMS3473BDW 20 pin small outline Parallel driver Driver for IAG, ABG
TL1591CPS 8 pin small outline (EIAJ) Sample and hold Single-channel sample-and-hold IC
Figure 10. Typical Application Circuit Diagram
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC211
192- × 165-PIXEL CCD IMAGE SENSOR
SOCS008B – JANUARY 1990
MECHANICAL DATA
The package for the TC21 1 consists of a ceramic base, glass window, and a 6-lead frame. The glass window is sealed
to the package by an epoxy adhesive. The package leads are configured in a dual-in-line organization and fit into
mounting holes with 2,54 mm (0.1 inch) center-to-center spacings.
7,54 (0.297)
7,14 (0.281)
1
7,82 (0.308)
7,24 (0.285)
2,54 (0.100)
0,31 (0.012)
0,23 (0.009)
NOTES: A. Dimensions are in millimeters and parenthetically in inches. Single dimensions are nominal.
B. The center of the package and the center of the image area are not coincident.
C. The distance from the top of the glass to the image sensor surface is typically 1 mm (0.04 inch). The glass is typically 0.020 inch
thick and has an index of refraction of 1.52.
2
3
7,62 (0.300)
6
5
4
4,45 (0.175)
2,54 (0.100)
0,48 (0.019)
0,38 (0.015)
1,30 (0.051)
1,04 (0.041)
7/94
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2-11
SOCS008B – JANUARY 1990
2-12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
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Copyright 1998, Texas Instruments Incorporated
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