Texas Instruments TC211 Datasheet

TC211

192- × 165-PIXEL CCD IMAGE SENSOR

SOCS008B – JANUARY 1990

• Full-Frame Operation

• Antiblooming Capability

• Single-Phase Clocking for Horizontal and

DUAL-IN-LINE PACKAGE

(TOP VIEW)

ABG

IAG

Vertical Transfers

• Fast Clear Capability

• Dynamic Range...60 dB Typical

• High Blue Response

ADB

SRG

OUT

• High Photoresponse Uniformity

• Solid-State Reliability With No Image

Burn-In, Residual Imaging, Image Distortion, Image Lag, or Microphonics

• 6-Pin Dual-In-Line Ceramic Package

• Square Image Area:

– 2640 µm by 2640 µm – 192 Pixels (H) by 165 Pixels (V) – Each Pixel 13.75 µm (H) by 16 µm (V)

description

The TC211 is a full-frame charge-coupled device (CCD) image sensor designed specifically for industrial applications requiring ruggedness and small size. The image-sensing area is configured into 165 horizontal lines each containing 192 pixels. Twelve additional pixels are provided at the end of each line to establish a dark reference and line clamp. The antiblooming feature is activated by supplying clock pulses to the antiblooming gate, an integral part of each image-sensing element. The charge is converted to signal voltage at 4 µV per electron by a high-performance structure with built-in automatic reset and a voltage-reference generator. The signal is further buffered by a low-noise two-stage source-follower amplifier to provide high output-drive capability.

The TC21 1 is supplied in a 6-pin dual-in-line ceramic package approximately 7,5 mm (0.3 in.) square. The glass window can be cleaned using any standard method for cleaning optical assemblies or by wiping the surface with a cotton swab soaked in alcohol.

The TC211 is characterized for operation from –10°C to 45°C.

This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent

allowed to flow. Specific guidelines for handling devices of this type are contained in the publication

Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies

damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is

Guidelines for Handling

available from Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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TC211

I/O

DESCRIPTION

192- × 165-PIXEL CCD IMAGE SENSOR

SOCS008B – JANUARY 1990

functional block diagram

165

ABG

ADB

OUT

1 192

Serial Register

Clear Gate

12 Dark Pixels

192 Image Pixels

6 Dummy Pixels

IAG

SRG

Terminal Functions

TERMINAL

NAME NO.

ABG 1 I Antiblooming gate V

ADB 3 I Supply voltage for amplifier drain bias OUT 4 O Output signal SRG 5 I Serial-register gate

IAG 6 I Image-area gate storage

2 Amplifier ground

functional description

The image-sensing area consists of 165 horizontal image lines each containing 192 photosensitive elements (pixels). Each pixel is 13.75 µm (horizontal) by 16.00 µm (vertical). As light enters the silicon in the image-sensing area, free electrons are generated and collected in potential wells (see Figure 1). During this time, the antiblooming gate is activated by applying a burst of pulses every horizontal blanking interval. This prevents blooming caused by the spilling of charge from overexposed elements into neighboring elements. The antiblooming gate is typically held at a midlevel voltage during readout. The quantity of charge collected in each pixel is a linear function of the incident light and the exposure time. After exposure and under dark conditions, the charge packets are transferred from the image area to the serial register at the rate of one image line per each clock pulse applied to the image-area gate. Once an image line has been transferred into the serial register, the serial-register gate can be clocked until all of the charge packets are moved out of the serial register to the charge detection node at the amplifier input.

There are 12 dark pixels to the right of the 192 image pixels on each image line. These dark pixels are shielded from incident light and the signal derived from them can be used to generate a dark reference for restoration of the video black level on the next image line.

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192- × 165-PIXEL CCD IMAGE SENSOR

SOCS008B – JANUARY 1990

functional description (continued)

Each clock pulse applied to the image area gate causes an automatic fast clear of the 192 image pixels and 12 dark pixels of the serial register before the next image line is transferred into the serial register. (Note that the six dummy pixels at the front of the serial register, which are used to transport charge packets from the serial register to the amplifier input, are not cleared by the image area gate clock.) The automatic fast-clear feature can be used to initialize the image area by transferring all 165 image lines to the serial register gate under dark conditions without clocking the serial register gate.

Barriers

Antiblooming Gate

Representative

Top View of Pixels

Potential Wells

Vertical 16 µm

Horizontal

13.75 µm

TC211

Cross Section

of Pixels

Cross Section

of Potentials

in Silicon

Virtual Phase

1 Pixel

Clocked Phase (imagearea gate)

Virtual Phase

Clocked Phase (imagearea gate)

IAG Low ABG Low

Virtual Phase

Clocked Phase (imagearea gate)

Etched Polysilicon Insulating Oxide

Silicon

ABG Intermediate

Channel Stop

IAG High

Direction of Vertical Charge Transfer

ABG High

Figure 1. Charge Accumulation and Transfer Process

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TC211 192- × 165-PIXEL CCD IMAGE SENSOR

SOCS008B – JANUARY 1990

Readout Integration

ABG

165 Cycles

IAG

210 Cycles

SRG

IAG

SRG

Figure 2. Timing Diagram, Noninterlace Mode

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range for ADB (see Note 1) 0 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range for IAG, SRG, ABG, VI –15 V to 5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range –30°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to VSS.

–30°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

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