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TAS5508-5142K7EVM
User Manual
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Texas Instruments TAS5508-5142K7EVM User Manual

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TAS5508-5142K7EVM User’s Guide
Evaluation Module for the TAS5508B Digital Audio PWM Processor and TAS5142 Digital Amplifier Power Output Stage
User's Guide
June 2006
SLEU071
2 SLEU071 – June 2006
Contents
1 Overview ................................................................................................................... 5
1.1 TAS5508-5142K7EVM Features.................................................................................. 6
1.2 PCB Key Map ....................................................................................................... 7
2 System Interfaces ...................................................................................................... 9
2.1 Power Supply (PSU) Interface (J901 and J900) ................................................................ 9
2.2 PSU Control Interface (J902) .................................................................................... 10
2.3 Loudspeaker Connectors (J101 … J107) ...................................................................... 10
2.4 Headphone Connector (J700) ................................................................................... 11
2.5 Control Interface (J40) ............................................................................................ 11
2.6 Digital Audio Interface (J60) ..................................................................................... 13
3 Protection ................................................................................................................ 15
3.1 Short-Circuit Protection and Fault-Reporting Circuitry ....................................................... 15
3.2 Fault Reporting .................................................................................................... 15
4 Related Documentation From Texas Instruments ......................................................... 17
4.1 Trademarks ........................................................................................................ 17
Important Notices ............................................................................................................... 18
SLEU071 – June 2006 Contents 3
List of Figures
1-1 Integrated PurePath Digital™ Amplifier System ......................................................................... 6
1-2 Physical Structure for TAS5508-5142K7EVM (Rough Outline) ....................................................... 7
2-1 Recommended Power-Up Sequence ..................................................................................... 9
2-2 J901 and J900 Pin Numbers ............................................................................................... 9
2-3 J902 Pin Numbers ......................................................................................................... 10
2-4 J101 . . . J107 Pin Numbers .............................................................................................. 11
2-5 J700 Pin Numbers ......................................................................................................... 11
List of Tables
2-1 Recommended Supply Voltages ........................................................................................... 9
2-2 J901 Pin Description ....................................................................................................... 10
2-3 J900 Pin Description ....................................................................................................... 10
2-4 J902 Pin Description ....................................................................................................... 10
2-5 J101 . . . J107 Pin Description ............................................................................................ 11
2-6 J700 Pin Description ....................................................................................................... 11
2-7 J40 Pin Description ........................................................................................................ 11
2-8 J60 Pin Description ........................................................................................................ 13
3-1 TAS5142 Warning/Error Signal Decoding .............................................................................. 15
4 List of Figures SLEU071 – June 2006
Chapter 1
SLEU071 – June 2006

Overview

The TAS5508-5142K7EVM PurePath Digital™ customer evaluation amplifier module demonstrates two audio integrated circuits, TAS5508B and TAS5142, from Texas Instruments (TI).
The TAS5508BPAG is a high-performance 32-bit (24-bit input) multichannel PurePath Digital pulse width modulator (PWM) based on Equibit™ technology, with a fully symmetrical AD modulation scheme. It accepts an input sample rate from 32 kHz to 192 kHz. The device also has digital audio processing (DAP) that provides 48-bit signal processing, advanced performance, and a high level of system integration. The device has interfaces for headphone output and power supply volume control (PSVC).
The TAS5142DKD is a compact, high-power, digital amplifier power stage designed to drive a 4- Ω loudspeaker up to 100 W/10% THD+N. It contains integrated gate drivers, four matched and electrically isolated enhancement-mode N-channel power DMOS transistors, and protection/fault-reporting circuitry.
The DKD package has a PowerPAD™ on the top side for heat transfer through a heatsink. The heatsink in this design is for evaluation purposes only.
This EVM, together with a TI input-USB board, is a complete 7-channel digital audio amplifier system, which includes digital input (S/PDIF), analog inputs, interface to PC, and DAP features, such as digital volume control, input and output mixers, auto mute, equalization, tone controls, loudness, dynamic range compression, and PSVC output. There are configuration options for stereo line level output, stereo headphone output, and power-stage failure protection.
This 6.1 system is designed for home-theater applications, such as A/V receivers, DVD minicomponent systems, home theater in a box (HTIB), DVD receivers, or plasma display panels (PDPs).
PurePath Digital, Equibit, PowerPAD are trademarks of Texas Instruments.
SLEU071 – June 2006 Overview 5
www.ti.com
I2S Bus
TAS5508-5142K7EVM
MODULE
I2CBus
Example
TIInput-USB
board
6 Channel
Analog
Input
USB
Interface
Optical
and
Coaxia
lS/PDIF
Input
ControlInterface
PowerSupply
7 Channel
SpeakerOutput
2 Channel
HeadphoneOutput
TAS5508-5142K7EVM Features

1.1 TAS5508-5142K7EVM Features

• 7-channel PurePath Digital evaluation module (double-sided plated-through PCB layout)
• Stereo channel line output
• Stereo headphone output
• Self-contained protection system (short circuit and thermal)
• Standard I2S and I2C/control connector for TI input board
• Double-sided plated-through PCB layout
Figure 1-1. Integrated PurePath Digital™ Amplifier System
Overview 6 SLEU071 – June 2006
www.ti.com

1.2 PCB Key Map

SPEAKEROUTPUTSSPEAKEROUTPUTS
TAS5508B
OUTPUT STAGE
CHANNEL 1
OUTPUT STAGE
CHANNEL 3
OUTPUT STAGE
CHANNEL 2
OUTPUT STAGE
CHANNEL 4
OUTPUT STAGE
CHANNEL 5
3.3V
Regulator
5V
Regulator
Gate Drive
Regulator
PSU
INTERFACE
(J901)
PSU
CONTROL
(J902)
INPUT SIGNAL
INTERFACE (J60)
CONTROL
INTERFACE (J40)
HEADPHONE
OUTPUT
(J700)
OUTPUT STAGE
CHANNEL 6
OUTPUT STAGE
CHANNEL 7
J101J103J102J104
PSU
INTERFACE
(J900)
J105J106J107
Physical structure for the TAS5508-5142K7EVM is illustrated in Figure 1-2 .
PCB Key Map
Figure 1-2. Physical Structure for TAS5508-5142K7EVM (Rough Outline)
SLEU071 – June 2006 Overview 7
www.ti.com
PCB Key Map
Overview 8 SLEU071 – June 2006
Outputstagepowersupply
RESET
>1ms
Systempowersupply
4
1
2
3
(PCBconnectortopview)
This chapter describes the TAS5508-5142K7EVM board in regards to power supplies and system interfaces.

2.1 Power Supply (PSU) Interface (J901 and J900)

The TAS5508-5142K7EVM module must be powered from external power supplies. High-end audio performance requires a stabilized power supply with low ripple voltage and low output impedance.
Note: The length of power-supply cable must be minimized. Increasing length of PSU cable is
equal to increasing the distortion for the amplifier at high output levels and low frequencies.
Maximum output-stage supply voltage depends of the speaker load resistance. Please check the recommended maximum supply voltage in the TAS5142 data sheet.
Chapter 2
SLEU071 – June 2006

System Interfaces

Table 2-1. Recommended Supply Voltages
DESCRIPTION CURRENT RECOMMENDATIONS
System power supply 15 V to 20 V 0.3 A
Output-stage power supply 0 V to 32 V 6 A
(1)
The rated current correspond to 2-channel full scale (80 W each), which most likely is adequate for a standard 8-channel amplifier design.
VOLTAGE
LIMITATIONS
(1)
The recommended TAS5142 power-up sequence is shown in the figure below. For proper TAS5142 operation, the RESET signal should be kept low during power up. RESET is pulled low during power up for 200 ms by the onboard reset generator (U73).
Figure 2-1. Recommended Power-Up Sequence
SLEU071 – June 2006 System Interfaces 9
Figure 2-2. J901 and J900 Pin Numbers
www.ti.com
1
2
3
5
4
(PCBconnectortopview)
PSU Control Interface (J902)
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 PVDD Output-stage power supply 2 SYSTEM System power supply 3 GND Ground 4 GND Ground
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 PVDD Extra output-stage power supply 2 PVDD Extra output-stage power supply 3 GND Extra ground 4 GND Extra ground

2.2 PSU Control Interface (J902)

This interface is used for onboard sensing of output supply voltage and for the power supply volume control (PSVC) signal.
Table 2-2. J901 Pin Description
Table 2-3. J900 Pin Description

2.3 Loudspeaker Connectors (J101 … J107)

Figure 2-3. J902 Pin Numbers
Table 2-4. J902 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 — Reserved for future use 2 PVDD Sense of output power supply 3 GND Ground 4 RESET System reset (bidirectional) 5 PSVC Power supply volume control signal
CAUTION
Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope).
System Interfaces10 SLEU071 – June 2006
www.ti.com
1
2
(PCBconnectortopview)
1
4
2 3
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 OUT-1 Speaker negative output 2 OUT-2 Speaker positive output

2.4 Headphone Connector (J700)

Headphone Connector (J700)
Figure 2-4. J101 . . . J107 Pin Numbers
Table 2-5. J101 . . . J107 Pin Description
Figure 2-5. J700 Pin Numbers

2.5 Control Interface (J40)

This interface connects the TAS5508-5142K7EVM board to a TI input-USB board.
Table 2-6. J700 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 OUT-R Right headphone output 2 GND Ground 3 — For future use 4 OUT-L Left headphone output
Table 2-7. J40 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 GND Ground 2 RESERVED — 3 GND Ground 4 RESET System reset (bidirectional). Activate
MUTE before RESET for quiet reset.
5 BKND-ERR Backend error (or soft reset) provides
reduced click and pop reset, without resetting I2C volume register settings.
6 MUTE Ramp volume from any setting to
noiseless soft mute. Mute can also be activated by I2C.
7 PDN Power down. TAS5508B will go to
power-down state when activated. 8 RESERVED — 9 RESERVED —
10 SDA I2C data clock
SLEU071 – June 2006 System Interfaces 11
www.ti.com
Control Interface (J40)
Table 2-7. J40 Pin Description (continued)
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
11 GND Ground 12 SCL I2C bit clock 13 RESERVED — 14 RESERVED — 15 RESERVED — 16 RESERVED — 17 GND Ground 18 RESERVED — 19 RESERVED — 20 SD Shutdown error reporting for all
channels. Activated if TAS5142 has
high current or high temperature. See
Chapter 3, Protection.
21 SD Shutdown reporting. Activated if one or
more TAS5142 has high current or high
temperature. Pin 21 connected to Pin
20. See Chapter 3, Protection.
22 OTW Temperature warning. Activated if
TAS5142 has reached temperature
warning level.
23 OTW Temperature warning. Activated if one
or more TAS5142 has reached
temperature warning level. Pin 23
connected to Pin 22.
24 HP-SEL Headphone select. Headphone active
when LOW and inactive when HIGH. To
use this pin, <100- Ω resistor must be
placed for R50.
25 GND Ground 26 GND Ground 27 RESERVED — 28 RESERVED — 29 RESERVED — 30 RESERVED — 31 GND Ground 32 GND Ground 33 +5V +5Vdc power supply (output) 34 +5V +5Vdc power supply (output)
System Interfaces12 SLEU071 – June 2006
www.ti.com

2.6 Digital Audio Interface (J60)

The digital audio interface contains digital audio signal data (I2S), clocks, etc. Please see the TAS5508B Data Manual for signal timing and details not explained in this document.
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 GND Ground 2 MCLK Master clock input. Low jitter system
3 GND Ground 4 SDIN1 I2S data 1, channel 1 and 2 5 SDIN2 I2S data 2, channel 3 and 4 6 SDIN3 I2S data 3 7 SDIN4 I2S data 4 8 — Reserved 9 — Reserved
10 GND Ground 11 SCLK I2S bit clock 12 GND Ground 13 LRCLK I2S left-right clock 14 GND Ground 15 — Reserved 16 GND Ground
Digital Audio Interface (J60)
Table 2-8. J60 Pin Description
clock for PWM generation and
reclocking. Ground connection from
source to TAS5508B must be a low
impedance connection.
SLEU071 – June 2006 System Interfaces 13
www.ti.com
Digital Audio Interface (J60)
System Interfaces14 SLEU071 – June 2006
This chapter describes the short-circuit protection and fault-reporting circuitry of the TAS5142 device.

3.1 Short-Circuit Protection and Fault-Reporting Circuitry

The TAS5142 is a self-protecting device that provides fault reporting (including high-temperature protection and short-circuit protection). The TAS5142 is configured in back-end auto-recovery mode and, therefore, resets automatically after all errors (M1, M2, and M3 are set low). This means that the device will restart itself after a error occasion and report through the SD error signal.

3.2 Fault Reporting

The OTW and SD outputs from the TAS5142 indicate fault conditions. Please refer to the TAS5142 Data Manual for a description of these pins.
Table 3-1. TAS5142 Warning/Error Signal Decoding
OTW SD DEVICE CONDITION
0 0 High-temperature error and/or high-current error 0 1 High-temperature warning 1 0 Undervoltage lockout or high-current error 1 1 Normal operation, no errors/warnings
Chapter 3
SLEU071 – June 2006

Protection

The temperature warning signals at the TAS5508-5142K7EVM board are wired-OR to one temperature warning signal ( OTW – pin 22 in control interface connector). Shutdown signals are wired-OR into one shutdown signal ( SD – pin 20 in control interface connector).
The shutdown signals, together with the temperature warning signal, give chip state information as described in Table 3-1 . Device fault-reporting outputs are open-drain outputs.
SLEU071 – June 2006 Protection 15
www.ti.com
Fault Reporting
Protection 16 SLEU071 – June 2006
Chapter 4
SLEU071 – June 2006

Related Documentation From Texas Instruments

The following is a list of documents that have detailed descriptions of the integrated circuits used in the design of the TAS5508-5142K7EVM. This information can be obtained at the URL http://www.ti.com .
• TAS5508B data sheet (SLES162 )
• TAS5142 data sheet (SLES126 )
• TPA112 data sheet (SLOS212 )
• TPS3801K33 data sheet (SLVS219 )
• LM317M data sheet (SLVS297 )
• TPS76733 data sheet (SLVS208 )
Additional documents
• TAS5508-5142K7EVM Application Report (SLEA055 )
• PC Configuration Tool for TAS5508B (TAS5508 GUI ver. 4.0 or later)
• General Application Notes

4.1 Trademarks

Equibit, PurePath Digital, and PowerPAD are trademarks of Texas Instruments.
SLEU071 – June 2006 Related Documentation From Texas Instruments 17
EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT,
DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software
performance, or infringement of patents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh .
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used.
FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a
finished end-product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 to 32 V and the output voltage range of 15 V to 20 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 75°C. The EVM is designed to operate properly with certain components above 75°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2006, Texas Instruments Incorporated
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