Texas Instruments TAFE1040CPFB Datasheet
TAFE1040
3 V, 10-BIT 42 MSPS, AREA CCD ANALOG FRONT-END
SLVS284 – FEBRUAR Y 2000
features
D
Single-Chip CCD Analog Front-End
D
10-Bit, 42 MSPS, A/D Converter
D
Single 3-V Supply Operation
D
Programmable Timing Signal Delays
D
Low Power: 180 mW Typ, 2-mW
applications
D
Video Camcorde
D
Digital Still Camera
PFB PACKAGE
(TOP VIEW)
Power-down Mode
D
Differential Nonlinearity Error
– <±0.6 LSB Typ
D
Integral Nonlinearity Error
– <±1.5 LSB Typ
D
Programmable Gain Amplifier (PGA) With
0 dB to 36 dB Gain Range (0.045 dB/Step)
D
Automatic or Programmable Black Level
and Offset Calibration With Digital Filter
and Bad Pixel Limits
D
Additional DACs for External Analog
Setting
D
Serial Interface for Register Configuration
D
Internal Reference Voltages
D
48-Pin TQFP Package
description
The TAFE1040 is a complete area CCD analog
front-end/digitizer designed for digital camera
applications. The TAFE1040 performs all the
AGND5
RBD
RMD
RPD
AVDD5
VSS
AVDD1
AGND1
SR
SV
CLAMP
CLREF
BLKG
TPP
35 34 33 32 3136 30
37
38
39
40
41
42
43
44
45
46
47
48
23
1
PIN
DIN
TPM
AVDD4
5678
4
AVDD2
AGND2
AGND4
OBCLP
DVDD
DGND
RESETCSSDIN
STBY
28 27 2629
D0D1D2
10 11 12
9
SCLK
ADCCLK
25
D3D4D5
24
23
22
21
20
19
18
17
16
15
14
13
analog processing functions necessary to maxmize the dynamic range, corrects various errors associated with the CCD sensor, and then digitizes the results
with an on-chip high-speed analog-to-digital converter (ADC). The key components of the T AFE1040 include:
input clamp circuitry for the CCD and analog video signals, a correlated double sampler (CDS), a programmable
gain amplifier (PGA) with 0 dB to 36 dB gain range, two internal digital-to-analog converters (DAC) for automatic
or programmable optical black level and offset calibration, a 10-bit, 42 MSPS pipeline ADC, a parallel data port
for easy microprocessor interface and a serial port for configuring internal control registers, two additional DACs
for external system control, and internal reference voltages.
OE
SCKP
DACO2
DACO1
AGND3
A VDD3
DIGND
DIVDD
D9
D8
D7
D6
PRODUCT PREVIEW
Designed in advanced CMOS process, the T AFE1040 operates from a single 3-V power supply with a normal
power consumption of 180 mW at 42 MSPS and a 2-mW power-down mode.
Very high throughput rate, single 3 V operation, low power consumption, and fully integrated analog processing
circuitry make the T AFE1040 an ideal area CCD signal processing solution for the high-resolution digital camera
and camcorder applications.
The part is available in a 48-pin TQFP package and is specified over –20°C to 75°C operating temperature
range.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1
TAFE1040
3 V, 10-BIT 42 MSPS, AREA CCD ANALOG FRONT-END
SLVS284 – FEBRUAR Y 2000
AVAILABLE OPTIONS
PACKAGE DEVICES
functional block diagram
T
A
–20°C to 75°C TAFE1040CPFB
TQFP
(PFB)
DIN
DACO1
DACO2
CLAMP CLREF
CLAMP
8-Bit
DAC
8-Bit
DAC
DAC
Reg
DAC
Reg
VSS
1.2 V Reference
CDS
AVDD1–5
Σ
8-Bit
DAC
Offset
Regulator
PGA
PGA
Regulator
AGND1–5
TPP TPM RPD RBD RMD DVDD DIVDD
Internal Reference
Σ
10
8-Bit
DAC
Offset
Regulator
10-Bit
DAC
Optical
Black
Pixel Limits
Digital
Averager/
Filter
Three
State
Latch
Timing
and
Control
Logic
Serial
Port
DIGNDDGND
OE
D0
D9
RESET
CLK
SV
SR
BLKG
OBCLP
STBY
SCKP
CS
SCLK
SDIN
PRODUCT PREVIEW
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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