TA5704EVM 4-Channel Digital Audio Power
Amplifier with Hardware Control
User's Guide
Literature Number: SLOU224
April 2008
2 SLOU224 – April 2008
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Contents
Preface ........................................................................................................................................ 5
1 Overview ............................................................................................................................. 7
1.1 TAS5704EVM Features .................................................................................................. 8
1.2 Basic Tools for Initial Board Power up ................................................................................. 9
2 System Interfaces ................................................................................................................ 9
2.1 PSU Interface .............................................................................................................. 9
2.2 PSC Connector .......................................................................................................... 10
2.3 Loudspeaker and Subwoofer Connectors (2-Channel BTL Configuration) ...................................... 10
2.4 Digital Audio Interface SPDIF (J1/OPTO) ............................................................................ 10
2.5 ADC Interface ............................................................................................................ 11
2.6 Board Power up General Guidelines .................................................................................. 11
3 Jumpers and Control Utilities .............................................................................................. 11
3.1 Clock Frequency Change Jumper ..................................................................................... 11
3.2 SPDIF/PSIA Utilization Jumpers ....................................................................................... 11
3.3 Data Routing Jumpers .................................................................................................. 11
3.4 GAIN Jumpers ........................................................................................................... 12
3.5 Data Format Jumpers ................................................................................................... 12
3.6 CONFIG Jumpers ....................................................................................................... 12
3.7 Switches .................................................................................................................. 13
4 Board Layout, Bill of Material, and Schematics ...................................................................... 14
4.1 TAS5704EVM Board Layout, Top Composite View ................................................................ 14
4.2 TAS5704EVM Board Layout, Top Layer View ....................................................................... 15
4.3 TAS5704EVM Board Layout, Bottom Layer View ................................................................... 16
4.4 Bill of Materials ........................................................................................................... 17
4.5 Schematic ................................................................................................................ 19
Important Notices ............................................................................................................... 20
SLOU224 – April 2008 Table of Contents 3
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List of Figures
1 2-Channel (BTL) Configuration with External Subwoofer EVM (TAS5601EVM2) .................................. 7
2 2-Channel (SE) + 1-Channel (BTL) Configuration ...................................................................... 8
3 4-Channel (SE) Configuration .............................................................................................. 8
4 Top Composite View of TAS5704EVM ................................................................................... 9
5 Top Layer Composite ...................................................................................................... 14
6 Top Layer .................................................................................................................... 15
7 Bottom Layer ................................................................................................................ 16
List of Tables
1 Recommended Power Supplies .......................................................................................... 10
2 TAS5704 SDINx Data Source ............................................................................................ 11
3 TAS5704 Gain Configuration ............................................................................................. 12
4 TAS5704 Data Format ..................................................................................................... 12
5 DIR9001 SPDIF Output Data Format .................................................................................... 12
6 TAS5704 Output Configuration ........................................................................................... 13
7 Bill of Materials for TAS5704EVM ....................................................................................... 17
4 List of Figures SLOU224 – April 2008
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About This Manual
This manual describes the operation of the TAS5704EVM evaluation module from Texas Instruments.
How to Use this Manual
This document contains the following chapters
• Chapter 1 – Overview
• Chapter 2 – System Interfaces
• Chapter 3 – Jumpers and Control Utilities on TAS5704
• Chapter 4 – TAS5704EVM Layout
Information About Cautions and Warnings
This manual may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your
software or equipment.
Preface
SLOU224 – April 2008
Read This First
CAUTION
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you
The information in a caution or a warning is provided for your protection. Please read each caution and
warning carefully.
Related Documentation from Texas Instruments
The following table contains a list of data manuals that have detailed descriptions of the integrated circuits
used in the design of the TAS5704EVM. The data manuals can be obtained at the URL http://www.ti.com .
WARNING
Part Number Literature Number
TAS5704 Data Sheet SLOS563
DIR9001PW SLES198
PCM1808PW SLES177 A
TPS76733QD SLVS2081
TAS5601 SLAS585
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Additional Documentation
Additional Documentation
• General Application Notes
EVM Warnings / Restrictions and FCC Warning
See the Evaluation Board/Kit Warnings and Restrictions page towards the end of this User's Guide.
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6 Read This First SLOU224 – April 2008
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SPDIF/
Optical,Coax
2CH AnalogInput
fromOtherSource/
DigitalOut
TAS5704
TAS5601EVM2
Subwofer
PWMout
Left
Right
I2S
TA5704EVM 4-Channel Digital Audio Power Amplifier with
Hardware Control
1 Overview
TAS5704 customer evaluation module (EVM) demonstrates the integrated circuit (IC) TAS5704 from
Texas Instruments (TI).
TAS5704 is a 4-channel device with an I2S/RJ/LJ digital audio stream input and amplified PWM signal
out. The subwoofer PWM signal is provided to an external class D power stage (TAS5601), which uses a
LC demodulation filter to drive a subwoofer. For detail information about the TAS5704 device review the
device data sheet, document number SLOS563 .
TAS5704 is designed to drive two 8- Ω loudspeakers up to 20W per channel (10%THD+N) in a BTL
configuration. The TAS5704EVM can also be configured to drive four, 4- Ω speakers in a single-ended
(SE) configuration. Finally, the TAS5704EVM can be configured to drive 2 single-ended speakers plus 1
bridge-tied speaker (2.1 mode). Review the board schematic, and TAS5601 documents for additional
information and more specific application information on the subwoofer daughter card and connector.
TAS5704EVM, together with other TI components on this board, is a complete 4 channel digital audio
amplifier system, which includes digital input (SPDIF), analog inputs via ADC, and other features like
mute, power down, output configuration control, format control, and gain control.
User's Guide
SLOU224 – April 2008
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Figure 1. 2-Channel (BTL) Configuration with External Subwoofer EVM (TAS5601EVM2)
SPDIF/
Optical,Coax
2CH AnalogInput
fromOtherSource/
DigitalOut
TAS5704
Left
Right
I2S
Sub
LC+
Cap
LC+
Cap
LC
SPDIF/
Optical,Coax
2CH AnalogInput
fromOtherSource/
DigitalOut
TAS5704
LFront
RFront
I2S
LC+
Cap
LC+
Cap
LRear
RRear
LC+
Cap
LC+
Cap
Overview
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Figure 2. 2-Channel (SE) + 1-Channel (BTL) Configuration
1.1 TAS5704EVM Features
8 TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control SLOU224 – April 2008
Figure 3. 4-Channel (SE) Configuration
• Self-contained protection systems and control pins
• Standard I2S data input using optical or RCA inputs
• Analog input through analog to digital converter
• Subwoofer connection. PWM terminal to provide signal and power to an external subwoofer board
(TAS5601EVM2)
• Double-sided plated-through PCB layout, 2oz copper, 2mm.
• Access to control signal gain, output configuration, and data format on the EVM board using jumpers
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System Interfaces
Figure 4. Top Composite View of TAS5704EVM
1.2 Basic Tools for Initial Board Power up
• Up to 26V, 3A power supply (PVCC)
• 5V, 500mA power supply (VIN)
• Banana cables for power supplies and speakers
• Optical or coaxial cable for SPDIF interface based on signal source
• Two 8 Ω speakers (BTL) or 4 Ω speakers (SE). Resistive loads can also be used
• Optional: TAS5601EVM2 (for subwoofer connection when using BTL configuration)
2 System Interfaces
This chapter describes the TAS5704EVM board in regards to power supply (PSU) and system interfaces.
2.1 PSU Interface
The TAS5704EVM module is powered using two power supply sources a 10–26V (PVCC) power supply
and a 5V (VIN) power supply. The 3.3V voltage levels are generated on the board using voltage regulators
from VIN supply.
Note: The length of power supply cable must be minimized. Increasing length of PSU cable is
equal to increasing the distortion for the amplifier at high output levels and low frequencies.
Maximum output stage supply voltage depends on the speaker load resistance. Check the recommended
maximum supply voltage in the TAS5704 data sheet (SLOS563 ).
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System Interfaces
Table 1. Recommended Power Supplies
Description Voltage Limitations Current Recommendations
System power supply 5 V 500 mA
Output power stage supply 10 – 26 V 3A
(1)
The rated current correspond to 2 channels at 20W per channel.
(8 Ω load)
2.2 PSC Connector
• Connect the positive node of the 5V (VIN) power supply to the red binding post marked VIN.
• Connect the GND node of the 5V power supply to the black binding post marked GND
• Connect the positive node of the high voltage power supply (PVCC) to the red binding post marked
PVCC.
• Connect the negative node of the high voltage power supply (PGND) to the black binding post marked
PGND.
There is no specific power up sequence for TAS5704, but it is recommended to power up the VIN
supply first while reset is kept low for at least 1ms and then power up the PVCC.
2.3 Loudspeaker and Subwoofer Connectors (2-Channel BTL Configuration)
CAUTION
Both positive and negative speaker outputs are floating and may not be
connected to ground (e.g. through an oscilloscope).
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(1)
• Connect the positive (+) and negative (–) nodes of the left speaker to the corresponding metal binding
post marked OUTA and OUTB on TAS5704EVM board.
• Connect the positive (+) and negative (–) nodes of the right speaker to the corresponding metal
binding post marked OUTC and OUTD on TAS5704EVM board.
• Install jumpers JP3–JP6 and JP7–JP10 for BTL configuration
• The subwoofer is an option on this EVM, which is provided through connecting TAS5601EVM2 to the
TAS5704EVM using connector J1. Connector J1 provides the power and corresponding PWMs to the
TAS5601EVM2 (subwoofer amplifier). TAS5601EVM2 is configured in PBTL and is able to provide
40W to an 8- Ω speaker. Connect the subwoofer positive and negative nodes to the corresponding
metal binding posts on the TAS5601EVM2.
2.4 Digital Audio Interface SPDIF (J1/OPTO)
The Digital Audio Interface contains digital audio signal data (I2S). See TAS5704 Data sheet (SLOS563 )
for signal timing and details not explained in this document.
RCA connector and OPTO connector are the two SPDIF interfaces. The switch S1 is used to toggle
between OPTO and RCA connector based on available signal source. Once the RCA cable or optical
cable is connected and the signal source is powered up, please verify the SPDIF lock indicator (blue
LED3) to make sure there is viable signal available to the device.
The format of the DIR9001 SPDIF receiver can be changed using jumpers FMT0 and FMT1. Jumpers
installed = 0. Jumpers removed = 1. The description of possible modes is printed on the EVM.
See the schematic of TAS5704EVM and the DIR9001 device for detail information on method by which
the data and clocks are provided to TAS5704.
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2.5 ADC Interface
In the absence of digital signal source ADC (PCM1808) may be used to convert an analog audio signal to
digital signal and provide it to TAS5704. DIR9001 still provides clocks to ADC in this process. The
frequency of the oscillator selected for DIR 9001determinse the sampling frequency in the absence of
digital signal. If the OSC is 24MHz the sampling frequency will be set at 96kHz and if the OSC is selected
to be 12MHz the sampling frequency will be defaulted to 48kHz when there is no signal on SPDIF input
terminals. ADC is an additional feature to this board to provide flexibility in sourcing audio signal to
TAS5704. Please review the datasheet of PCM1808 for detail description of the ADC on this EVM.
2.6 Board Power up General Guidelines
After connecting the loud speakers (loads), power supply, and data line, power up the VIN power supply.
Then power up the PVCC power supply. It is recommended to set the PVCC level to 10 volts and then
ramp it up to 20 volts to verify the cable connection functionality. It is recommended to set the gain to
–3dB at start by having both GAIN ( GAIN0 and GAIN1) jumpers inserted. Note that the gain settings
marked on the EVM are not correct. Please see Table 3 on the next page for the correct settings. Having
jumpers FM0 and FM1 inserted and FM2 removed sets the data format for the device to I2S format. Make
sure the SPDIF format jumpers, FMT0 and FMT1 are removed to set the receiver format to I2S. It is
important to note that a device RESET (S2 on the top of the board labeled MASTER RESET) needs to be
applied after each gain, format, or configuration change in order for the device to latch in the new settings.
Finally, install jumpers CFG1 and CFG2 in the Config Control to select 2-CH-BTL-AD mode.
3 Jumpers and Control Utilities
Jumpers and Control Utilities
3.1 Clock Frequency Change Jumper
JP1: In the presence of a valid digital signal input, when SPDIF lock occurs, the user may use JP1 to
change LR clock and BIT clock. When a shunt is inserted, the SCKO = 512Fs and when the shunt is
removed the SCKO = 256Fs. Default is SCKO = 256Fs.
In the absence of a valid digital signal DIR9001 clock outputs switch to the frequency of crystal (Y1). If the
crystal is chosen to be 24MHz the LR clock will be 96KHz and if the crystal is chosen to be 12MHz the LR
clock will be 48kHz.
3.2 SPDIF/PSIA Utilization Jumpers
The jumpers MCLK, LRCK, SCLK, SDATA allow the user to switch between the internal clock and data
sources and external clock and data sources for instance PSIA (from AP instrument). The default
configuration of these jumpers is SPDIF as it is marked on the EVM with a white arrow. PSIA outputs may
be utilized using pins 2 and 3 of the jumpers. Keep in mind that pin 3 of each jumper is connected to
GND. Thus, the user must pay attention to the polarity of the PSIA output cables at the time of insertion.
3.3 Data Routing Jumpers
Jumpers SDIN1, SDIN2: These jumpers enable the user to assign a data source to TAS5704 SDIN1 and
SDIN2 pins. See Table 2 .
Jumper JP15:SDIN1 Jumper JP16:SDIN2 SDIN1 Source SDIN2 Source
Position Position
1-2 1-2 ADC ADC
1-2 2-3 SPDIF/PSIA SPDIF/PSIA
2-3 1-2 SPDIF/PSIA ADC
2-3 2-3 SPDIF/PSIA SPDIF/PSIA
Table 2. TAS5704 SDINx Data Source
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Jumpers and Control Utilities
3.4 GAIN Jumpers
GAIN0 and GAIN1 jumpers enable the user to change the gain of the device. It is important to assert
RESET (S2 labeled MASTER RESET) after each gain change in order for the device to recognize the new
gain configuration. The truth table is shown below and also it is marked on the EVM board. However, the
gain settings are WRONG on the EVM silkscreen. Refer to Table 3 for the correct gain settings.
3.5 Data Format Jumpers
FM0, FM1, and FM2 are used to change the data format by which TAS5704 operates. FMT0 and FMT1
jumpers associated with DIR9001 in SPDIF interface enables the user to change the data format of
DIR9001 so that the data format is in sync with TAS5704 data format. Both TAS5704 and DIR9001 are
set by default to operate at 24-bit I2S format. It is important to assert RESET after each format change in
order for the device to recognize the format change. The truth tables below indicate the jumper
configuration and the data format of TAS5704 and DIR9001 (SPDIF).
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Table 3. TAS5704 Gain Configuration
Jumper GAIN1 Jumper GAIN0 GAIN (dB)
Shunt IN = 0 Shunt OUT = 1
0 0 –3
0 1 3
1 0 9
1 1 12
3.6 CONFIG Jumpers
Table 4. TAS5704 Data Format
(1)
FM2
0 0 0 16BIT RJ
0 0 1 18BIT RJ
0 1 0 20BIT RJ
0 1 1 24BIT RJ
1 0 0 16 - 24BIT I2S (Default)
1 0 1 16 – 24bit RJ
1 1 0 RESERVED
1 1 1 TEST MODE
(1)
SHUNT IN = 0, SHUNT OUT = 1 (see schematics for details)
(1)
FM1
(1)
FM0
DATA FORMAT
Table 5. DIR9001 SPDIF Output Data Format
(1)
FMT1
0 0 16BIT
0 1 24BIT RJ
1 0 24BIT LJ
1 1 24BIT I2S (Default)
(1)
SHUNT IN = 0, SHUNT OUT = 1 (See schematic for details)
(1)
FMT0
DATA FORMAT
CFG1 and CFG2 jumpers are used to select the output configuration between single-ended outputs and
bridge-tied outputs or a combination of the two options. See Table 6 for summary of possible settings.
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Jumpers and Control Utilities
Table 6. TAS5704 Output Configuration
Jumper CFG2 Jumper CFG1
Shunt IN = 0 Shunt IN = 0
0 0
0 1
1 0
1 1
GAIN (dB)
2-Channel BTL Mode (AD Modulation). Connect speakers across OUTA/OUTB and
OUTC/OUTD.
2-Channel BTL Mode (BD Modulation). Connect speakers across OUTA/OUTB and
OUTC/OUTD.
2-Channel SE Mode AND 1-Channel BTL Mode (AD Modulation). Connect Left/Right
speakers across OUTA/Center terminal (+ side of speaker connected to OUTA) and
OUTB/Center terminal (+ side of speaker connected to Center terminal). Connect Subwoofer
across OUTC/D. Remove jumpers JP3 – JP6.
4-Channel SE Mode (AD Modulation). Connect Speakers across OUTA/Center,
OUTB/Center and OUTC/Center, OUTD/Center. OUTB and OUTD are inverted
internally … .connect “+” side of speaker to center terminal (GND) so that OUTB and OUTD
will be in phase with OUTA and OUTC. Remove jumpers JP3 – JP6 and JP7 – JP10.
3.7 Switches
RESET is an active low function. Pressing master reset switch (S2) resets TAS5704 and DIR9001.
Releasing the switch will take the devices out of reset.
POWER DOWN function is an active low function. Pressing the power-down switch (S3) powers down
TAS5704 (outputs remain switching at 50% duty cycle). Releasing the switch will take the device out of
power down.
MUTE is an active low function. Pressing the mute switch (S4) mutes TAS5704. Releasing the switch will
take the device out of mute.
SLOU224 – April 2008 TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control 13
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Board Layout, Bill of Material, and Schematics
4 Board Layout, Bill of Material, and Schematics
4.1 TAS5704EVM Board Layout, Top Composite View
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Figure 5. Top Layer Composite
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4.2 TAS5704EVM Board Layout, Top Layer View
Board Layout, Bill of Material, and Schematics
Figure 6. Top Layer
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Board Layout, Bill of Material, and Schematics
4.3 TAS5704EVM Board Layout, Bottom Layer View
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Figure 7. Bottom Layer
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Board Layout, Bill of Material, and Schematics
4.4 Bill of Materials
Table 7. Bill of Materials for TAS5704EVM
Description RefDes QTY MFR MFR:Part No. Vendor Vendor Part No. ALT Part No.
TI-SEMICONDUCTORS
Modulator/HBRIDGE U1 1 Texas Instruments TAS5704PAP Texas TAS5704PAP No ALT Part No.
TQFP64-PAP Instruments
Single Inverter Gate, SOT23-DBV5 INV1, INV2 2 Texas Instruments SN74AHC1GU04DBVR Digi-Key 296-1095-2 296-1095-1
Single 2 to 1 MUX W/Common Strobe, MUX 1 Texas Instruments SN74LVC2G157DCTR Digi-Key 296-13266-2 296-13266-1
TSSOP8-DCT
Processor Supervisor Circuit, 3.3V U3 1 Texas Instruments TPS3825-33DBVT Digi-Key 296-2636-2 296-2636-1
Voltage Regulator, LDO Fast Trans. VR1 1 Texas Instruments TPS76733QD Digi-Key 296-2738-5 No ALT Part No.
3.3Vdc 1.0A, SOP8-D
S-Ended ANA-IN 24BIT 96kHz Stereo ADC 1 Texas Instruments PCM1808PW Digi-Key 296-19773 No ALT Part No.
ADC, TSSOP14-PW
Digital Audio interface receiver U2 1 TI - Burr Brown DIR9001PW Digi-Key 296-21389-5 No ALT Part No.
TSSOP28-PW
SEMICONDUCTORS
Optical receiver, 3.3V, PCB-RA ROHS OPTO 1 Toshiba TORX147LFT Digi-Key TORX147LFT TORX141
Crystal, 12.288MHz, HC49US Y1 1 ECS ECS-122.8-S-4 Digi-Key X174 No ALT Part No.
Transistor NPN 50V PreBiased/4.7K Q3 1 Diodes Inc. DDTC143TCA-7 Digi-Key DDTC143TCADITR DDTC143TCADICT
100mA SOT23-DBV3
Transistor PNP 50V PreBiased/4.7K Q1, Q2, Q4–Q6 5 Diodes Inc. DDTA143TCA-7 Digi-Key DDTA143TCADITR DDTA143TCADICT
100mA SOT23-DBV3
LED, Green 2.0V SMD0805 LED1, LED2, 5 Lumex Optical SML-LXT0805GW-TR Digi-Key 67-1553-2 67-1553-1
LED, Red 2.0V SMD0805 LED9 1 Lumex Optical SML-LXT0805IW-TR Digi-Key 67-1552-2 67-1552-1
LED, Yellow 2.0V SMD0805 LED6, LED8, 3 Lumex Optical SML-LXT0805YW-TR Digi-Key 67-1554-2 67-1554-1
LED, Blue SM1206 LED3 1 Avago HSMR-C150 Digi-Key 516-1436-2 516-1436-1
CAP 33pF 50V CERM 0603 NPO C64, C65 2 Panasonic ECJ-1VC1H330J Digi-Key PCC330ACVTR PCC330ACVCT
CAP 4700pF 50V CERM 0603 X7R C42, C43, C61 3 Panasonic ECJ-1VB1H472K Digi-Key PCC1780TR PCC1780CT
CAP 0.01 µ F 16V CERM 0603 X7R C78, C91 2 Murata Electronics GRM188R71C103KA01D Digi-Key 490-1525-2 490-1525-1
CAP 0.01 µ F 50V CERM 0603 X7R C7 1 Panasonic ECU-V1H103KBV Digi-Key PCC103BVTR PCC103BVCT
CAP 0.047 µ F 16V CERM 0603 X7R C10, C41, C88, 4 Panasonic ECJ-1VB1C473K Digi-Key PCC1758TR PCC1758CT
CAP 0.068 µ F 16V CERM 0603 X7R C63 1 Panasonic ECJ-1VB1C683K Digi-Key PCC1760TR PCC1760CT
CAP 0.1 µ F 16V CERM 0603 X7R C5, C8, C11, 17 Panasonic ECJ-1VB1C104K DIGI-KEY PCC1762TR PCC1762CT
CAP 0.1 µ F 50V CERM 0603 X7R C9, C47 2 Murata GRM188R71H104KA93D Digi-Key 490-1519-2 490-1519-1
CAP 0.22 µ F 25V CERM 0603 X7R C1, C16, C23, 4 Murata Electronics GRM188R71E224KA88D Digi-Key 490-3290-2 490-3290-1
CAP 1.0 µ F 25V CERM 0603 X5R C2, C18, C24 3 Panasonic ECJ-1VB1E105K Digi-Key PCC2422TR PCC2422CT
CAP 4.7 µ F 6.3V CERM 0603 X5R C13 1 TDK Corp. C1608X5R0J475M Digi-Key 445-1417-2 445-1417-1
CAP 0.1 µ F50V CERM 0805 X7R C15, C29, C35, 4 Panasonic ECJ-2YB1H104K Digi-Key PCC1840TR PCC1840CT
CAP 1.0 µ F 50V CERM 0805 Y5V 0 Taiyo Yuden UMK212F105ZG-T Digi-Key 587-1308-2 587-1308-1
CAP 1.0 µ F 50V METAL Polyester film C48–C50, C79 4 EPCOS B32529C5105J Digi-Key 495-1087 B32529C105J
MKT
CAP 1 µ F 50V RAD ALUM ELEC FC C86, C87 2 Panasonic EEU-FC1H1R0 Digi-Key P10312 No ALT Part No.
CAP 10 µ F 16V RAD ALUM ELEC KGA C46, C53, C54, 11 Panasonic ECE-A1CKG100 Digi-Key P910 No ALT Part No.
CAP 15 µ F 50V RAD ALUM ELEC FC C37 1 Panasonic EEU-FC1H150 Digi-Key P10317 No ALT Part No.
CAP 22 µ F 10V RAD ALUM ELEC KGA C6, C60 2 Panasonic ECE-A1AKG220 Digi-Key P905 No ALT Part No.
CAP 47 µ F 16V RAD ALUM ELEC FC C4 1 Panasonic EEU-FC1C470 Digi-Key P11196 No ALT Part No.
CAP 220 µ F 50V RAD ALUM ELEC FC C3, C28, C36, 4 Panasonic EEU-FC1H221 Digi-Key P10325 No ALT Part No.
CAP 470 µ F 50V RAD ALUM ELEC FC C58, C59 2 Panasonic EEU-FC1H471L Digi-Key P11260 No ALT Part No.
LED4, LED5,
LED7
LED10
C89
C25, C55,
C66–C68, C70,
C71, C73,
C80–C83, C90,
C93
C26
C44
C57, C69, C72,
C74, C76, C84,
C85, C92
C38
Technologies
CAPACITORS
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Board Layout, Bill of Material, and Schematics
Table 7. Bill of Materials for TAS5704EVM (continued)
Description RefDes QTY MFR MFR:Part No. Vendor Vendor Part No. ALT Part No.
CAP 1000 µ F 35V RAD ALUM ELEC FC C51, C52, C62, 4 Panasonic EEU-FC1V102 Digi-Key P10305 No ALT Part No.
RES 0.0 Ω 1/16W 5% SMD 0603 R29, R32, R35 3 Panasonic ERJ-3GEY0R00V Digi-Key P0.0GTR P0.0GCT
RES 3.3 Ω 1/16W 5% SMD 0603 R11, R13–R15 4 Yageo 9C06031A3R30JLHFT Digi-Key 311-3.3GTR 311-3.3GCT
RES 47 Ω 1/16W 5% SMD 0603 R8, R16, R30, 8 Yageo 9C06031A47R0JLHFT Digi-Key 311-47GTR 311-47GCT
RES 75.0 Ω 1/16W 1% SMD 0603 R49 1 Panasonic ERJ-3EKF75R0V Digi-Key P75.0HTR P75.0HCT
RES 100 Ω 1/16W 5% SMD 0603 R58, R59, R64, 4 Yageo 9C06031A1000JLHFT Digi-Key 311-100GTR 311-100GCT
RES 470 Ω 1/10W 5% SMD 0603 R7, R9, R40 3 Panasonic ERJ-3GEYJ471V Digi-Key P470GTR P470GCT
RES 332 Ω 1/16W 1% SMD 0603 R4, R5, R26, 5 Panasonic ERJ-3EKF3320V Digi-Key P332HTR P332HCT
RES 392 Ω 1/10W 1% SMD 0603 R3, R45, R70 3 Panasonic ERJ-3EKF3920V Digi-Key P392HTR P392HCT
RES 510 Ω 1/10W 5% SMD 0603 R28 1 Yageo 9C06031A5100JLHFT Digi-Key 311-510GTR 311-510GCT
RES 680 Ω 1/10W 5% SMD 0603 R42 1 Yageo 9C06031A6800JLHFT Digi-Key 311-680GTR 311-680GCT
RES 1k Ω 1/16W 5% SMD 0603 R54 1 Yageo 9C06031A1001JLHFT Digi-Key 311-1.0KGTR 311-1.0KGCT
RES 2.00k Ω 1/16W 1% SMD 0603 R67 1 Panasonic ERJ-3EKF2001V Digi-Key P2.00KHTR P2.00KHCT
RES 2.49k Ω 1/16W 1% SMD 0603 R62 1 Panasonic ERJ-3EKF2491V Digi-Key P2.49KHTR P2.49KHCT
RES 4.99k Ω 1/16W 1% SMD 0603 R31, R39, R41, 5 Panasonic ERJ-3EKF4991V Digi-Key P4.99KHTR P4.99KHCT
RES 7.50k Ω 1/16W 1% SMD 0603 R68 1 Panasonic ERJ-3EKF7501V Digi-Key P7.50KHTR P7.50KHCT
RES 10k Ω 1/16W 5% SMD 0603 R18–R25, R27, 15 Panasonic 9C06031A1002JLHFT Digi-Key 311-10KGTR 311-10KGCT
RES 18.2k Ω 1/10W 1% SMD 0603 R17 1 Yageo 9C06031A1822FKHFT Digi-Key 311-18.2KHTR 311-18.2KHCT
RES 249k Ω 1/16W 1% SMD 0603 R61 1 Panasonic ERJ-3EKF2493V Digi-Key P249KHTR P249KHCT
RES 1.00M Ω 1/16W 1% SMD 0603 R66 1 Panasonic ERJ-3EKF1004V Digi-Key P1.00MHTR P1.00MHCT
RES 0.0 Ω 1/10W 5% SMD 0805 R10, R60 2 Panasonic ERJ-GEY0R00V Digi-Key P0.0ATR P0.0ACT
RES 3.3 Ω 1/10W 5% SMD 0805 R34 1 Panasonic ERJ-6RQJ3R3V Digi-Key P3.3BTR P3.3BCT
RES 100k Ω 1/10W 1% SMD 0805 0 Panasonic ERJ-6ENF1003V Digi-Key P100KCTR P100KCCT
RES 0.0 Ω 1/8W 5% SMD 1206 R37 1 Panasonic ERJ-8GEY0R00V Digi-Key P0.0ETR P0.0ECT
RES 3.3 Ω 1/4W 5% SMD 1206 R6 1 Panasonic ERJ-8RQJ3R3V Digi-Key P3.3PTR P3.3PCT
RES 4.7 Ω 1/8W 5% SMD 1206 R33 1 Panasonic ERJ-8RQJ4R7V Digi-Key P4.7PTR P4.7PCT
Inductor, series 11RHBP, 15UH L1–L4 4 Toko America A7503AY-150M Toko A7503AY-150M No ALT Part No.
Header, 2 Pin Male, Straight, Gold JP1–JP10, Sullins PZC02SAAN Digi-Key S1011-02 No ALT Part No.
Header, 3 Pin Male, Straight, Gold JP11–JP16 6 Sullins PZC03SAAN Digi-Key S1011-03 No ALT Part No.
Socket header, 2x8 Pin Female Gold J1 1 Samtec SSW-108-02-G-D-RA Samtec SSW-108-02-G-D-RA No ALT Part No.
PCB-RA
JACK, RCA, PCB-RA, ECONO All-metal RCA 1 CUI Stack RCJ-017 Digi-Key CP-1466 No ALT Part No.
Jack, RCA, PCB-Vertical, Black LIN, RIN 2 CUI Stack RCJ-051 Digi-Key CP-1424 No ALT Part No.
Shunt, Black AU Flash 0.100 JP2, 11 Sullins SPC02SYAN Digi-Key S9001 No ALT Part No.
PC Testpoint, Orange BKNDERR, Keystone 5003 Digi-Key 5003K No ALT Part No.
C75
RESISTORS
R43, R44, R47,
R48, R57
R65
R55, R56
R46, R63, R1,
R2, R12, R38
R36, R50–R53,
R69
FERRITES AND INDUCTORS
America
HEADERS AND JACKS
CFG1
CFG2, FM0, 19 Sullins PZC02SAAN Digi-Key S1011-02 No ALT Part No.
FM1, FMT0,
FMT1, FM2,
GAIN0, GAIN1
SHUNTS
JP11(1-2),
JP12(1-2),
JP13(1-2),
JP14(1-2)
JP15(2-3),
JP16(2-3),
GAIN0, GAIN1,
FM0, FM1
TESTPOINTS AND SWITCHES
LRCLK, MCLK, Electronics
MUTE, PDN,
RESET, SCLK
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18 TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control SLOU224 – April 2008
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Board Layout, Bill of Material, and Schematics
Table 7. Bill of Materials for TAS5704EVM (continued)
Description RefDes QTY MFR MFR:Part No. Vendor Vendor Part No. ALT Part No.
SHUTDOWN, 11 Keystone 5003 Digi-Key 5003K No ALT Part No.
SUBM, SUBP, Electronics
VALID
Switch, Momentary SMT-Short, Black S2–S4 3 Panasonic EVQ-PPBA25 Digi-Key P8086STR P8086SCT
Tab, 160g
Switch, SPST, VERT-PCB ROHS S1 1 NKK Switches G12AP-RO Digi-Key 360-1758 360-1701
NON-INSULATED WIRE GROUND LOOPS
Non-insulated bus wire, 10MM Length, PGND, PGND 2 Belden CDT 8019000100 Mouser 566-8019 No ALT Part No.
18 AWG
Bend the wire lengths into a 'U' shape and solder to the board. Leave a gap of around 0.3 inch between the board and the wire.
BINDING POSTS
Binding post, 15A, uninsulated OUTA, OUTB, 6 Johnson 111-2223-001 Digi-Key J587 No ALT Part No.
Binding post, Red, 15A ECONO PVCC, VIN 2 Keystone 7006 Digi-Key 7006K No ALT Part No.
Binding post, Black, 15A ECONO PGND, 2 Keystone 7007 Digi-Key 7007K No ALT Part No.
Standoff 4-40 Threaded M/F 0.75 in. HW1–HW6 6 Keystone 8403K Digi-Key 8403K No ALT Part No.
ALUM-HEX Electronics
Hex Nut, 4-40, Zinc/Steel HW1–HW6 6 Building Fasteners HNZ440 Digi-Key H216 No ALT Part No.
Component Count: 262
C77, C14, C32, C39, C40, C30, C45, C56, C31, C33, C12, C19, C27, C34, C17, C20, C21, C22, R11, R13, R14, R15
OUTC, OUTD, Components
GND, GND
GND(PGND) Electronics
Electronics
STANDOFFS AND HARDWARE
COMPONENTS NOT ASSEMBLED
4.5 Schematic
The schematics are appended to this document.
SLOU224 – April 2008 TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control 19
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SPDIF RECEIVER
ENGINEERING EVALUATION ONLY
SPDIF
LOCK
U2
RCA INPUT
OPTO INPUT
SPDIF
INPUT
SELECT
1-2:
OPTO INPUT
2-3:
COAX INPUT
JP1 IN: SCKO = 512 Fs
JP1 OUT: SCKO = 256 Fs
(DEFAULT)
DIR9001PW
SPDIF FORMAT
DATA FORMAT FMT0
16Bit/MSB/RJ
24Bit/MSB/RJ
24Bit/MSB/LJ
24Bit/MSB/I2S
SHUNTS IN = 0
SHUNTS OUT = 1
FMT1
L
L
H
H
L
H
L
H
JUMPER NOTES
1-2: SPDIF CLOCKS/DATA
2-3: CLOCKS/DATA = PSIA
(MCLK)
(SDATA)
(SCLK)
(LRCLK)
JUMPER NOTES
1-2: SPDIF CLOCKS/DATA (DEFAULT)
2-3: CLOCKS/DATA = PSIA
TO
TAS5704
TO
ADC
FROM MASTER RESET
OPTO
INPUT
COAX
INPUT
DECOUPLING
DECOUPLING
TI
TI
CX
CX
PROJECT:
PROJECT:
Design Team:
Design Team:
Schematic Rev:
Schematic Rev:
Save Date:
Save Date:
Filename:
Filename:
JULY 10, 2007
TAS5704EVM.SCH
TAS5704 EVALUTION MODULE
RYAN KEHR
Mod: PCB Rev: Sheet
Mod: PCB Rev: Sheet
NC
NC 1
Print Date
Print Date
Tue Jul 10, 2007
of
of
6NC
Drawn By:
Drawn By:
LDN
ANALOG TO DIGITAL CONVERTER
ANALOG INPUTS
ENGINEERING EVALUATION ONLY
FROM
SPDIF
3.3V DECOUPLING
ADC
PCM1808PW
5V DECOUPLING
SDIN CONFIGURATOR
JP16 NOTE
1-2: SDIN2 = ADC (DEFAULT)
2-3: SDIN2 = SPDIF/PSIA
JP15 NOTE
1-2: SDIN1 = SDIN2
2-3: SDIN1 = SPDIF/PSIA (DEFAULT)
TO
TAS5704
TI
TI
CX
CX
PROJECT:
PROJECT:
Design Team:
Design Team:
Schematic Rev:
Schematic Rev:
Save Date:
Save Date:
Filename:
Filename:
JULY 10, 2007 Tue Jul 10, 2007
TAS5704EVM.SCH
TAS5704 EVALUTION MODULE
RYAN KEHR
Mod: PCB Rev: Sheet
Mod: PCB Rev: Sheet
NC NC 2
NC 6
Print Date
Print Date
of
of
Drawn By:
Drawn By:
LDN
TAS5704 I/O
ENGINEERING EVALUATION ONLY
MUTE
FROM
SPDIF
FROM
ADC
MASTER RESET
POWER
DOWN
MUTE
TO SPDIF
U1
TAS5704PAP
PGND
PGND
PGND
3.3V DECOUPLING
BLT=SHUNTS IN
SE=SHUNTS OUT
BLT=SHUNTS IN
SE=SHUNTS OUT
SE
SE
BTL
GAIN CONTROL
GAIN1
GAIN0 CHANNEL GAIN (dB)
0
0
1
0
0
1
1
1
20
DEFAULT
26
32
36
FORMAT CONTROL
FM2
0
0
0
0
1
1
1
1
FM0
FM1 SERIAL DATA FORMAT
0
0
1
1
0
0
1
1
16Bit RJ
0
18Bit RJ
1
20Bit RJ
0
24Bit RJ
1
16-24Bit I2S(DEFAULT)
0
16-24Bit LJ
1
RESERVED
0
TEST MODE
1
FROM
SPDIF
FROM SUBWOOFER DAUGHTERCARD
CONFIG CONTROL
CFG2 CFG1
0
0
1
1
OUTPUT MODE
2CH/BTL/AD
0
2CH/BTL/BD
1
2.1CH/2xSE/1xBTL
0
4CH/4xSE(DEFAULT)
1
PGND
PGND
VALID
SHUTDOWN
PGND
PGND
TI
TI
CX
CX
PROJECT:
PROJECT:
Design Team:
Design Team:
Schematic Rev:
Schematic Rev:
Save Date:
Save Date:
Filename:
Filename:
JULY 10, 2007
TAS5704EVM.SCH
BLT=SHUNTS IN
SE=SHUNTS OUT
BLT=SHUNTS IN
SE=SHUNTS OUT
DEFAULT JUMPERED TO 4xSE MODE
TO SUBWOOFER CONNECTOR
TAS5704 EVALUTION MODULE
RYAN KEHR
Mod: PCB Rev: Sheet
Mod: PCB Rev: Sheet
NC
NC 3
NC 6
Print Date
Print Date
Tue Jul 10, 2007
SE
SE
of
of
Drawn By:
Drawn By:
BTL
LDN
POWER SUPPLIES
ENGINEERING EVALUATION ONLY
TO SUBWOOFER DAUGHTERCARD
HIGH VOLTAGE
POWER INPUTS
PVCC = 10-26V
LOW VOLTAGE
POWER INPUTS
EMI
SNUBBERS
TO TAS5704
TO ADC
TO SUBWOOFER DAUGHTERCARD
TO TAS5704
TO SPDIF
3.3V@1A TO ADC
FROM
P.S.
TO/FROM
TAS5704
TO
SUBWOOFER
DAUGHTERCARD
(TAS5601EVM2)
PGND
BOM ONLYSUBWOOFER CONNECTOR
CX
CX
PROJECT:
TI
TI
PROJECT:
Design Team:
Design Team:
Schematic Rev:
Schematic Rev:
Save Date:
Save Date:
Filename:
Filename:
TAS5704 EVALUTION MODULE
RYAN KEHR
JULY 10, 2007
TAS5704EVM.SCH
Mod: PCB Rev: Sheet
Mod: PCB Rev: Sheet
NC
NC 4
NC 6
Print Date
Print Date
Tue Jul 10, 2007
of
of
Drawn By:
Drawn By:
LDN
REVISION CHANGES
ENGINEERING EVALUATION ONLY
DESCRIPTIONREVISION
NC 10JUL2007
PRE-RELEASE RK
DATE
APPROVAL
TI
TI
CX
CX
PROJECT:
PROJECT:
Design Team:
Design Team:
Schematic Rev:
Schematic Rev:
Save Date:
Save Date:
Filename:
Filename:
JULY 10, 2007
TAS5704EVM.SCH
TAS5704 EVALUTION MODULE
RYAN KEHR
Mod: PCB Rev: Sheet
Mod: PCB Rev: Sheet
NC
NC 5
NC 6
Print Date
Print Date
Tue Jul 10, 2007
of
of
Drawn By:
Drawn By:
LDN
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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
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products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Clocks and Timers www.ti.com/clocks Digital Control www.ti.com/digitalcontrol
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
RF/IF and ZigBee® Solutions www.ti.com/lprf Video & Imaging www.ti.com/video
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