This user's guide contains information for the TPS561201 as well as support documentation for the
TPS561201EVM-896 evaluation module. Included are the performance specifications, schematic, and the
bill of materials of the TPS561201EVM-896.
4Connection and Test Points................................................................................................ 4
5Bill of Materials ............................................................................................................. 12
Trademarks
SWIFT, D-CAP2 are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
1Introduction
The TPS561201 is a single, adaptive on-time, D-CAP2™ mode, synchronous buck converter requiring a
very low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors
such as POSCAP, SP-CAP, or ceramic types and features fast transient response with no external
compensation. The switching frequency is internally set at a nominal 580 kHz and enters plus skip mode
in light load conditions. The high-side and low-side switching MOSFETs are incorporated inside the
TPS561201 package along with the gate-drive circuitry. The low drain-to-source on resistance of the
MOSFETs allows the TPS561201 to achieve high efficiencies and helps keep the junction temperature low
at high output currents. The TPS561201 dc/dc synchronous converter is designed to provide up to a 1-A
output from an input voltage source of 4.5 V to 17 V. The output voltage range is from 0.768 V to 7 V.
Rated input voltage and output current ranges for the evaluation module are given in Table 1.
The TPS561201EVM-896 evaluation module (EVM) is a single, synchronous buck converter providing
1.05 V at 1 A from 4.5-V to 17-V input. This user’s guide describes the TPS561201EVM-896 performance.
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List of Tables
Table 1. Input Voltage and Output Current Summary
EVMInput Voltage (VIN) RangeOutput Current (I
TPS561201EVM-8964.5 V to 17 V0 A to 1 A
2Performance Specification Summary
A summary of the TPS561201EVM-896 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN= 12 V and an output voltage of 1.05 V, unless otherwise noted. The
ambient temperature is 25°C for all measurement, unless otherwise noted.
These evaluation modules are designed to provide access to the features of the TPS561201. Some
modifications can be made to this module.
3.1Output Voltage Setpoint
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing
the value of R1 can change the output voltage above 0.768 V. The value of R1 for a specific output
voltage can be calculated using Equation 1.
Table 3 lists the R5 values for some common output voltages. Note that the values given in Table 3 are
standard values and not the exact value calculated using Table 3.
This section describes how to properly connect, set up, and use the TPS561201EVM-896. The section
also includes test results typical for the evaluation modules and efficiency, output load regulation, output
line regulation, load transient response, output voltage ripple, input voltage ripple, start-up, and switching
frequency.
4.1Input/Output Connections
The TPS561201EVM-896 is provided with I/O connectors and test points as shown in Table 4. A power
supply capable of supplying 1 A must be connected to J1 through a pair of 20-AWG wires. The load must
be connected to J2 through a pair of 20-AWG wires. The maximum load current capability is 1 A. Wire
lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the
VINinput voltages with TP2 providing a convenient ground reference. TP7 is used to monitor the output
voltage with TP8 as the ground reference.
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Table 4. Connection and Test Points
Reference
Designator
J1VIN(see Table 1 for VINrange)
J2V
JP1EN control. Shunt EN to GND to disable, shunt EN to VINto enable.
TP1VINpositive monitor point
TP2GND monitor test point
TP3EN test point
TP4Switch node test point
TP5Test point for loop response measurements
TP6V
TP7GND monitor test point
TP8GND monitor test point
4.2Start-Up Procedure
1. Ensure that the jumper at JP1 (Enable control) pins 1 and 2 are covered to shunt EN to GND, disabling
the output.
2. Apply appropriate VINvoltage to VIN (J1-2) and GND (J1-1).
3. Move the jumper at JP1 (Enable control) from pins 1 and 2 (EN and GND), to pins 2 and 3 (EN and
VIN) enabling the output.