Texas Instruments Stellaris LM3S9B96 User Manual
Stellaris® LM3S9B96 Development Kit
User’s Manual
DK-LM3S9B96-05 Copyright © 2009–2010 Texas Instruments
Copyright
Copyright © 2009–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments.
ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property
of others.
Texas Instruments
108 Wild Basin, Suite 350
Austin, TX 78746
http://www.ti.com/stellaris
2 September 5, 2010
Stellaris® LM3S9B96 Development Kit User’s Manual
Table of Contents
Chapter 1: Stellaris® LM3S9B96 Development Board Overview .................................................................7
Features..............................................................................................................................................................7
Development Kit Contents................................................................................................................................10
Block Diagram .................................................................................................................................................. 11
Development Board Specifications...................................................................................................................11
Chapter 2: Stellaris® LM3S9B96 Development Board Hardware Description..........................................13
LM3S9B96 Microcontroller Overview ..................................... ... .... ................................................ ...................13
Jumpers and GPIO Assignments.................................................................................................................. 13
Clocking........................................................................................................................................................14
Reset.............................................................................................................................................................15
Power Supplies.............................................................................................................................................15
USB...............................................................................................................................................................15
Debugging.....................................................................................................................................................16
Color QVGA LCD Touch Panel.....................................................................................................................17
2
I
S Audio ... ... ................................................. ... ... ... ... .... ................................................ ................................19
User Switch and LED.......................................... ... ... .... ... ... ..........................................................................19
Chapter 3: Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI) ..................... 21
SDRAM Expansion Board ......................................................... .... ... ................................................................21
Flash and SRAM Memory Expansion Board ....................................................................................................21
FPGA Expansion Board................ ... .... ... ... ... .... ... ................................................... .... ... ...................................21
EM2 Expansion Board......................................................................................................................................21
Chapter 4: Using the In-Circuit Debugger Interface....................................................................................23
Appendix A: Stellaris® LM3S9B96 Development Board Schematics........................................................ 25
Appendix B: Stellaris® LM3S9B96 Development Board Component Locations......................................33
Appendix C: Stellaris® LM3S9B96 Development Board Connection Details ...........................................35
DC Power Jack....................................................................... ... .... ... ... ... .... ... ................................................... 35
ARM Target Pinout ........................................................................................................................................... 35
Appendix D: Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments ................37
Appendix E: Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board ..................................... 41
Features............................................................................................................................................................41
Installation......................................................................................................................................................... 41
Hardware Description ....................................................................................................................................... 43
Functional Description ..................... ... ... ... .... ................................................... ... .... ......................................43
Memory Map.............................. ... ... .... ... ... ... .... ... ................................................ ... .... ... ...................................45
Component Locations.......................................................................................................................................46
Schematics.......................................................................................................................................................46
Appendix F: Stellaris® LM3S9B96 FPGA Expansion Board.......................... ... .... ... ... ... ....... ... ... ... .... ... ... ... 49
Features............................................................................................................................................................49
Installation......................................................................................................................................................... 50
Hardware Description ....................................................................................................................................... 52
FPGA............................................................................................................................................................ 52
Camera.........................................................................................................................................................52
September 5, 2010 3
SRAM............................................................................................................................................................52
Configuration PROM........................................ ... ..........................................................................................52
Configuration Pushbutton ............................................................................................................................. 52
Test Port .......................................................................................................................................................53
Camera Connector........................................................................................................................................53
5 V Power Pin...............................................................................................................................................53
24-MHz Oscillator .........................................................................................................................................53
External Peripheral Interface (EPI) Module ..................................................................................................53
Using the Widget Interface ...............................................................................................................................53
Writing Your Own Stellaris Application .........................................................................................................53
Memory Map.............................. ... ... .... ... ... ... .... ... ................................................ ... .... ... ...................................54
Register Descriptions.................................................................................................................................... 55
Loading a New Image to the FPGA..................................................................... ... .... ... ... ... .... ... ... ...................61
Installing the Software...................................................................................................................................62
Modifying the Default Image.........................................................................................................................62
Default FPGA Image Blocks.........................................................................................................................62
EPI Signal Descriptions .......................................... ... ... .... ... .............................................................................63
Component Locations.......................................................................................................................................64
Schematics.......................................................................................................................................................65
Appendix G: Stellaris® LM3S9B96 EM2 Expansion Board.........................................................................69
Features............................................................................................................................................................69
Installation......................................................................................................................................................... 69
Installation of EM Modules onto the EM2 Expansion Board.............................................................................72
Hardware Description ....................................................................................................................................... 74
Primary EM Header ......................................................................................................................................74
Secondary EM Header..................................................................................................................................75
CAT24C01 EEPROM....................................................................................................................................75
2
I
S Header....................................................... ... ... ... ................................................. ... ................................75
Analog Audio Header... ... .... ... ... .................................................... ... ... .... ... ... ................................................ 75
SDIO Header ................................................................................................................................................75
EPI Signal Descriptions .......................................... ... ... .... ... .............................................................................75
Component Locations.......................................................................................................................................77
Schematics.......................................................................................................................................................77
Appendix H: References ................................................................................................................................79
4 September 5, 2010
Stellaris® LM3S9B96 Development Kit User’s Manual
List of Figures
Figure 1-1. DK-LM3S9B96 Development Board.............................................................. ... .... ... ... ... ..................9
Figure 1-2. DK-LM3S9B96 Development Board Block Diagram .....................................................................11
Figure 2-1. Factory Default Jumper Settings... ... ... ..........................................................................................14
Figure 4-1. ICD Interface Out Mode ................................................................................................................23
Figure B-1. Component Placement Plot for Top........................................ ... ................................................... 34
Figure E-1. Flash and SRAM Memory Expansion Board.................................................................................41
Figure E-2. Removing EPI Board from DK-LM3S9B96 Development Board...................................................42
Figure E-3. Flash/SRAM/LCD IF Expansion Board Block Diagram.................................................................43
Figure E-4. Component Placement Plot for Top and Bottom...........................................................................46
Figure F-1. FPGA Expansion Board ...................... ... ... .... ... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .... ... ... ... ................49
Figure F-2. Removing EPI Board from DK-LM3S9B96 Development Board................................................... 51
Figure F-3. FPGA Expansion Board Block Diagram........ ... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... 52
Figure F-4. FPGA Boundary Scan................................................ ... ... ... .... ... ... ... ... .... ... ... ................................61
Figure F-5. Component Placement Plot for Top..............................................................................................64
Figure F-6. Component Placement Plot for Bottom.........................................................................................65
Figure G -1. EM2 Expansion Board...................... ... ... ... .... ... ... ... .... ... ... ... .... ... ... ... ... ..........................................69
Figure G-2. Removing EPI Board from DK-LM3S9B96 Development Board...................................................70
Figure G -3. EM2 Expansion Board...................... ... ... ... .... ... ... ... .... ... ... ... .... ... ... ... ... ..........................................71
Figure G-4. Assembled DK-LM3S9B96 Development Board with EM2 Expansion Board...............................71
Figure G-5. Connecting an EM Module to the EM2 Expansion Board ............................................................. 72
Figure G-6. Fully Assembled DK-LM3S9B96 Board with EM2 Expansion Board an d Wireless EM Module ...73
Figure G -7. EM2 Expansion Board Block Diagram................................................ .... ... ... ... .... ... ... ... ... .... .........74
Figure G-8. Component Placement Plot for Top and Bottom...........................................................................77
September 5, 2010 5
List of Tables
Table 2-1. Board Features and Peripherals that are Disconnected in Factory Default Configuration............13
Table 2-2. USB-Related Signals.....................................................................................................................15
Table 2-3. Hardware Debugging Configurations ............................................................................................ 16
Table 2-4. Debug-Related Signals .................................................................................................................17
Table 2-5. LCD-Related Signals..................................................................................................................... 18
Table 2-6. I
Table 2-7. Navigation Switch-Related Signals ...............................................................................................19
Table C-1. Debug Interface Pin Assignments.................................................................................................35
Table D-1. Microcontroller GPIO Assignments ...............................................................................................37
Table E-1. Flash and SRAM Memory Expansion Board Memory Map..................................... ... ... ... .... ... ... ... 45
Table E-2. LCD Latch Register....................................................................................................................... 45
Table F-1. FPGA Expansion Board Memory Map..........................................................................................54
Table F-2. Version Register............................................................................................................................ 55
Table F -3. System Control Register ........................... .... ... ... .................................................... ... ...................56
Table F-4. Interrupt Enable Register ..............................................................................................................57
Table F-5. Interrupt Status Register ...............................................................................................................57
Table F-6. Test Pad Register..........................................................................................................................58
Table F-7. LCD Control Register .................................................................................................................... 59
Table F -8. EPI Signal Descriptions ................... ............................................................................................. 63
Table G-1. EPI Signal Descriptions.................... ... ... ... .... ... ... ... .................................................... ...................75
2
S Audio-Related Signals................................... ... .... ... ... ... .................................................... ...... 19
6 September 5, 2010
CHAPTER 1
Stellaris® LM3S9B96 Development Board Overview
The Stellari s® LM3S9B96 Develop ment Board prov ides a plat form for developing systems around
the advanced capabilities of the LM3S9B96 ARM® Cortex™-M3-based microcontroller.
The LM3S9B96 is a member of the Stellaris Tempest-class microcontroller family. Tempest-class
devices include capabilities such as 80 MHz clock speeds, an External Peripheral Interface (EPI)
and Audio I
DK-LM3S9B96 board includes a rich set of peripherals found on other Stellaris boards.
The development board includes an on-board in-circuit debug interface (ICDI) that supports both
JT AG and SWD debugging. A stand ard ARM 20-pin debug header suppor ts an array of debugging
solutions.
The Stellaris® LM3S9B96 Development Kit accelerates development of Tempest-class
microcontrollers. The kit also includes extensive example applications and complete source code.
Features
The Stellaris® LM3S9B96 Development Board includes the following features.
Simple set-up—USB cable provides debugging, communication, and power
Flexible development platform with a wide range of peripherals
2
S interfaces. In addition to new hardware to support these features, the
Color LCD graphics display
– TFT LCD module with 320 x 240 resolution
– Resistive touch interface
80 MHz LM3S9B96 microcontroller with 256 K Flash, 96 K SRAM, and integrated Ethernet
MAC+PHY, USB OTG, and CAN communications
– – 8 MB SDRAM (plug-in EPI option board)
– – EPI break-out board (plug-in option board)
1 MB serial Flash memory
Precision 3.00 V voltage reference
SAFERTOS™ operating system in microcontroller ROM
2
I
S stereo audio codec
– Line In/Out
– Headphone Out
– Microphone In
Controller Area Network (CAN) Interface
10/100 BaseT Ethernet
USB On-The-Go (OTG) Connector
– Device, Host, and OTG modes
September 5, 2010 7
User LED and push button
Thumbwheel potentiometer (can be used for menu navigation)
MicroSD card slot
Supports a range of debugging options
– Integrated In-circuit Debug Interface (ICDI)
– JTAG, SWD, and SWO all supported
– Standard ARM® 20-pin JT AG debug connector
USB Virtual COM Port
Jumper shunts to conveniently reallocate I/O resources
Develop using tools supporting Keil™ RealView® Microcontroller Development Kit
(MDK-ARM), IAR Embedded Workbench, Code Sourcery GCC development to ols, Code Red
Technologies development tools, or Texas Instruments’ Code Composer Studio™ IDE
Supported by StellarisWare® software including the graphics library, the USB library, and the
peripheral driver library
Optional expansion boards that work with the External Peripheral Interface (EPI) of the
DK-LM3S9B96 development board extend the capabilities of this development platform (each
board sold separately)
– Stellaris® Flash and SRAM Memory Expansion Board (DK-LM3S9B96-FS8) (sold
separately)
• Provides Flash memory, SRAM, and an improved performance LCD interface
For more information on the DK-LM3S9B96-FS8 memory expansion board, see
Appendix E, “Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board,” on
page 41.
– Stellaris® FPGA Expansion Board (DK-LM3S9B96-FPGA) (sold separately)
• Provides machine-to-machine (M2M), high-bandwidth, parallel interface capability of
the Stellaris microcontroller
• Allows users to control and display the FPGA expansion board’s video on the
DK-LM3S9B96 development board’s large, 3.5” touchscreen display
For more information on the DK-LM3S9B96-FPGA expansion board, see
Appendix F, “Stellaris® LM3S9B96 FPGA Expansion Board,” on page 49.
– Stellaris® EM2 Expansion Board (DK-LM3S9B96-EM2) (sold separately)
• Provides a transition between the Stellaris External Peripheral Interface (EPI)
connector and the RF Evaluation Module (EM) connecto r
• Enables wireless application development using Low Power RF an d RF ID
evaluation modules on the Stellaris DK-LM3S9B96 platform
For more information on the DK-LM3S9B96-EM2 e xpansion board, see Appendix G,
“Stellaris® LM3S9B96 EM2 Expansion Board,” on page 69.
8 September 5, 2010
Figure 1-1. DK-LM3S9B96 Development Board
Debug I nterface
USB Connector for
Debug and/or Power
Stellaris
LM3S39B96
Microcontroller
CAN Bus Interface
3 .5 " LCD T ouc h Panel
USB connector wi th
Host, De vice an d
On-the-Go modes
10/ 100 Et hernet
User LED
microSD Card Slot
Potentiometer
5 VDC supply input
JTAG/SWD In/
Out C onnector
User Switch
Reset switch
Power and
Ground Test
Points
3 .00V Analog
Reference
Headphone Out put
Audi o Li ne Output
Microphone Input
Audi o Li ne I n put
1MB Serial Fl ash Mem ory
Stellaris® LM3S9B96 Development Kit User’s Manual
September 5, 2010 9
Development Kit Contents
The Stellaris® LM3S9B96 Development Kit contains everything needed to develop and run a
range of applications using Stellaris microcontrollers:
LM3S9B96 development board
8 MB SDRAM expansion board
EPI signal breakout board
Retractable Ethernet cable
USB Mini-B cable for debugger use
USB Micro-B cable for OTG-to-PC connection
USB Micro-A to USB A adapter for USB Host
USB Flash memory stick
microSD Card
20-position ribbon cable
CD containing:
– A supported version of one of the following (including a toolchain-specific Quickstart
guide):
• Keil™ RealView® Microcontroller Development Kit (MDK-ARM)
• IAR Embedded Workbench
• Code Sourcery GCC development tools
• Code Red Te chnologies development tools
• Texas Instruments’ Code Composer Studio™ IDE
– Complete documentation
– Quickstart application source code
– Stellaris® Firmware Development Package with example source code
10 September 5, 2010
Stellaris® LM3S9B96 Development Kit User’s Manual
USB
USB
USB
T
Stellaris
Tempest-cl ass
LM 3S9B96
Microcontroller
QVGA
Color LCD Module
I/O Signal Break-out
Switch
LED
Tempest LM 3S9B96 D evelo pment Bo ard
I/O Signal B reak-out
I/O signals
Dual
USB
Device
Controller
Debug
JTAG/SWD
Output/Input
Debug USB
Reset
+3.3V
Regulator
SWD/JTAG Mux
UART0
Debug
USB
Control+5V host supply
USB
micro-AB
connector
OTG/Host/Device
T
a
r
g
e
t
C
a
b
l
e
MicroSD
card slot
1GB
1MB
Serial
Flash
EPI
Touch
RJ45
Jack+
Magnetics
Ethernet
Pot
Thumb
wheel
Pot
8MB SDRAM
Headphone
Jack
Line Out
Jack
I2S
Audio
CODEC
Line Output
Phones
Block Diagram
Figure 1-2. DK-LM3S9B96 Development Board Block Diagram
Development Board Specifications
Board supply voltage: 4.75–5.25 Vdc from one of the following sources:
– Debugger (ICDI) USB cable (connected to a PC)
– USB Micro-B cable (connected to a PC)
– DC power jack (2.1x 5.5mm from exte rn al po we r su pp ly)
Break-out power output: 3.3 Vdc (100 mA max)
September 5, 2010 11
Dimensions (excluding LCD panel):
– 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board
– 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout board
Analo g Re fe re nc e: 3. 0 V +/-0.2 %
RoHS status: Compliant
NOTE: When the LM3S9B96 Development Board is used in USB Host mode, the host connector
is capable of supplying power to the connected USB device. The available supply current
is limited to ~200 mA unless the development board is powered from an external 5 V
supply with a =600mA rating.
12 September 5, 2010
CHAPTER 2
Stellaris® LM3S9B96 Development Board Hardware Description
In addition to an LM3S9B96 microcontroller, the development board includes a range of useful
peripheral features and an integrated in-circuit debug interface (ICDI). This chapter describe s how
these peripherals operate and interface to the microcontroller
LM3S9B96 Microcontroller Overview
The Stellaris LM3S9B96 is an ARM Cortex-M3-based microcontroller with 256-KB flash memory,
80-MHz operation, Ethernet, USB, EPI, SAFERTOS™ in ROM, and a wide range of peripherals.
See the LM3S9B96 Microcontroller Data Sheet (order number DS-LM3S9B96) for complete
microcontroller details.
The LM3S9B96 microcontroller is factory-programmed with a quickstart demo program. The
quickstart program resides in on-chip flash memory and runs each time power is applied, unless
the quickstart has been replaced with a user program.
Jumpers and GPIO Assignments
Each peripheral circuit on the development board is interfaced to the LM3S9B96 microcontroller
through a 0.1” pitch jumper/shunt. Figure 2-1 on page 14 shows the fact ory default positions of the
jumpers. The jumpers must be in these positions for the quickstart demo program to function
correctly.
The development board offers capabilities that the LM3S9B96 cannot support simultaneously due
to pin count and GPIO multiplexing limitations. For example, as configured, the board does not
support SDRAM and I
jumpers associated with I
Table 2-1 lists all features and peripherals that are disconnected in the factor y de fa ult
configuration. Using these peripherals requires that other peripherals be disconnected.
Appendix D, “Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments,” on
page 37 lists alternative jumper configurations used in conjunction with some of the
StellarisWare™ example applications for this board.
Table 2-1. Board Features and Peripherals that are Disconnected in Factory Default
Configuration
Peripheral Jumpers
2
I
S Receive (Audio Input) JP44, 45, 47, 49
Controller Area Network (CAN) JP14, 15
Ethernet Yellow Status LED (LED2) JP2
Analog 3.0V Reference JP33
See Appendix D, “Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments,”
on page 37, for a complete list of GPIO assignments. The table lists all default and alternate
2
S receive (microphone or line input) functions at the sa me ti me . The
2
S receive are omitted in the default configuration.
September 5, 2010 13
assignments that are supported by the 0.1” jumpers and PCB routing. The LM3S9B96 has
additional internal multiplexing that enables additional configurations which may require discrete
wiring between peripherals and GPIO pins.
The ICDI section of the board has a GND-GND jumper that serves no function other than to
provide a convenient place to ‘park’ a spare jumper. This jumper may be reused as required.
Figure 2-1. Factory Default Jumper Settings
Clocking
The development board uses a 16.0-MHz (Y2) crystal to complete the LM3S9B96
microcontroller's main internal clock circuit. An internal PLL, configured in software, multiples this
clock to higher frequencies for core and peripheral timing.
A 25.0-MHz (Y1) crystal provides an accurate timebase for the Ethernet PHY.
14 September 5, 2010
Reset
The RESETn signal into the LM3S9B96 microcontroller connects to the reset switch (SW2) and to
the ICDI circuit for a debugger-controlled reset.
External reset is asserted (active low) under any one of the three following conditions:
Power-on reset (filtered by an R-C network)
Reset push switch SW2 held down
By the ICDI circuit (U12 FT2232, U13D 74LVC125A) when instructed by the debugger (this
capability is optional, and may not be supported by all debuggers)
The LCD module has special Reset timing requirement s requiring a ded icated control line from the
microcontroller.
Power Supplies
The development board requires a regulated 5.0 V power source. Jumpers JP34-36 select the
power source, with the default source being the ICDI USB connector . Only one +5 V source should
be selected at any time to avoid conflict between the power sources.
When using USB in Host mode, the power source should be set to either ICDI or to EXT if a +5 V
power supply (not included in the kit) is available.
Stellaris® LM3S9B96 Development Kit User’s Manual
USB
The development board has two main power rails. A +3.3 V supply powers the microcontroller and
most other circuitry. +5 V is used by the OTG USB port and In-circuit Debug Interface (ICDI) USB
controller. A low drop-out (LDO) regulator (U5) converts the +5 V power rail to +3.3 V. Both rails
are routed to test loops for easy access.
The LM3S9B96’s full-speed USB controller supports On-the-Go, Host, and Device configurations.
See Table 2-2 for USB-related signals. The 5-pin microAB OTG connector supports all three
interfaces in conjunction with the cables included in the kit.
The USB port has additional ESD protection diode arrays (D1, D2,D5) for up to 15 kV of ESD
protection.
Table 2-2. USB-Related Signals
Microcontroller Pin Board Function Jumper Name
Pin 70 USB0DM USB Data- Pin 71 USB0DP USB Data+ Pin 73 USB0RBIAS USB bias resistor Pin 66 USB0ID OTG ID signal (input to microcontroller) OTG ID
Pin 67 USB0VBUS Vbus Level monitoring +VBUS
Pin 34 USB0EPE Host power enable (active high) EPEN
Pin 35 USB0PFLT Host power fault signal (active low) PFLT
U6, a fault-protected switch, controls and monitors power to the USB host port. USB0EPEN, the
control signal from the microcontroller , has a pull-down resistor to en sure host-p ort power rema ins
off during reset. The power switch will immediately cut power if the attached USB device draws
September 5, 2010 15
more than 1 Amp, or if the switches’ thermal limits are exceeded by a device drawing more than
500 mA. USB0PFLT indicates the over-current status back to the microcontroller.
The development board can be either a bus-po wered USB device or self-powered USB device
depending on the power-supply configuration jumpers.
When using the development board in USB-host mode, power to the EVB should be supplied by
the In-circuit Debugger (ICDI) USB cable or by a +5 V source connected to the DC power jack.
Note that the LM3S9B96’s USB capabilities are completely independent from the In-Circuit Debug
Interface USB functionality.
Debugging
Stellaris microcontrollers support programming and debugging using either JTAG or SWD. JTAG
uses the TCK, TMS, TDI, and TDO signals. SWD requires fewer signals (SWCLK, SWDIO, and,
optionally, SWO for trace). The debugger determines which debug protocol is used.
Debugging Modes
The LM3S9B96 development board supports a range of hardware debugging configurations.
Table 2-3 summarizes these configurations.
Table 2-3. Hardware Debugging Configurations
Mode Debug Function Use Selected by...
1 Internal ICDI Debug on-board LM3S9B96
2 ICDI out to JTAG/ SWD
header
3 In from JT AG/SWD header For users who prefer an
Debug In Considerations
Debug Mode 3 supports board debugging using an external debug interface such as a Segger
J-Link or Keil ULINK. Most debuggers use Pin 1 of the Debug connec to r to se nse the target
voltage and, in some cases, power the output logic circuit. Installing the VDD/PIN1 jumper will
apply 3.3 V power to this pin in order to support external debuggers.
Debug USB Overview
An FT2232 device from Future Technology Devices International Ltd implements USB-to-serial
conversion. The FT2232 is factory-configured to implement a JTAG/SWD port (synchronous
serial) on channel A and a Virtual COM Port (VCP) on channel B. This feature allows two
simultaneous communications links between the host computer an d the target device using a
single USB cable. Separate Windows drivers for each func tion are provided on the Docume ntation
and Software CD.
microcontroller over Debug
USB interface.
The development board is
used as a USB to SWD/
JTAG interface to an
external target.
external debug interface
(ULINK, JLINK, etc.) with the
development board.
Default mode
Remove jumpers on TCk,
TMS, TDI, TDO, and PIN1
Connecting an external
debugger to the JTAG/SWD
header
The In-Circuit Debug Interface USB capabilities are completely independent from the LM3S9B96’s
on-chip USB functionality.
16 September 5, 2010
A small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible by
the LM3S9B96 microcontroller. For full details on FT2232 operation, go to www.ftdichip.com.
USB to JTAG/SWD
The FT2232 USB device performs JT AG/SWD serial operations under th e control of the debugger.
A simple logic circuit multiplexes SWD and JTAG functions and, when working in SWD mode,
provides direction control for the bidirectional data line.
Virtual COM Port
The Virtual COM Port (VCP) allows Windows applications (such as HyperTe rm in al) to
communicate with UART0 on the LM3S9B96 over USB. Once the FT2232 VCP driver is in stalled,
Windows assigns a COM port number to the VCP channel. Table 2-4 shows the debug-related
signals.
Table 2-4. Debug-Related Signals
Microcontroller Pin Board Function Jumper Name
Pin 77 TDO/SWO JT AG data out or trace data out TDO
Pin 78 TDI JTAG data in TDI
Pin 79 TMS/SWDIO JT AG TMS or SWD data in/out TMS
Stellaris® LM3S9B96 Development Kit User’s Manual
Pin 80 TCK/SWCLK JTAG Clock or SWD clock TCK
Pin 26 PA0/U0RX Virtual Com port data to LM3S9B96 VCPRX
Pin 27 PA1/U0TX Virtual Com port data from LM3S9B96 VCPTX
Pin 64 RSTn System Reset RSTn
Serial Wire Out (SWO)
The development board supports the Cortex-M3 Serial-Wire Output (SWO) trace capabilities.
Under debugger control, on-board logic can route the SWO datastream to the VCP transmit
channel. The debugger software can then decode and interpret the trace information received
from the Virtual Com Port. The normal VCP connection to UART0 is interrupted when using SWO.
Not all debuggers support SWO.
See the Stellaris LM3S9B96 Microcontroller Data Sheet for additional information on the Trace
Port Interface Unit (TPIU).
Color QVGA LCD Touch Panel
The development board features a TFT Liquid Crystal graphics display with 320 x 240 pixel
resolution. The display is protected during shipping by a thin, protective plastic film which should
be removed before use.
Features
Features of the LCD module include:
Kitronix K350QVG-V1-F display
320 x RGB x 240 dots
3.5” 262 K colors
September 5, 2010 17
Wide temperature range
White LED backlight
Integrated RAM
Resist ive to uc h panel
Control Interface
The Color LCD module has a built-in controller IC with a multi-mode parallel interface. The
development board uses an 8-bit 8080 type interface with GPIO Port D providing the data bus.
Table 2-4 shows the LCD-related signals.
Table 2-5. L CD-Related Signals
Microcontroller Pin Board Function Jumper Name
PE6/ADC1 Touch X+ X+
PE3 Touch Y- YPE2 Touch X- XPE7/ADC0 Touch Y+ Y+
PB7 LCD Reset LRSTn
PD0..7 LCD Data Bus 0..7 LD0..7
PH7 LCD Data/Control Select LDC
PB5 LCD Read Strobe LRDn
PH6 LCD Write Strobe LWRn
- Backlight control BLON
Backlight
The white LED backlight must be powered for the display to be clearly visible. U7 (FAN5331B)
implements a 20 mA constant-current LED power source to the backlight. The backlight is not
normally controlled by the microcontroller, however, the control signal is available on a header. A
jumper may be installed to disable the backlight by connecting it to GND. Alternatively, a wire may
be used to control this signal from a spare microcontroller GPIO line.
Because the FAN5331B operates in a constant current mode, its output voltage will jump up if the
LCD should become disconnected. To prevent over-voltage failure of the IC or diode D3, a zener
(D4) clamps the voltage. The current will limit to 20 mA, but the total board current will be higher
than when the LCD panel is connected. To avoid over-heating the backlighting circuit, install the
BLON jumper to completely shut-down the backlighting circuit.
Power
The LCD module has internal bias voltage generators and requires only a single 3.3 V dc supply.
Resistive Touch Panel
The 4-wire resistive touch panel interfaces directly to the microcontroller, using 2 ADC channe ls
and 2 GPIO signals. See the StellarisW are™ source code for additio nal information on touch panel
implementation.
18 September 5, 2010
I2S Audio
The LM3S9B96 development board has advanced audio capabilities using an I2S-connected
Audio TLV320AIC23 CODEC. The factory default configuration has Audio output (Line Out and/or
Headphone output) enabled. Four additional I
and/or Microphone). All four audio interfaces are through 1/8” (3.5mm) stereo jacks. Table 2-6
shows the I
Table 2-6. I
Stellaris® LM3S9B96 Development Kit User’s Manual
2
S signals are required for Audio input (Line Input
2
S audio-related signals.
2
S Audio-Related Signals
Microcontroller Pin Board Function Jumper Name
I2C0SDA CODEC Configuration Data SDA
I2C0SCL CODEC Configuration Clock SCL
I2STXSD Audio Out Serial Data TXSD
I2STXWS Audio Out Framing signal TXWS
I2STXSCK Audio Out Bit Clock BCLK
I2STXMCLK Audio Out System Clock MCLK
I2SRXSD Audio In Serial Data RXSD
I2SRXWS Audio In Framing signal RXWS
I2SRXSCK Audio In Bit Clock BCLK
I2SRXMCLK Audio In System Clock MCLK
a
b
b
b
b
a. Shares GPIO line with Analog voltage reference. Jumper installed by default.
b. Shares GPIO line with LCD data bus – Port D. Jumper omitted by default.
The Audio CODEC has a number of control registers which are configured using the I
signals. CODEC settings can only be written, but not read, using I
example applications for programming information and the TLV320AIX23B data sheet for
complete register details.
The Headphone output can be connected dir ectly to any stand ard headphones. The Lin e Output is
suitable for connection to an external amplifier, including PC desktop speaker sets.
User Switch and LED
The development board provides a user push-switch and LED (see Table 2-7).
Table 2-7. Navigation Switch-Related Signals
Microcontroller Pin Board Function Jumper Name
PJ7 User Switch SWITCH
PF3 User LED LED
a. Shared with Ethernet Jack Yellow LED. This jumper is installed by default.
2
2
C. See the StellarisW are™
a
C bus
September 5, 2010 19
20 September 5, 2010
CHAPTER 3
Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI)
The External Peripheral Interface (EPI) is a high-speed 8/16/32- bit parallel bus for connecting
external peripherals or memory without glue logic. Supported modes include SDRAM, SRAM, and
Flash memories, as well as Host-bus and FIFO mo d es.
The LM3S9B96 development kit includes an 8 MB SDRAM board in addition to an EPI break-out
board. Other EPI expansion boards may be availabl e.
SDRAM Expansion Board
The SDRAM board provides 8 MB of memory (4M x 16) which, once configured, becomes part of
the LM3S9B96’s memory map at either 0x6000 .0 0 00 or 0x80 00 .0 00 0 . Th e SDRAM inte r face
multiplexes DQ00..14 and AD/BA0..14 without requiring external latches or buffers. Of the 32 EPI
signals, only 24 are used in SDRAM mode, with the remaining signals used for non-EPI functions
on the board.
Flash and SRAM Memory Expansion Board
The optional Flash and SRAM Memory Expansion Board (DK-LM3S9B9 6-FS8) is a plug-in fo r th e
DK-LM3S9B96 development board. This expansion board works with the External Peripheral
Interface (EPI) of the Stellari s microcontroller and provides Flash memory, SRAM, and an
improved performance LCD interface.
For more information on the Flash and SRAM Memory Expansion Board (sold separately), see
Appendix E, “Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board,” on page 41.
FPGA Expansion Board
The FPGA Expansion Board (DK-LM3S9B96-FPGA) is an optional expansion board which
connects directly to the External Peripheral Interface (EPI) port of the Stellaris DK-LM3S9B96
development board to demonstrate the machine-to-machine (M2M), high-bandwidth, parallel
interface capability of the Stellaris microcontroller. Right out of the box, users are able to control
and display the FPGA expansion board’s video on the DK- LM3S9B96 development bo ard’s large,
3.5” touchscreen display.
For more information on the FPGA Expansion Board (sold separately), see Append ix F , “S tellaris®
LM3S9B96 FPGA Expansion Board,” on page 49.
EM2 Expansion Board
The EM2 Expansion Board (DK-LM3S9B96-EM2) is an optional expansion boar d wh ich connects
directly to the External Peripheral Interface (EPI) port of the Stellaris DK-LM3S9B96 development
board. The EM2 Expansion Board provides a transition between the Stellaris External Peripheral
Interface (EPI) connector and the RF Evaluation Module (EM) connector. The DK-LM3S9B96-EM2
enables wireless application development using Low Power RF and RF ID evaluation modules on
the Stellaris DK-LM3S9B96 platform.
For more information on the EM2 Expansion Board (sold separately), see Appendix G, “Stellaris®
LM3S9B96 EM2 Expansion Board,” on page 69.
September 5, 2010 21
22 September 5, 2010
LM3S9B96 Dev Board
Target
Board
Stellaris
MCU
USB
to
JTAG/
SWD
PC with IDE/
debugger
Stellaris
MCU
JT AG or SW D c onnec t s to t he
ext ernal m ic roc ont roller
Rem ov e jum pers to us e I C D I Out F eat ure
`
TCK
TMS
TDI
TDO
Target
Cable
VDD
+3.3 V
CHAPTER 4
Using the In-Circuit Debugger Interface
The Stellaris® LM3S9B96 Development Kit can operate as an In-Circuit Debugger Interface
(ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target
board that uses a S tellaris mi crocontroller. See “Debugging Modes” on page 16 for a description of
how to enter ICDI Out mode.
Figure 4-1. ICD Interface Out Mode
The debug interface operates in either serial-wire debug (SWD) or JTAG mode, depending on the
configuration in the debugger IDE.
The IDE/debugger does not distinguish between the on-board Stellaris microcontroller and an
external Stellaris microcontroller. The only requirement is that the correct Stellaris device is
selected in the project configuration.
The Stellaris target board should have a 2x10 0.1” pin header with signals as indicated in
Table C-1 on page 35. This applies to both an external Stellaris microcontroller target (Debug
Output mode) and to external JTAG/SWD debuggers (Debug Input mode).
ICDI does not control RST (device reset) or TRST (test reset) signals. Both reset functions are
implemented as commands over JTAG/SWD, so these signals are usually not necessary.
September 5, 2010 23
24 September 5, 2010
APPENDIX A
Stellaris® LM3S9B96 Development Board Schematics
This section contains the schematics for the DK-LM3S9B96 development board.
Micro, EPI connector, USB, and Ethernet on page 26
LC D CAN, Ser i al Me m ory, and User I/O on page 2 7
Power Supplies on page 28
2
I
S Audio Expansion Board on page 29
EPI and SDRAM Expansion Boards on page 30
In-circuit Debug Interface (ICDI) on page 31
September 5, 2010 25
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