Texas Instruments SRC4194EVM User Manual
User’s Guide
July 2004
SBAU096
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EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
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As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
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EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the absolute operating conditions shown in
Table 2−1.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
+70°C. The EVM is designed to operate properly with certain components above +70°C as
long as the input and output ranges are maintained. These components include but are not
limited to linear regulators, switching transistors, pass transistors, and current sense
resistors. These types of devices can be identified using the EVM schematic located in the
EVM User’s Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
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Copyright 2004, Texas Instruments Incorporated
About This Manual
Contents
Preface
This document contains the information required to setup and operate the
SRC4194EVM evaluation module. For a more detailed description of the
SRC4194, please refer to the product datasheet available from the Texas Instruments web site at http://www.ti.com
listed in the sections of this guide entitled Related Documentation from Tex-
as Instruments and Additional Documentation.
. Additional support documents are
How to Use This Manual
Throughout this document, the term EVM and the phrase evaluation module
are synonymous with the SRC4194EVM.
Chapter 1 provides a product overview for the SRC4194 four-channel asynchronous sample rate converter. The SRC4194EVM block diagram and primary features are also discussed.
Chapter 2 provides general information regarding EVM handling and unpacking, as well as absolute operating conditions for power supplies and input/output connections.
Chapter 3 provides general hardware descriptions and configuration information for the EVM. The information in this chapter is designed to guide the user
in the setup of the EVM.
Chapter 4 includes the EVM electrical schematic, printed circuit board (PCB)
layout, and the bill of materials
Contents
iii
Contents
Information About Cautions
This document contains cautions. The information in a caution is provided for
your protection. Please read each caution carefully.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
iv
Related Documentation From Texas Instruments
The following documents provide information regarding T exas Instrument integrated circuits used in the assembly of the SRC4194EVM. These documents
are available from the TI web site at http://www.ti.com
the literature number corresponds to the document revision, which is current
at the time of the writing of this User’s Guide. Newer revisions may be available
from the TI web site, or by calling the Texas Instruments Literature Response
Center at (800) 477−8924 or the Product Information Center at (972)
644−5580. When ordering, identify the document(s) by both title and literature
number.
Data Sheets: Literature Number:
SRC4194 SBFS025A
DIT4192 SBOS229B
PLL1705 SLES046A
REG1117 SBVS001B
SN74ALVC125 SCES110E
Contents
. The last character of
SN74ALVC244 SCES188B
SN74ALVC245 SCES271B
SN74LVC1G04 SCES214M
SN74LVC1G08 SCES217L
SN74LVC244A SCAS414U
Additional Documentation
The following documents or references provide information regarding selected non-TI components used in the assembly of the SRC4194EVM. These
documents are available from the corresponding manufacturer.
Document: Manufacturer:
CS8414 Data Sheet Cirrus Logic, web site: http://www.cirrus.com
HCM49 Series Crystals Citizen, web site: http://www.citizencrystals.com
Contents
v
Contents
If You Need Assistance
If you have questions regarding either the use of this evaluation module or the
information contained in the accompanying documentation, please contact
the Texas Instruments Product Information Center at (972) 644−5580 or visit
the TI Semiconductor Online Technical Support pages at http://www.ti.com
FCC Warning
This equipment is intended for use in a laboratory test environment only. It may
generate, use, or radiate radio frequency energy and has not been tested for
compliance with the limits of computing devices pursuant to sub−part J of part
15 of the FCC regulations, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
All trademarks are the property of their respective owners.
.
vi
Contents
1 Introduction 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 SRC4194 Product Overview 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 SRC4194 Functional Block Diagram 1-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 SRC4194EVM Features 1-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 SRC4194EVM Functional Block Diagram 1-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Getting Started 2-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Electrostatic Discharge Warning 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Unpacking the EVM 2-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Absolute Maximum Operating Conditions 2-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Hardware Description and Configuration 3-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Power Supply Configuration 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 SRC4194 Configuration Modes 3-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1 SRC4194 Hardware (or Standalone) Mode Configuration 3-4 . . . . . . . . . . . . . . . . .
3.2.2 SRC4194 Software Mode Configuration Via The Host Port 3-6 . . . . . . . . . . . . . . . .
3.3 Audio Input Ports 3-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Audio Output Ports 3-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Reference Clock Generation 3-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6 TDM Test Mode 3-11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Schematic, PCB Layout, and Bill of Materials 4-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Schematic 4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 PCB Layout 4-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Bill of Materials 4-11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
vii
Contents
1−1. SRC4194 Functional Block Diagram 1-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2. SRC4194EVM Functional Block Diagram 1-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1. SRC4194EVM Power Supply Configuration and Jumpers 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . .
3−2. Input Port External Connections and Configuration 3-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3. Output Port External Connections and Configuration 3-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−4. Reference Clock Generation, Connections, and Configuration 3-10 . . . . . . . . . . . . . . . . . . . . .
4−1. SRC4194EVM Schematic Diagram, Page 1 of 2 4-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−2. SRC4194EVM Schematic Diagram, Page 2 of 2 4-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3. Top Side Silk Screen 4-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−4. Bottom Side Silk Screen 4-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−5. Top Layer (Component Side) 4-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−6. Ground Plane Layer 4-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7. Power Layer 4-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−8. Bottom layer (Solder Side) 4-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1. Absolute Operating Conditions 2-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1. Common Configurations using a +5V Supply and an Optional EXT VIO Supply 3-3 . . . . . . . .
3−2. Setting the Configuration Mode 3-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3. Hardware Mode Setup Matrix Using Switches SW1, SW2, SW4 and SW5 (x = A or B) 3-5
3−4. Transmitter Clock Divider Configuration 3-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−5. Transmitter Stereo/Mono Mode Configuration 3-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−6. PLL Configuration for U25 and U28 3-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1. Bill of Materials 4-11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
viii
Chapter 1
This chapter provides a brief technical overview for the SRC4194 four-channel
audio asynchronous sample rate converter, as well as a general description
and feature list for the SRC4194EVM.
Topic Page
1.1 SRC4194 Product Overview 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 SRC4194 Functional Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 SRC4194EVM Features 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 SRC4194EVM Functional Block Diagram 1-6. . . . . . . . . . . . . . . . . . . . . . . .
Introduction
1-1
SRC4194 Product Overview
1.1 SRC4194 Product Overview
The SRC4194 is a four-channel, asynchronous sample rate converter
(ASRC), implemented as two stereo sections referred to as SRC A and SRC
B. Operation at input and output sampling frequencies up to 212kHz is
supported, with a continuous input/output sampling ratio range of 16:1 to 1:16.
Excellent dynamic range and THD+N are achieved by employing high
performance, linear phase digital filtering with better than 140dB of image
rejection. The digital filters provide settings for lower latency processing,
including low group delay options for the interpolation filter and a direct
down-sampling option for the decimation filter. Digital de-emphasis filtering is
also included, supporting 32kHz, 44.1kHz, and 48kHz input sampling
frequencies.
The audio input and output ports support standard audio data formats, as well
as a time division multiplexed (TDM) format. Word lengths of 24, 20, 18, and
16 bits are supported. Input and output ports may operate in Slave mode, deriving their word and bit clocks from external input and output devices. Alternatively, one port may operate in Master mode while the other remains in Slave
mode. In Master mode, the LRCK and BCK clocks are derived from the reference clock inputs, either RCKIA or RCKIB. The flexible configuration options
for the input and output ports allows connection to a variety of audio data converters, digital audio interface devices, and digital signal processors.
A bypass mode is included, which allows audio data to be passed directly from
the input port to the output port, bypassing the ASRC function. The bypass option is useful for passing through compressed or encoded audio data, as well
as non-audio data (that is, control or status information).
A soft mute function is available for the SRC4194 in both Hardware and Software modes. Digital output attenuation is available only in Software mode.
Both soft mute and digital attenuation functions provide artifact-free operation.
The mute attenuation is typically −144dB, while the digital attenuation function
is programmable from 0dB to −127.5dB in 0.5dB steps.
The SRC4194 includes a four-wire SPI port, which is used to access on-chip
control and status registers in Software mode. The SPI port facilitates interfacing to microprocessors or digital signal processors that support synchronous
serial peripherals. In Hardware (or Standalone) mode, dedicated control pins
are provided for the majority of the SRC4194 functions. These pins can be either hardwired or driven by logic or host control.
1-2
1.2 SRC4194 Functional Block Diagram
Figure 1−1 shows a functional block diagram of the SRC4194. The SRC4194
is segmented into two stereo SRC sections referred to as SRC A and SRC B.
Each section can operate independently from the other. Each section has its
own set of configuration pins in Hardware mode, and its own bank of control
and status registers in Software mode.
SRC A and SRC B have identical operations. Audio data is received at the input serial port, clocked by either the audio source device in Slave mode, or by
the SRC4194 in Master mode. The output port data is clocked by either the
audio output device in Slave mode, or by the SRC4194 in Master mode. The
input data is passed through interpolation filters that up-sample the data,
which is then passed on to the re-sampler. The rate estimator compares the
input and output sampling frequencies by comparing LRCKI, LRCKO, and a
reference clock. The results of the rate estimation are used to configure the
re-sampler coefficients and data pointers.
The output of the re-sampler is passed on to either the decimation filter or
direct down-sampler function. The decimation filter performs down-sampling
and antialias filtering functions, and is required when the output sampling
frequency is equal to or lower than the input sampling frequency. The direct
down-sampling function does not provide any filtering, and may be used in
cases when the output sampling frequency is greater than the input sampling
frequency. The advantage of the direct down-sampling function is a significant
reduction in the group delay associated with the decimation function, allowing
lower latency processing.
SRC4194 Functional Block Diagram
For additional information regarding the SRC4194, please refer to the product
datasheet available from the TI web site, located at http://www.ti.com
.
Introduction
1-3
SRC4194 Functional Block Diagram
Figure 1−1.SRC4194 Functional Block Diagram
LRCKIA
BCKIA
SDINA
RCKIA
IFMTA0
IFMTA1
IFMTA2
OFMTA0
OFMTA1
OWLA0
OWLA1
BYPA
LRCKIB
BCKIB
SDINB
RCKIB
Input
Serial
Port
Control
SRC A
Input
Serial
Port
Digital
De−Emphasis and
Interpolation Filters
LGRPA0
LGRPA1
DDNA
DEMA0
DEMA1
MODEA0
MODEA1
MODEA2
MUTEA
Digital
De−Emphasis and
Interpolation Filters
f
sIN
f
sIN
Re−Sampler
Rate
Estimator
Re−Sampler
Rate
Estimator
Digital
Decimation
Filter
f
sOUT
RDYA
RATIOA
LGRPB0
LGRPB1
DDNB
DEMB0
DEMB1 (CDOUT)
MODEB0 (CS)
MODEB1 (CCLK)
MODEB2 (CDIN)
MUTEB
Digital
Decimation
Filter
f
sOUT
RDYB
RATIOB
Output
Serial
Port
Control
SRC B
SPI Po rt
and
Reset
Output
Serial
Port
LRCKOA
BCKOA
SDOUTA
TDMIA
IFMTB0
IFMTB1
IFMTB2
OFMTB0
OFMTB1
OWLB0
OWLB1
BYPB
H/S
RST
LRCKOB
BCKOB
SDOUTB
TDMIB
V
IO
DGND
VDD18 (2)
VDD33 (2)
DGND
REGEN
1-4
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