TEXAS INSTRUMENTS SRC4184 Technical data

SRC4184

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

4-Channel, Asynchronous Sample Rate Converter

FEATURES

DAUTOMATIC SENSING OF INPUT-TO-OUTPUT SAMPLING RATIO

DWIDE INPUT-TO-OUTPUT SAMPLING RANGE: 16:1 to 1:16

DSUPPORTS INPUT AND OUTPUT SAMPLING RATES UP TO 212kHz

DDYNAMIC RANGE: 128dB (−60dbFS Input, BW = 20Hz to fs/2, A-Weighted)

DTHD+N: −125dB (0dbFS Input, BW = 20Hz to f s/2)

DHIGH-PERFORMANCE, LINEAR PHASE DIGITAL FILTERING

DFLEXIBLE AUDIO SERIAL PORTS:

−Master or Slave Mode Operation

−Supports I 2S, Left-Justified, Right-Justified, and TDM Data Formats

−TDM Mode Allows Daisy-Chaining of Up to Four Devices

DSUPPORTS 24-, 20-, 18-, or 16-BIT INPUT AND OUTPUT DATA:

−All Output Data is Dithered from the Internal 28-Bit Data Path

DSERIAL PERIPHERAL INTERFACE (SPI) PORT

SUPPORTS REGISTER READ AND WRITE OPERATIONS IN SOFTWARE MODE

DBYPASS MODE:

−Routes Input Port Data Directly to the Output Port

DFOUR GROUP DELAY OPTIONS FOR THE INTERPOLATION FILTER

DDIRECT DOWNSAMPLING OPTION FOR THE DECIMATION FILTER

DDIGITAL DE-EMPHASIS FILTER:

−User-Selectable for 32kHz, 44.1kHz, and 48kHz Sampling Rates

DSOFT MUTE FUNCTION

DPROGRAMMABLE DIGITAL OUTPUT ATTENUATION (SOFTWARE MODE ONLY):

−256 Steps: 0dB to −127.5dB with 0.5dB Steps

U.S. Patent No. 7,262,716.

DINPUT-TO-OUTPUT SAMPLING RATIO READBACK (SOFTWARE MODE ONLY)

DPOWER-DOWN MODES

DSUPPORTS OPERATION FROM A SINGLE +1.8V OR +3.3V POWER SUPPLY

DAVAILABLE IN A TQFP-64 PACKAGE

APPLICATIONS

DDIGITAL MIXING CONSOLES

DDIGITAL AUDIO WORKSTATIONS

DAUDIO DISTRIBUTION SYSTEMS

DBROADCAST STUDIO EQUIPMENT

DGENERAL DIGITAL AUDIO PROCESSING

DESCRIPTION

The SRC4184 is a four-channel, asynchronous sample rate converter (ASRC), designed for professional and broadcast audio applications. The SRC4184 combines a wide input-to-output sampling ratio with outstanding dynamic range and ultra low distortion. The input and output serial ports support the most common audio data formats, as well as a time division multiplexed (TDM) format. This allows the SRC4184 to interface to a wide range of audio data converters, digital audio receivers and transmitters, and digital signal processors.

The SRC4184 may be operated in Hardware mode as a standalone pin-programmed device, with dedicated control pins for serial port mode, audio data format, soft mute, bypass, and digital filtering functions. Alternatively, the SRC4184 may be operated in Software mode, where a four-wire serial peripheral interface (SPI) port provides access to internal control and status registers.

The SRC4184 operates from either a +1.8V core supply or a +3.3V core supply. When operating from +3.3V, the +1.8V required by the core logic is derived from an internal voltage regulator. The SRC4184 also requires a digital I/O supply, which operates from +1.65V to +3.6V. The SRC4184 is available in a TQFP-64 package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products	Copyright 2004, Texas Instruments Incorporated
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.

www.ti.com

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

ABSOLUTE MAXIMUM RATINGS(1)

Core Supply Voltage

VDD18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to +2.0V

	VDD33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. −0.3V to +4.0V
	Digital I/O Supply Voltage, VIO . . . . . . . . . . . . . . .	. −0.3V to +4.0V
	Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .	. −0.3V to +4.0V
	Operating Case Temperature Range, TC	−40 °C to +85°C
	. . . . . . . . . . .Storage Temperature Range, TSTG	−65 °C to +150°C

(1)Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported.

ORDERING INFORMATION

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.

ELECTRICAL CHARACTERISTICS

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

			SRC4184
PARAMETER	CONDITIONS	MIN	TYP	MAX	UNITS
DYNAMIC PERFORMANCE
Resolution			24		Bits
Input Sampling Frequency, fsIN		4		212	kHz
Output Sampling Frequency, fsOUT		4		212	kHz
INPUT/OUTPUT SAMPLING RATIO
Upsampling				1:16
Downsampling				16:1
DYNAMIC RANGE	BW = 20Hz to fsOUT/2, −60dBFS Input
44.1kHz:48kHz	fIN = 1kHz, A-Weighted		128		dB
48kHz:44.1kHz			128		dB
48kHz:96kHz			128		dB
44.1kHz:192kHz			128		dB
96kHz:48kHz			128		dB
192kHz:12kHz			128		dB
192kHz:32kHz			128		dB
192kHz:48kHz			128		dB
32kHz:48kHz			128		dB
12kHz:192kHz			128		dB
TOTAL HARMONIC DISTORTION + NOISE	BW = 20Hz to fsOUT/2, −60dBFS Input
44.1kHz:48kHz	fIN = 1kHz, Unweighted		−125		dB
48kHz:44.1kHz			−125		dB
48kHz:96kHz			−125		dB
44.1kHz:192kHz			−125		dB
96kHz:48kHz			−125		dB
192kHz:12kHz			−125		dB
192kHz:32kHz			−125		dB
192kHz:48kHz			−125		dB
32kHz:48kHz			−125		dB
12kHz:192kHz			−125		dB
Interchannel Gain Mismatch			0		dB
Interchannel Phase Deviation			0		degrees

(1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system.

(2)fsMIN = min (fsIN, fsOUT).

(3)fsMAX = max (fsIN, fsOUT).

(4)Power-supply current for power-down modes is measured without loading.

(5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

2

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

ELECTRICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

									SRC4184
		PARAMETER					CONDITIONS	MIN	TYP	MAX	UNITS
DIGITAL ATTENUATION							Software Mode Only
	Minimum								0		dB
	Maximum								−127.5		dB
	Step Size								0.5		dB
Mute Attenuation							24-Bit Word Length		−128		dB
DIGITAL INTERPOLATION FILTER CHARACTERISTICS
Passband										0.4535 × fsIN	Hz
Passband Ripple										±0.007	dB
Transition Band								0.4535 × fsIN		0.5465 × fsIN	Hz
Stop Band								0.5465 × fsIN			Hz
Stop Band Attenuation								−128			dB
Group Delay (64 sample buffer)							Decimation Filter Enabled		102.53125/fsIN		seconds
Group Delay (64 sample buffer)							Direct Downsampling Enabled		102/fsIN		seconds
Group Delay (32 sample buffer)							Decimation Filter Enabled		70.53125/fsIN		seconds
Group Delay (32 sample buffer)							Direct Downsampling Enabled		70/fsIN		seconds
Group Delay (16 sample buffer)							Decimation Filter Enabled		54.53125/fsIN		seconds
Group Delay (16 sample buffer)							Direct Downsampling Enabled		54/fsIN		seconds
Group Delay (8 sample buffer)							Decimation Filter Enabled		46.53125/fsIN		seconds
Group Delay (8 sample buffer)							Direct Downsampling Enabled		46/fsIN		seconds
DIGITAL DECIMATION FILTER CHARACTERISTICS
Passband										0.4535× fsOUT	Hz
Passband Ripple										±0.008	dB
Transition Band								0.4535× fsOUT		0.5465 × fsOUT	Hz
Stop Band								0.5465× fsOUT			Hz
Stop Band Attenuation								−128			dB
Group Delay
	Decimation Filter						Decimation Filter Enabled		36.46875/fsOUT		seconds
	Direct Downsampling						Direct Downsampling Enabled		0		seconds
DIGITAL DE-EMPHASIS
De-Emphasis Error for fs = 32kHz, 44.1kHz, or							De-Emphasis Enabled		0.001		dB
48kHz
DIGITAL I/O CHARACTERISTICS
High-Level Input Voltage					VIH			0.7 × VIO		VIO	V
Low-Level Input Voltage					VIL			0		0.3 × VIO	V
High-Level Input Current					IIH				0.5	10	µA
Low-Level Input Current					IIL			0.8 × VIO	0.5	10	µA
High-Level Output Voltage					VOH		IO = −4mA			VIO	V
Low-Level Output Voltage					VOL		IO = +4mA	0		0.2 × VIO	V
Input Capacitance					CIN				3		pF
SWITCHING CHARACTERISTICS
Reference Clock Timing
	RCKI Frequency(2)(3)							128 × f		50	MHz
								sMIN		1/(128× fsMIN)
	RCKI Period				tRCKIP			20			ns
	RCKI Pulsewidth High				tRCKIH			0.4 × tRCKIP			ns
	RCKI Pulsewidth Low				tRCKIL			0.4 × tRCKIP			ns
Reset Timing
	RST	Pulsewidth Low			tRSTL			500			ns
	Delay Following		RST	Rising Edge			Software Mode Only	500			µs
Input Serial Port Timing
	LRCKI to BCKI Setup Time				tLRIS			10			ns
	BCKI Pulsewidth High				tSIH			10			ns
	BCKI Pulsewidth Low				tSIL			10			ns
	SDIN Data Setup Time				tLDIS			10			ns
	SDIN Data Hold Time				tLDIH			10			ns

(1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system.

(2)fsMIN = min (fsIN, fsOUT).

(3)fsMAX = max (fsIN, fsOUT).

(4)Power-supply current for power-down modes is measured without loading.

(5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

3

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

ELECTRICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

SRC4184

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SWITCHING CHARACTERISTICS (continued)

Output Serial Port Timing

SDOUT Data Delay Time

tDOPD

10

ns

SDOUT Data Hold Time

tDOH

2

ns

BCKO Pulsewidth High

tSOH

10

ns

BCKO Pulsewidth Low

tSOL

5

ns

TDM Mode Timing

LRCKO Setup Time

tLROS

10

ns

LRCKO Hold Time

tLROH

10

ns

TDMI Data Setup Time

tTDMS

10

ns

TDMI Data Hold Time

tTDMH

10

ns

SPI Timing

CCLK Frequency

25

MHz

CDATA Setup Time

tCDS

12

ns

CDATA Hold Time

tCDH

8

ns

CS

Falling to CCLK Rising

tCSCR

15

ns

CCLK Falling to

CS

Rising

tCFCS

12

ns

CCLK Falling to CDOUT Data Valid

tCFDO

5

ns

CS

Rising to CDOUT High Impedance

tCSZ

5

ns

POWER SUPPLIES(4, 5)

Operating Voltage

VDD18

REGEN = 0

+1.65

+1.8

+2.0

V

VDD33

REGEN = 1

+3.0

+3.3

+3.6

V

VIO

+1.65

+3.3

+3.6

V

Supply Current

VDD18 = +1.8V, VIO = +1.8V, REGEN = 0

A

IDD, Hard Power-Down

RST

= 0, No Clocks

100

IDD, Soft Power-Down

PDN

Bit = 0, No Clocks

100

A

IDD, Dynamic

fsIN = 96kHz, fsOUT = 192kHz

80

mA

IIO, Hard Power-Down

RST

= 0, No Clocks

100

A

IIO, Soft Power-Down

PDN

Bit = 0, No Clocks

100

A

IIO, Dynamic

fsIN = 96kHz, fsOUT = 192kHz

6

mA

Total Power Dissipation

VDD18 = +1.8V, VIO = +1.8V, REGEN = 0

PD, Hard Power-Down

RST

= 0, No Clocks

1

mW

PD, Soft Power-Down

PDN

Bit = 0, No Clocks

360

W

PD, Dynamic

fsIN = fsOUT = 192kHz

155

mW

Supply Current

VDD33 = +3.3V, VIO = +3.3V, REGEN = 1

A

IDD, Hard Power-Down

RST

= 0, No Clocks

100

IDD, Soft Power-Down

PDN

Bit = 0, No Clocks

6

mA

IDD, Dynamic

fsIN = 96kHz, fsOUT = 192kHz

90

mA

IIO, Hard Power-Down

RST

= 0, No Clocks

100

A

IIO, Soft Power-Down

PDN

Bit = 0, No Clocks

100

A

IIO, Dynamic

fsIN = 96kHz, fsOUT = 192kHz

6

mA

Total Power Dissipation

VDD33 = +3.3V, VIO = +3.3V, REGEN = 1

PD, Hard Power-Down

RST

= 0, No Clocks

1

mW

PD, Soft Power-Down

PDN

Bit = 0, No Clocks

21

mW

PD, Dynamic

fsIN = fsOUT = 192kHz

320

mW

(1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system.

(2)fsMIN = min (fsIN, fsOUT).

(3)fsMAX = max (fsIN, fsOUT).

(4)Power-supply current for power-down modes is measured without loading.

(5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

4

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

PIN CONFIGURATION

Top View																												TQFP
			SDOUTA		BCKOA	LRCKOA		TDMIA	BCKIA	LRCKIA		SDINA		DGND	V		SDINB		LRCKIB	BCKIB	TDMIB	LRCKOB	BCKOB		SDOUTB
															IO
			64		63	62		61	60	59		58		57	56		55		54	53	52	51	50		49
IFMTA0	1																										48	IFMTB0
IFMTA1	2																										47	IFMTB1
IFMTA2	3																										46	IFMTB2
OFMTA0	4																										45	OFMTB0
OFMTA1	5																										44	OFMTB1
OWLA0	6																										43	OWLB0
OWLA1	7																										42	OWLB1
BYPA	8												SRC4184														41	BYPB
LGRPA0	9																										40	LGRPB0
LGRPA1	10																										39	LGRPB1
DDNA	11																										38	DDNB
DEMA0	12																										37	DEMB0
DEMA1	13																										36	DEMB1 (CDOUT)
MODEA0	14																										35	MODEB0 (CS)
MODEA1	15																										34	MODEB1 (CCLK)
MODEA2	16																										33	MODEB2 (CDIN)
			17		18	19		20	21	22		23		24	25		26		27	28	29	30	31		32
			RATIOA		RDYA	MUTEA		RCKIA	RST	H/S		DGND		VDD33	VDD33		REGEN		VDD18	VDD18	RCKIB	MUTEB	RDYB		RATIOB

5

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

PIN DESCRIPTIONS

PIN #

NAME

I/O

DESCRIPTION

1

IFMTA0

Input

SRC A Audio Input Data Format(1)

2

IFMTA1

Input

SRC A Audio Input Data Format(1)

3

IFMTA2

Input

SRC A Audio Input Data Format(1)

4

OFMTA0

Input

SRC A Audio Output Data Format(1)

5

OFMTA1

Input

SRC A Audio Output Data Format(1)

6

OWLA0

Input

SRC A Audio Output Data Word Length(1)

7

OWLA1

Input

SRC A Audio Output Data Word Length(1)

8

BYPA

Input

SRC A Bypass Mode (Active High)

9

LGRPA0

Input

SRC A Low Group Delay Mode(1)

10

LGRPA1

Input

SRC A Low Group Delay Mode(1)

11

DDNA

Input

SRC A Direct Downsampling Mode (Active High)(1)

12

DEMA0

Input

SRC A Digital De-Emphasis Filter Mode(1)

13

DEMA1

Input

SRC A Digital De-Emphasis Filter Mode(1)

14

MODEA0

Input

SRC A Serial Port Mode(1)

15

MODEA1

Input

SRC A Serial Port Mode(1)

16

MODEA2

Input

SRC A Serial Port Mode(1)

17

RATIOA

Output

SRC A Ratio Flag

18

RDYA

Output

SRC A Ready Flag (Active Low)

19

MUTEA

Input

SRC A Output Soft Mute

20

RCKIA

Input

SRC A Reference Clock

21

RST

Input

Reset and Power-Down (Active Low)

22

Input

Control Mode (0 = Software, 1 = Hardware)

H/S

23

DGND

Ground

Digital Ground

24, 25

VDD33

Power

Core Supply, +3.3V. Required when REGEN is high. When REGEN is low, VDD33 must be left unconnected.

26

REGEN

Input

Voltage Regulator Enable (Active High)

27, 28

VDD18

Power

Core Supply, +1.8V. Required when REGEN is low. When REGEN is high, VDD18 must be left unconnected.

29

RCKIB

Input

SRC B Reference Clock

30

MUTEB

Input

SRC B Output Soft Mute

31

RDYB

Output

SRC B Ready Flag (Active Low)

32

RATIOB

Output

SRC B Ratio Flag

33

MODEB2 or CDIN

Input

SRC B Serial Port Mode(1) or SPI Port Serial Data Input(2)

34

MODEB1 or CCLK

Input

SRC B Serial Port Mode(1) or SPI Port Data Clock(2)

35

MODEB0 or

CS

Input

SRC B Serial Port Mode(1) or SPI Port Chip Select (Active Low)(2)

36

DEMB1 or CDOUT

I/O

SRC B Digital De-Emphasis Filter Mode(1) or SPI Port Serial Data Output(2)

37

DEMB0

Input

SRC B Digital De-Emphasis Filter Mode(1)

38

DDNB

Input

SRC B Direct Downsampling Mode (Active High)(1)

39

LGRPB1

Input

SRC B Low Group Delay Mode(1)

40

LGRPB0

Input

SRC B Low Group Delay Mode(1)

41

BYPB

Input

SRC B Bypass Mode (Active High)

42

OWLB1

Input

SRC B Audio Output Data Word Length(1)

43

OWLB0

Input

SRC B Audio Output Data Word Length(1)

44

OFMTB1

Input

SRC B Audio Output Data Format(1)

45

OFMTB0

Input

SRC B Audio Output Data Format(1)

46

IFMTB2

Input

SRC B Audio Input Data Format(1)

47

IFMTB1

Input

SRC B Audio Input Data Format(1)

48

IFMTB0

Input

SRC B Audio Input Data Format(1)

49

SDOUTB

Output

SRC B Audio Output Data

50

BCKOB

I/O

SRC B Audio Output Bit Clock

51

LRCKOB

I/O

SRC B Audio Output Left/Right or Word Clock

52

TDMIB

Input

SRC B TDM Input Data (TDM Format Only)

53

BCKIB

I/O

SRC B Audio Input Bit Clock

54

LRCKIB

I/O

SRC B Audio Input Left/Right or Word Clock

55

SDINB

Input

SRC B Audio Input Data

56

VIO

Power

Digital I/O Supply, +1.65V to +3.6V

57

DGND

Ground

Digital Ground

58

SDINA

Input

SRC A Audio Input Data

59

LRCKIA

I/O

SRC A Audio Input Left/Right or Word Clock

60

BCKIA

I/O

SRC A Audio Input Bit Clock

61

TDMIA

Input

SRC A TDM Input Data (TDM Format Only)

62

LRCKOA

I/O

SRC A Audio Output Left/Right or Word Clock

63

BCKOA

I/O

SRC A Audio Output Bit Clock

64

SDOUTA

Output

SRC A Audio Output Data

(1)Disabled in Software control mode.

(2)Disabled in Hardware control mode.

6

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

16k

20

100

1k

10k

16k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

22k

20

100

1k

10k

22k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

24k

20

100

1k

10k

24k

Frequency (Hz)

Frequency (Hz)

7

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

16k

20

100

1k

10k

16k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

22k

20

100

1k

10k

22k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

24k

20

100

1k

10k

24k

Frequency (Hz)

Frequency (Hz)

8

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

44k

20

100

1k

10k

44k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

fsIN:fsOUT = 44.1kHz:192kHz

− 70

− 20

fIN = 1kHz

− 80

− 30

− 40

with 0dBFS Amplitude

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

96k

20

100

1k

10k

96k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

fsIN:fsOUT = 48kHz:32kHz

− 70

− 20

fIN

= 1kHz

− 80

− 30

− 40

with 0dBFS Amplitude

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

16k

20

100

1k

10k

16k

Frequency (Hz)

Frequency (Hz)

9

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

22k

20

100

1k

10k

22k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

24k

20

100

1k

10k

24k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

48k

20

100

1k

10k

48k

Frequency (Hz)

Frequency (Hz)

10

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

96k

20

100

1k

10k

96k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

22k

20

100

1k

10k

22k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

24k

20

100

1k

10k

24k

Frequency (Hz)

Frequency (Hz)

11

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

48k

20

100

1k

10k

48k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

96k

20

100

1k

10k

96k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−130

−100

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

22k

20

100

1k

10k

22k

Frequency (Hz)

Frequency (Hz)

12

SRC4184

www.ti.com

SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007

TYPICAL CHARACTERISTICS (continued)

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted.

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

24k

20

100

1k

10k

24k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−130

−100

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

48k

20

100

1k

10k

48k

Frequency (Hz)

Frequency (Hz)

FFT PLOT

FFT PLOT

0

− 60

− 10

− 70

− 20

− 80

− 30

− 40

− 90

(dBFS)

− 50

(dBFS)

−100

− 60

− 90

−120

− 70

−110

Amplitude

− 80

Amplitude

−100

−130

−110

−140

−120

−150

−130

−140

−160

−150

−170

−160

−170

−180

−180

−190

−190

−200

−200

20

100

1k

10k

96k

20

100

1k

10k

96k

Frequency (Hz)

Frequency (Hz)

13