Texas Instruments JM38510-34105BSA, JM38510-34105BRA, JM38510-34105B2A, SN54F374J, SN74F374N3 Datasheet

...
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCT OBER 1993
Eight D-Type Flip-Flops in a Single Package
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic
Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
description
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the F374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output enable (OE to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.
) input can be used
SN54F374 ...J PACKAGE
SN74F374 ... DB, DW, OR N PACKAGE
SN54F374 . . . FK PACKAGE
2D 2Q 3Q 3D 4D
(TOP VIEW)
OE
1Q 1D 2D 2Q 3Q 3D 4D 4Q
GND
(TOP VIEW)
1D1QOE
3 2 1 20 19
4 5 6 7 8
9 10 11 12 13
4Q
1 2 3 4 5 6 7 8 9 10
GND
20 19 18 17 16 15 14 13 12 11
V
CLK
CC
5Q
V 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK
8Q
18 17 16 15 14
5D
CC
8D 7D 7Q 6Q 6D
The output enable (OE
) input does not affect internal operations of the flip-flop. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state. The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54F374 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F374 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
INPUTS
OE CLK D
L H H L LL LH or L X Q
H X X Z
OUTPUT
Q
0
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
2–1
SN54F374, SN74F374
UNIT
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCT OBER 1993
1 11
3 4 7 8 13 14 17 18
EN
C1
1D
2 5 6
9 12 15 16 19
logic diagram (positive logic)
1
OE
11
CLK
3
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
1D
To Seven Other Channels
1D
C1
2
1Q
logic symbol
OE
CLK
1D 2D 3D 4D 5D 6D 7D 8D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V Input voltage range, V
Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state –0.5 V to V
Current into any output in the low state: SN54F374 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54F374 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F374 48 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F374 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
recommended operating conditions
V V V I
IK
I
OH
I
OL
T
2–2
CC IH IL
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V High-level input voltage 2 2 V Low-level input voltage 0.8 0.8 V Input clamp current –18 –18 mA High-level output current –3 –3 mA Low-level output current 20 24 mA Operating free-air temperature –55 125 0 70 °C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN54F374 SN74F374
MIN NOM MAX MIN NOM MAX
SN54F374, SN74F374
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
V
V
V
twPulse duration
ns
t
Set
CLK
ns
thHold time, data after CLK
ns
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54F374 SN74F374
MIN TYP†MAX MIN TYP†MAX
V
IK
V
OH
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
I
OS
I
† ‡
NOTE 2: I
CCZ
All typical values are at VCC = 5 V, TA = 25°C. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
is measured with OE
CCZ
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
= 4.5
CC
VCC = 4.75 V, IOH = – 1 mA to –3 mA 2.7
= 4.5
CC
VCC = 5.5 V, VO = 2.7 V 50 50 µA VCC = 5.5 V, VO = 0.5 V –50 –50 µA VCC = 5.5 V, VI = 7 V 0.1 0.1 mA VCC = 5.5 V, VI = 2.7 V 20 20 µA VCC = 5.5 V, VI = 0.5 V – 0.6 – 0.6 mA VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA VCC = 5.5 V, See Note 2 55 86 55 86 mA
at 4.5 V and all other inputs grounded.
IOH = – 1 mA 2.5 3.4 2.5 3.4 IOH = – 3 mA 2.4 3.3 2.4 3.3 V
IOL = 20 mA 0.3 0.5 IOL = 24 mA 0.35 0.5
timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
F374
MIN MAX MIN MAX MIN MAX
f
Clock frequency 0 100 0 60 0 70 MHz
clock
CLK high 7 7 7 CLK low 6 6 6
su
up time, data before
High Low High 2 2 2
Low 2 2.5 2
2 2.5 2 2 2 2
SN54F374 SN74F374
UNIT
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
2–3
SN54F374, SN74F374
(
)
(
)
(INPUT)
(OUTPUT)
CLK
Q
ns
OE
Q
ns
OE
Q
ns
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCT OBER 1993
switching characteristics (see Note 3)
VCC = 5 V, CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t † NOTE 3: Load circuits and waveforms are shown in Section 1.
PLZ
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
FROM INPUT
TO
OUTPUT
RL = 500 , TA = 25°C
F374 SN54F374 SN74F374
MIN TYP MAX MIN MAX MIN MAX
100 60 70
3.2 6.1 8.5 3.2 10.5 3.2 10
3.2 6.1 8.5 3.2 11 3.2 10
1.2 8.6 11.5 1.2 14 1.2 12.5
1.2 5.4 7.5 1.2 10 1.2 8.5
1.2 4.9 7 1.2 8 1.2 8
1.2 3.9 5.5 1.2 7.5 1.2 6.5
VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500, TA = MIN to MAX
UNIT
MHz
2–4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Loading...