Texas Instruments SN74CBT16244DGGR, SN74CBT16244DGVR, SN74CBT16244DLR, SNJ54CBT16244WD Datasheet
SN54CBT16244, SN74CBT16244
16-BIT FET BUS SWITCHES
SCDS031G – MAY 1996 – REVISED SEPTEMBER 1998
D
Standard ’16244-Type Pinout
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and Shrink
Small-Outline (DL) Packages, and Ceramic
Flat (WD) Package
description
The ’CBT16244 devices provide 16 bits of
high-speed TTL-compatible bus switching in a
standard ’16244 device pinout. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
These devices are organized as four 4-bit
low-impedance switches with separate
output-enable (OE
switch is on and data can flow from port A to port
B, or vice versa. When OE
open and a high-impedance state exists between
the two ports.
The SN54CBT16244 is characterized for
operation over the full military temperature range
of –55°C to 125°C. The SN74CBT16244 is
characterized for operation from –40°C to 85°C.
) inputs. When OE is low, the
is high, the switch is
SN54CBT16244 . . . WD PACKAGE
SN74CBT16244 . . . DGG, DGV, OR DL PACKAGE
1OE
1B1
1B2
GND
1B3
1B4
V
CC
2B1
2B2
GND
2B3
2B4
3B1
3B2
GND
3B3
3B4
V
CC
4B1
4B2
GND
4B3
4B4
4OE
(TOP VIEW)
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
(each 4-bit bus switch)
INPUT
OE
L A port = B port
H Z
OUTPUTS
A, B
Copyright 1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54CBT16244, SN74CBT16244
UNIT
16-BIT FET BUS SWITCHES
SCDS031G – MAY 1996 – REVISED SEPTEMBER 1998
logic diagram (positive logic)
13
17
2
1B1
6
1B4
3B1
3B4
47
1A1
43
1A4
1
1OE
36
3A1
32
3A4
25
3OE
Pin numbers shown are for the DGG, DGV, and DL packages.
41
2A1
37
2A4
48
2OE
30
4A1 4B1
26
4A4
24
4OE
12
19
23
8
2B1
2B4
4B4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O
(see Note 2): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
IK
DGV package 93°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
recommended operating conditions (see Note 3)
SN54CBT16244 SN74CBT16244
MIN MAX MIN MAX
V
V
V
T
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
2
Supply voltage 4 5.5 4 5.5 V
CC
High-level control input voltage 2 2 V
IH
Low-level control input voltage 0.8 0.8 V
IL
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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