Datasheet SN74ALS867ADW, SN74ALS867ADWR, SN74ALS867ANT, SN74ALS869DW, SN74ALS869DWR Datasheet (Texas Instruments)
...
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
• Fully Programmable With Synchronous
Counting and Loading
• SN74ALS867A and ′AS867 Have
Asynchronous Clear; SN74ALS869 and
′AS869 Have Synchronous Clear
• Fully Independent Clock Circuit
Simplifies Use
• Ripple-Carry Output for n-Bit Cascading
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
description
These synchronous, presettable, 8-bit up/down
counters feature internal-carry look-ahead
circuitry for cascading in high-speed counting
applications. Synchronous operation is provided
by having all flip-flops clocked simultaneously so
that the outputs change coincidentally with each
other when so instructed by the count-enable
(ENP
, ENT) inputs and internal gating. This mode
of operation eliminates the output counting spikes
normally associated with asynchronous (rippleclock) counters. A buffered clock (CLK) input
triggers the eight flip-flops on the rising (positivegoing) edge of the clock waveform.
These counters are fully programmable; they may
be preset to any number between 0 and 255. The
load-input circuitry allows parallel loading of the
cascaded counters. Because loading is
synchronous, selecting the load mode disables
the counter and causes the outputs to agree with
the data inputs after the next clock pulse.
SN54AS867, SN54AS869 . . . JT PACKAGE
SN74ALS867A, SN74ALS869, SN74AS867,
SN74AS869 . . . DW OR NT PACKAGE
SN54AS867, SN54AS869 . . . FK PACKAGE
B
C
D
NC
E
F
G
NC – No internal connection
(TOP VIEW)
S0
1
S1
2
A
3
B
4
C
5
D
6
E
7
F
8
G
9
H
10
ENT
11
GND
12
(TOP VIEW)
AS1S0
432128
5
6
7
8
9
10
11
12 13 14 15 16
H
ENT
GND
NC
NC
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
27 26
17 18
RCO
V
CC
ENP
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
CLK
RCO
ENP
CLK
Q
25
24
23
22
21
20
19
Q
A
H
Q
Q
Q
NC
Q
Q
Q
B
C
D
E
F
G
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. Two count-enable (ENP
in accomplishing this function. Both ENP
by the levels of the select (S0, S1) inputs as shown in the function table. ENT
and ENT) inputs and a ripple-carry (RCO) output are instrumental
and ENT must be low to count. The direction of the count is determined
is fed forward to enable RCO. RCO
thus enabled produces a low-level pulse while the count is zero (all outputs low) counting down or 255 counting
up (all outputs high). This low-level overflow-carry pulse can be used to enable successive cascaded stages.
Transitions at ENP
and ENT are allowed regardless of the level of CLK. All inputs are diode clamped to minimize
transmission-line effects, thereby simplifying system design.
These counters feature a fully independent clock circuit. With the exception of the asynchronous clear on the
SN74ALS867A and ′AS867, changes at S0 and S1 that modify the operating mode have no effect on the Q
outputs until clocking occurs. For the ′AS867 and ′AS869, any time ENP
goes or remains high. For the SN74ALS867A and SN74ALS869, any time ENT
and/or ENT is taken high, RCO either
is taken high, RCO either goes
or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely
by the conditions meeting the stable setup and hold times.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
description (continued)
The SN54AS867 and SN54AS869 are characterized for operation over the full military temperature range of
–55°C to 125°C. The SN74ALS867A, SN74ALS869, SN74AS867, and SN74AS869 are characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
S1
S0 FUNCTION
L L Clear
L H Count down
H L Load
H H Count up
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
logic symbols
†
SN74ALS867A
S0
S1
ENT
ENP
CLK
S0
S1
ENT
ENP
CLK
1
2
11
23
14
3
A
4
B
5
C
6
D
7
E
8
F
9
G
10
H
1
2
11
23
14
3
A
4
B
5
C
6
D
7
E
8
F
9
G
10
H
CTRDIV 256
0
1
G4
G5
2,6D
0
1
G4
G5
2,6D
0
M
3
C6/1,4,5–/3,4,5+
0R
SN74ALS869
CTRDIV 256
0
M
3
C6/1,4,5–/3,4,5+
0,6R
1,4CT=0
3,4CT=255
1,4CT=0
3,4CT=255
13
22
21
20
19
18
17
16
15
13
22
21
20
19
18
17
16
15
RCO
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
RCO
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
logic symbols (continued)
S0
S1
ENT
ENP
CLK
S0
S1
ENT
ENP
CLK
†
′AS867
1
2
11
23
14
3
A
4
B
5
C
6
D
7
E
8
F
9
G
10
H
1
2
11
23
14
3
A
4
B
5
C
6
D
7
E
8
F
9
G
10
H
CTRDIV 256
0
1
G4
G5
2,6D
0
1
G4
G5
2,6D
0
M
3
C6/1,4,5–/3,4,5+
0R
′AS869
CTRDIV 256
0
M
3
C6/1,4,5–/3,4,5+
0,6R
1,4,5CT=0
3,4,5CT=255
1,4,5CT=0
3,4,5CT=255
13
22
21
20
19
18
17
16
15
13
22
21
20
19
18
17
16
15
RCO
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
RCO
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
CLK
S0
S1
ENP
A
B
C
14
1
2
23
3
4
5
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
SN74ALS867A, SN74ALS869
SN74ALS867A Only
(asynchronous clear)
1D
C1
R
1D
C1
R
1D
C1
R
22
21
20
Q
A
Q
B
Q
C
ENT
1D
6
D
7
E
8
F
9
G
10
H
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
19
18
17
16
15
13
Q
D
Q
E
Q
F
Q
G
Q
H
RCO
11
Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
logic diagram (positive logic)
′AS867, ′AS869
1
S0
S1
ENT
ENP
CLK
2
′AS867 Only
(asynchronous clear)
11
23
13
RCO
14
22
Q
21
20
19
A
Q
B
Q
C
Q
D
3
A
4
B
5
C
6
D
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
7
E
8
F
9
G
10
H
Pin numbers shown are for the DW, JT, and NT packages.
18
Q
E
1D
C1
R
17
Q
F
1D
C1
R
16
Q
G
1D
C1
R
15
Q
H
1D
C1
R
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
typical clear, preset, count, and inhibit sequences
The following sequence is illustrated below:
1. Clear outputs to zero (SN74ALS867A and ′AS867 are asynchronous;
SN74ALS869 and ′AS869 are synchronous.)
2. Preset to binary 252
3. Count up to 253, 254, 255, 0, 1, and 2
4. Count down to 1, 0, 255, 254, 253, and 252
5. Inhibit
S0
S1
A
B
C
SN54AS867, SN54AS869
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
Data
Inputs
Outputs
CLK
ENP
ENT
Q
Q
Q
Q
Q
Q
Q
Q
D
E
F
G
H
A
B
C
D
E
F
G
H
RCO
Sync
252 253 255254 255 254 253 25201210
Clear
Async
†
ENT
and ENP both must be low for counting to occur.
Preset
Clear
Count Up Inhibit
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Count Down
†
7
SN54AS867, SN54AS869
UNIT
t
Hold ti
CLK↑
ns
PARAMETER
TEST CONDITIONS
UNIT
VOLV
4.5 V
V
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN74ALS867A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
recommended operating conditions
SN74ALS867A
MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w(clock)
t
w(clear)
t
su
h
T
A
Supply voltage 4.5 5 5.5 V
High-level input voltage 2 V
Low-level input voltage 0.8 V
High-level output current –0.4 mA
Low-level output current 8 mA
Clock frequency 0 35 MHz
Pulse duration, CLK high or low 14 ns
Pulse duration of clear pulse, S0 and S1 low 10 ns
Data inputs A–H 10
ENP or ENT 15
Setup time before CLK↑
me after
Operating free-air temperature 0 70 °C
S0 low and S1 high (load)
S0 high and S1 low (count down) 12
S0 and S1 high (count up) 12
S0 high after S1↑ or S1 high after S0↑ 3
Data inputs A–H 0
12
ns
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS867A
MIN TYP‡MAX
V
IK
V
OH
I
I
I
IH
I
IL
§
I
O
I
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
CC
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 V
=
CC
VCC = 5.5 V, VI = 7 V 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 µA
VCC = 5.5 V, VI = 0.4 V –0.2 mA
VCC = 5.5 V, VO = 2.25 V –30 –112 mA
VCC = 5.5 V 28 45 mA
IOL = 4 mA 0.25 0.4
IOL = 8 mA 0.35 0.5
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS867, SN54AS869
(
)
(
)
(INPUT)
(OUTPUT)
CLK
RCO
ns
CLK
Any Q
ns
ENT
RCO
ns
RCO
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PLH
t
PHL
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLH
FROM
INPUT
S0 or S1 (clear mode) Any Q 8 26 ns
S0 or S1
(count up/down)
S0 or S1 (clear mode) RCO 4 16 ns
TO
OUTPUT
RL = 500 Ω,
TA = MIN to MAX
SN74ALS867A
†
MIN MAX
35 MHz
4 14
4 14
3 16
3 16
3 14
2 9
4 16
4 16
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
SN54AS867, SN54AS869
UNIT
t
S
CLK↑
ns
t
Hold ti
CLK↑
ns
PARAMETER
TEST CONDITIONS
UNIT
VOLV
V
V
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN74ALS869 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
recommended operating conditions
SN74ALS869
MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w(clock)
su
h
T
A
Supply voltage 4.5 5 5.5 V
High-level input voltage 2 V
Low-level input voltage 0.8 V
High-level output current –0.4 mA
Low-level output current 8 mA
Clock frequency 0 35 MHz
Pulse duration, CLK high or low 14 ns
Data inputs A–H 10
ENP or ENT 15
etup time before
me after
Operating free-air temperature 0 70 °C
S0 and S1 low (clear) 13
S0 low and S1 high (load) 13
S0 high and S1 low (count down) 13
S0 and S1 high (count up) 13
S0 high after S1↑ or S1 high after S0↑ 3
Data inputs A–H 0
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS869
MIN TYP‡MAX
V
IK
V
OH
I
I
I
IH
I
IL
§
I
O
I
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
CC
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 V
= 4.5
CC
VCC = 5.5 V, VI = 7 V 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 µA
VCC = 5.5 V, VI = 0.4 V –0.2 mA
VCC = 5.5 V, VO = 2.25 V –30 –112 mA
VCC = 5.5 V 28 45 mA
IOL = 4 mA 0.25 0.4
IOL = 8 mA 0.35 0.5
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS867, SN54AS869
(
)
(
)
(INPUT)
(OUTPUT)
CLK
RCO
ns
CLK
Any Q
ns
ENT
RCO
ns
RCO
ns
RCO
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PHL
FROM
INPUT
S1
(count up/down)
S0
(clear/load)
TO
OUTPUT
RL = 500 Ω,
TA = MIN to MAX
†
SN74ALS869
MIN MAX
35 MHz
4 14
4 14
3 16
3 16
3 14
2 9
4 15
4 15
4 16
4 12
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
11
SN54AS867, SN54AS869
UNIT
tsu*
S
CLK↑
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54AS867 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74AS867 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
SN54AS867 SN74AS867
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w(clock)
t
w(clear)
*
th* Hold time after CLK↑ Data inputs A–H 0 0 ns
t
skew
T
A
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –2 –2 mA
Low-level output current 20 20 mA
* Clock frequency 0 40 0 50 MHz
* Pulse duration, CLK high or low 12.5 10 ns
* Pulse duration of clear pulse, S0 and S1 low 12.5 10 ns
Data inputs A–H 5 4
ENP or ENT 9 8
etup time before
Skew time between S0 and S1
*
(maximum to avoid inadvertent clear)
Operating free-air temperature –55 125 0 70 °C
S0 low and S1 high (load) 11 10
S0 and S1 low (clear) 11 10
S0 high and S1 low (count down) 42 40
S0 and S1 high (count up) 42 40
8 7 ns
†
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS867, SN54AS869
PARAMETER
TEST CONDITIONS
UNIT
OL
CC
I
V
5.5 V
V
2.7 V
A
I
V
V
V
mA
(
)
(
)
(INPUT)
(OUTPUT)
CLK
RCO
ns
CLK
Any Q
ns
ENT
RCO
ns
ENP
RCO
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS867 SN74AS867
MIN TYP†MAX MIN TYP†MAX
V
IK
V
OH
V
I
I
IH
IL
I
O
I
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
RCO
Other outputs
ENT
Other inputs
ENT
Other inputs
‡
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VCC –2 V
IOL = 20 mA,
V
= 4.5 V
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
,
=
CC
= 5.5 V,
CC
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
VCC = 5.5 V 134 195 134 195 mA
VIL on ENT
IOL = 20 mA 0.34 0.5
=
I
= 0.4
I
= 0.7 V
0.34 0.5
40 40
20 20
–4 –4
–2 –2
V
µ
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
* 40 50 MHz
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
FROM
INPUT
Clear (S0 or S1 low) Any Q 7 23 7 21 ns
TO
OUTPUT
RL = 500 Ω,
TA = MIN to MAX
SN54AS867 SN74AS867
MIN MAX MIN MAX
5 31 5 22
6 19 6 16
3 12 3 11
4 16 4 15
3 19 3 10
5 21 5 17
5 16 5 14
5 21 5 17
§
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
13
SN54AS867, SN54AS869
UNIT
tsu*
S
CLK↑
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54AS869 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74AS869 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
SN54AS869 SN74AS869
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
t
w(clock)
*
th* Hold time after CLK↑ Data inputs A–H 0 0 ns
T
A
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –2 –2 mA
Low-level output current 20 20 mA
* Clock frequency 40 45 MHz
* Pulse duration, CLK high or low 12.5 11 ns
Data inputs A–H 6 5
ENP or ENT 10 9
etup time before
Operating free-air temperature –55 125 0 70 °C
S0 low and S1 high (load) 13 11
S0 and S1 low (clear) 13 11
S0 high and S1 low (count down) 52 50
S0 and S1 high (count up) 52 50
†
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS867, SN54AS869
PARAMETER
TEST CONDITIONS
UNIT
V
V
OL
CC
I
V
V
V
A
I
V
5.5 V
V
0.4 V
mA
(
)
(
)
(INPUT)
(OUTPUT)
CLK
RCO
ns
CLK
Any Q
ns
ENT
RCO
ns
ENP
RCO
ns
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS869 SN74AS869
MIN TYP†MAX MIN TYP†MAX
V
IK
OH
V
I
I
IH
IL
I
O
I
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
RCO
Other outputs
ENT
Other inputs
ENT
Other inputs
‡
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2
VCC = 4.5 V, IOH = –2 mA VCC –2*
IOL = 20 mA,
V
= 4.5 V
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
= 5.5 V,
CC
,
=
CC
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
VCC = 5.5 V 134 195 134 195 mA
VIL on ENT
IOL = 20 mA 0.34 0.5
= 2.7
I
=
I
= 0.7 V
0.34 0.5
40 40
20 20
–4 –4
–2 –2
V
µ
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
* 40 45 MHz
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
FROM
INPUT
TO
OUTPUT
RL = 500 Ω,
TA = MIN to MAX
SN54AS869 SN74AS869
MIN MAX MIN MAX
6 35 6 35
6 20 6 18
3 12 3 11
4 16 4 15
3 25 3 15
6 21 6 17
5 27 5 19
6 21 6 18
§
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
15
SN54AS867, SN54AS869
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
SDAS115C – DECEMBER 1982 – REVISED JANUAR Y 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
V
CC
R
L
From Output
Under Test
(see Note A)
C
L
Test
Point
R
L
From Output
Under Test
C
(see Note A)
Test
Point
L
From Output
Under Test
(see Note A)
7 V
RL = R1 = R2
S1
R1
C
L
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 1998, Texas Instruments Incorporated
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