Texas Instruments JM38510-38201BRA, JM38510-38201B2A, SN54AS573AJ, SN54ALS573CJ, SN74ALS573CDBLE Datasheet
...
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• True Logic Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
description
These octal D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs
(Q) respond to the data (D) inputs. When LE is low,
the outputs are latched to retain the data that was
set up.
A buffered output-enable (OE
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
) input can be used
SN54ALS573C, SN54AS573A ...J OR W PACKAGE
SN74ALS573C, SN74AS573A . . . DW OR N PACKAGE
SN54ALS573C, SN54AS573A . . . FK PACKAGE
3D
4D
5D
6D
7D
(TOP VIEW)
OE
1
1D
2
2D
3
3D
4
4D
5
5D
6
6D
7
7D
8
9
8D
GND
10
(TOP VIEW)
2D1DOE
3212019
4
5
6
7
8
910111213
8D
LE
20
19
18
17
16
15
14
13
12
11
V
8Q
CC
V
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
18
17
16
15
14
7Q 1Q
CC
2Q
3Q
4Q
5Q
6Q
GND
OE
does not affect internal operation of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
The SN54ALS573C and SN54AS573A are characterized for operation over the full military temperature range
of –55°C to 125°C. The SN74ALS573C and SN74AS573A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
INPUTS
OE LE D
L H H H
L HL L
LLX Q
HXX Z
OUTPUT
Q
0
Copyright 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
UNIT
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
logic symbol
OE
LE
1D
2D
3D
4D
5D
6D
7D
8D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
†
1
11
2
3
4
5
6
7
8
9
EN
C1
1D
19
18
17
16
15
14
13
12
logic diagram (positive logic)
1
OE
11
LE
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1D
2
To Seven Other Channels
C1
1D
19
1Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS573C –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS573C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
recommended operating conditions
V
V
V
I
I
t
t
t
T
CC
IH
IL
OH
OL
w
su
h
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –1 –2.6 mA
Low-level output current 12 24 mA
Pulse duration, LE high 25 10 ns
Setup time, data before LE↓ 10 10 ns
Hold time, data after LE↓ 7 7 ns
Operating free-air temperature –55 125 0 70 °C
SN54ALS573C SN74ALS573C
MIN NOM MAX MIN NOM MAX
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
V
V
V
D
Q
ns
LE
Q
ns
OE
Q
ns
OE
Q
ns
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS573C SN74ALS573C
MIN TYP†MAX MIN TYP†MAX
V
IK
V
OH
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
‡
I
O
I
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
= 4.5
CC
= 4.5
CC
VCC = 5.5 V, VO = 2.7 V 20 20 µA
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.13 –0.1 mA
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
VCC = 5.5 V
IOH = –1 mA 2.4 3.3
IOH = –2.6 mA 2.4 3.2
IOL = 12 mA 0.25 0.4 0.25 0.4
IOL = 24 mA 0.35 0.5
Outputs high 10 17 10 17
Outputs low 15 24 15 24
Outputs disabled 16 27 16 27
V
mA
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
TO
(OUTPUT)
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
SN54ALS573C SN74ALS573C
MIN MAX MIN MAX
2 20 2 14
2 17 2 14
8 33 6 20
8 24 6 19
4 28 3 18
4 21 4 18
2 20 1 10
3 26 1 15
,
§
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
UNIT
PARAMETER
TEST CONDITIONS
UNIT
V
4.5 V
V
V
V
V
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54AS573A –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74AS573A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
SN54AS573A SN74AS573A
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
tw* Pulse duration, LE high 5.5 4.5 ns
tsu* Setup time, data before LE↓ 2 2 ns
th* Hold time, data after LE↓ 3 3 ns
T
A
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –12 –15 mA
Low-level output current 32 48 mA
Operating free-air temperature –55 125 0 70 °C
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS573A SN74AS573A
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
§
I
O
I
CC
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VCC –2
=
CC
= 4.5
CC
VCC = 5.5 V, VO = 2.7 V 50 50 µA
VCC = 5.5 V, VO = 0.4 V –50 –50 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.1 –0.5 mA
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
VCC = 5.5 V
IOH = –12 mA 2.4 3.2
IOH = –15 mA 2.4 3.3
IOL = 32 mA 0.28 0.5
IOL = 48 mA 0.33 0.5
Outputs high 56 93 56 93
Outputs low 55 90 55 90
Outputs disabled 65 106 65 106
V
mA
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
D
Q
ns
LE
Q
ns
OE
Q
ns
OE
Q
ns
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
TO
(OUTPUT)
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
SN54AS573A SN74AS573A
MIN MAX MIN MAX
3 11 3 8
3 8 3 7
6 16.5 6 13
4 9 4 7.5
2 8 2 6.5
4 11 4 9.5
2 8 2 6.5
2 8 2 7
,
†
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
V
CC
R
L
From Output
Under Test
(see Note A)
C
L
Test
Point
R
L
From Output
Under Test
C
(see Note A)
Test
Point
L
From Output
Under Test
(see Note A)
7 V
RL = R1 = R2
S1
R1
C
L
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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