![](/html/ce/ce92/ce922f7ae8aa43e58d08edc08026b5401ce5f0d72967cbdf3c16faea4d06a48d/bg1.png)
SN54ACT86, SN74ACT86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCAS534A – AUGUST 1995 – REVISED APRIL 1996
D
Inputs Are TTL-Voltage Compatible
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPS
description
The ’ACT86 are quadruple 2-input exclusive-OR
gates. The devices perform the Boolean functions
Y = A B or Y = AB + AB in positive logic.
A common application is as a true/complement
element. If one of the inputs is low, the other input
is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is
reproduced inverted at the output.
The SN54ACT86 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ACT86 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A B
L L L
L HH
H LH
H H L
OUTPUT
Y
SN54ACT86 ... J OR W PACKAGE
SN74ACT86 ... D, DB, N, OR PW PACKAGE
SN54ACT86 . . . FK PACKAGE
1Y
NC
2A
NC
2B
NC – No internal connection
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
(TOP VIEW)
1B1ANC
3 2 1 20 19
4
5
6
7
8
910111213
2Y
1
2
3
4
5
6
7
GND
NC
14
13
12
11
10
9
8
V
3Y
CC
4B
18
17
16
15
14
3A
V
4B
4A
4Y
3B
3A
3Y
CC
4A
NC
4Y
NC
3B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1996, Texas Instruments Incorporated
1
![](/html/ce/ce92/ce922f7ae8aa43e58d08edc08026b5401ce5f0d72967cbdf3c16faea4d06a48d/bg2.png)
SN54ACT86, SN74ACT86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCAS534A – AUGUST 1995 – REVISED APRIL 1996
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
†
1A
1B
2A
2B
3A
3B
4A
4B
1
2
4
5
9
10
12
13
= 1
3
1Y
6
2Y
8
3Y
11
4Y
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
EXCLUSIVE-OR
= 1
These five equivalent exclusive-OR symbols are valid for an ’ACT86 gate in positive logic; negation may
be shown at any two ports.
LOGIC-IDENTITY ELEMENT EVEN-PARITY ELEMENT ODD-PARITY ELEMENT
= 2k 2k + 1
The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high)
if an odd number of inputs
(i.e., only 1 of the 2) are
active.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265