SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUAR Y 1991 – REVISED MAY 1997
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D
T ypical V
(Output Ground Bounce) < 1 V
OLP
at VCC = 5 V, TA = 25°C
D
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (N)
and Ceramic (JT) DIPs
description
The SN54ABT623A and SN74ABT623 bus
transceivers are designed for asynchronous
communication between data buses. The
control-function implementation allows for
maximum flexibility in timing. The SN54ABT623A
and SN74ABT623 provide true data at their
outputs.
SN54ABT623A . . . JT OR W PACKAGE
SN74ABT623 . . . DB, DW, N, OR PW PACKAGE
SN54ABT623A . . . FK PACKAGE
A3
A4
A5
A6
A7
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
4
5
6
7
8
(TOP VIEW)
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
(TOP VIEW)
A2A1OEAB
3212019
910111213
V
CC
OEBA
18
17
16
15
14
V
CC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
B1
B2
B3
B4
B5
These devices allow data transmission from the
A bus to the B bus or from the B bus to the A bus,
A8
GND
B8
B7
B6
depending on the logic levels at the output-enable
(OEAB and OEBA
) inputs.
The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The
dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB
and OEBA. Each output reinforces its input in this configuration. When both OEAB and OEBA are enabled and
all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain
at their last states.
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sourcing capability of the driver.
The SN54ABT623A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT623 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUAR Y 1991 – REVISED MAY 1997
FUNCTION TABLE
INPUTS
OEBA OEAB
L L B data to A bus
L H
H L Isolation
H H A data to B bus
B data to A bus,
A data to B bus
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OEBA
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
19
1
2
3
4
5
6
7
8
9
EN1
EN2
121
1
logic diagram (positive logic)
OEBA
OEAB
19
1
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
2
218
A1
To Seven Other Channels
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
B1
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUAR Y 1991 – REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABT623A 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
SN74ABT623 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(V
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(see Note 2): DB package 115°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 3)
SN54ABT623A SN74ABT623
MIN MAX MIN MAX
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate Outputs enabled 5 5 ns/V
T
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
Supply voltage 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 V
I
High-level output current –24 –32 mA
Low-level output current 48 64 mA
Operating free-air temperature –55 125 –40 85 °C
A
CC
0 V
CC
V
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3