Texas Instruments SN75LBC978DL, SN75LBC978DLR Datasheet

SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface (SCSI)
D
Meets or Exceeds the Requirements of ANSI Standard RS-485 and ISO 8482:1987(E)
D
Packaged in Shrink Small-Outline Package With 25-mil Terminal Pitch
D
Designed to Operate at 10 Million Transfers Per Second
D
Low Disabled Supply Current
1.4 mA Typ
D
Thermal Shutdown Protection
D
Power-Up/Power-Down Glitch Protection
D
Positive and Negative Output-Current Limiting
D
Open-Circuit Fail-Safe Receiver Design
description
The SN75LBC978 is a nine-channel differential transceiver based on the 75LBC176 LinASIC cell. Use of TI’s LinBiCMOS
process technolo­gy allows the power reduction necessary to integrate nine differential balanced transceivers
. On-chip enabling logic makes this device applicable for the data path (eight data bits plus parity) and the control path (nine bits) for the Small Computer Systems Interface (SCSI) standard. The WRAP function allows in-circuit testing and wired-OR channels for the BSY, RST, and SEL signals of the SCSI bus.
The SN75LBC978 is packaged in a shrink small-outline package (DL) with improved thermal characteristics using heat-sink terminals. This package is ideal for low-profile, space-restricted applications such as hard disk drives.
The switching speed of the SN75LBC978 is sufficient to transfer data over the data bus at 10 million transfers per second. Each of the nine identical channels conforms to the requirements of the ANSI RS-485 and ISO 8482:1987(E) standards referenced by ANSI X3.131-1993 (SCSI-2) and the proposed SCSI-3 standards.
The SN75LBC978 is characterized for operation from 0°C to 70°C.
LinASIC and LinBiCMOS are trademarks of Texas Instruments Incorporated.
Patent Pending
Copyright 1997, T exas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
NC WRAP2 WRAP1
1A
1DE/RE
2A
2DE/RE
3A
3DE/RE
4A
4DE/RE
V
CC
GND GND GND GND GND
V
CC
5A
5DE/RE
6A
6DE/RE
7A
7DE/RE
8A
8DE/RE
9A
9DE/RE
NC NC CE 9B+ 9B– 8B+ 8B– 7B+ 7B– 6B+ 6B– V
CC
GND GND GND GND GND V
CC
5B+ 5B– 4B+ 4B– 3B+ 3B– 2B+ 2B– 1B+ 1B–
DL PACKAGE
(TOP VIEW)
Pins 13 through 17 and 40 through 44 are connected together to the package lead frame and signal ground.
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic)
1B–
1B+
7B–
7B+
2B–
2B+
3B–
3B+
4B–
4B+
5B–
5B+
6B–
6B+
8B–
8B+
9B–
9B+
1A
WRAP1
CE
1DE/RE
2A
2DE/RE
3A
3DE/RE
4A
4DE/RE
5A
5DE/RE
6A
6DE/RE
8A
8DE/RE
9A
9DE/RE
7DE/RE
7A
WRAP2
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 8
Channel 9
4 3
5
54
6 7 8 9
10 11
19 20
21 22
23
2
24
25 26
27 28
30 29
32 31
34 33
36 35
38 37 47 46
49 48
51 50 53 52
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematics of inputs and outputs
ALL INPUTS EXCEPT CE INPUT CE
B+ AND B– I/O PORTS RECEIVER OUTPUT
A Output
100 k B+ Only
100 k B– Only
18 k
12 k
1 k
V
CC
Driver
Receiver
3 k
B+ or B–
Input
V
CC
22 k
50 k
300
Input
V
CC
300
V
CC
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
(see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus voltage range –10 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data I/O and control (A-side) voltage range –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous power dissipation internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are dc and with respect to GND.
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
CC
4.75 5 5.25 V
p
12
Voltage at any bus terminal (separately or common-mode), V
O
,
V
I
, or
V
IC
B
+ or B–
–7
V
High-level input voltage, V
IH
All except B+ and B– 2 V
Low-level input voltage, V
IL
All except B+ and B– 0.8 V
p
B+ or B– –60 mA
High-level output current, I
OH
A –8 mA
p
B+ or B– 60 mA
Low-level output current, I
OL
A 8 mA
Operating free-air temperature, T
A
0 70 °C
device electrical characteristics over recommended ranges of operating conditions
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
p
A, WRAP, DE/RE
–200 µA
IIHHigh-level input current
CE
V
IH
= 2
V
100 µA
p
A, WRAP, DE/RE
See Figure 1
–200 µA
IILLow-level input current
CE
V
IL
= 0.8
V
100 µA
All drivers and receivers disabled
CE at 0 V 1.4 3 mA
I
CC
Supply current
All receivers enabled
No load, CE at 5 V,
VID = 5 V, WRAP and DE/RE
at 0 V
29 45 mA
All drivers enabled
No load, WRAP at 0 V
CE and DE/RE at 5 V,
7 10 mA
COBus port output capacitance B+ or B– 19 pF
p
p
One driver 460 pF
C
pd
Power dissipation capacitance
One receiver 40 pF
driver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOD| Differential output voltage V
test
= –7 V to 12 V , See Figure 2 1 2 V
I
OS
Output short-circuit current See Figure 3 ±250 mA
I
OZ
High-impedance-state output current See receiver input current
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
receiver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) (see Figure 3)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
OH
High-level output voltage VID = 200 mV , IOH = –8 mA 2.5 V
V
OL
Low-level output voltage VID = –200 mV, IOL = 8 mA 0.8 V
V
IT+
Differential-input high-level threshold voltage IOH = –8 mA 0.2 V
V
IT–
Differential-input low-level threshold voltage IOL = 8 mA –0.2 V
V
hys
Receiver input hysteresis voltage (V
IT+
– V
IT–
) 45 mV
VI = 12 V, Other input at 0 V
VCC = 5 V,
0.7 1 mA
p
VI = 12 V, Other input at 0 V
VCC = 0 V,
0.8 1 mA
IIReceiver input current
B+ and B
VI = –7 V, Other input at 0 V
VCC = 5 V,
–0.5 –0.8 mA
VI = –7 V, Other input at 0 V
VCC = 0 V,
–0.4 –0.8 mA
p
p
VO = GND –200
IOZHigh-impedance-state output current
VO = V
CC
50
µ
A
driver switching characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN
TYP
MAX UNIT
See Figure 4 11.8 26.4
t
d(OD)
Differential delay time, high- to low-level output (t
d(ODH)
) or low-
-
p
VCC = 5 V, See Figure 4
TA = 25°C,
14 18 22
ns
()
to high-level out ut (t
d(ODL)
)
VCC = 5 V, See Figure 4
TA = 70°C,
18 22 26
Skew limit, the maximum difference in propagation delay times
15
t
sk(lim)
,gy
between any two drivers on any two devices
VCC = 5 V,
See Note 2 8
ns
t
sk(p)
Pulse skew (|t
d(ODL)
– t
d(ODH)
|)
0 6 ns
t
t
Transition time (tr or tf)
See Figure 4
10 ns
receiver switching characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
See Figure 5
19.5 30.7
t
pd
Propagation delay time, high- to low-level output (t
PHL
) or low- to
-
p
VCC = 5 V, See Figure 5
TA = 25°C,
20.2 24.7 29.2 ns
high-level out ut (t
PLH
)
VCC = 5 V, See Figure 5
TA = 70°C,
21.1 25.6 30.1
Skew limit, the maximum difference in propagation delay times
12
t
sk(lim)
,gy
between any two drivers on any two devices
VCC = 5 V,
See Note 2 9
ns
t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|)
2 6 ns
t
t
Transition time (tr or tf)
See Figure 5
3 ns
All typical values are at VCC = 5 V, TA = 25°C.
Cpd determines the no-load dynamic current consumption; IS = Cpd VCC f + ICC.
NOTE 2: This specification applies to any 5°C band within the operating temperature range.
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
transceiver switching characteristics over recommended ranges of operating conditions
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
en(TXL)
Enable time, transmit-to-receive to low-level output 80 ns
t
en(TXH)
Enable time, transmit-to-receive to high-level output
80 ns
t
en(RXL)
Enable time, receive-to-transmit to low-level output
See Figure 6
150 ns
t
en(RXH)
Enable time, receive-to-transmit to high-level output 150 ns
t
su
Setup time, WRAP1 or WRAP2 before active input(s) or output(s) 150 ns
thermal characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R
θJA
Junction-to-free-air thermal resistance Board mounted, No air flow 50 °C/W
R
θJC
Junction-to-case thermal resistance 12 °C/W
PARAMETER MEASUREMENT INFORMATION
V
test
RL = 75
V
test
V
OD
B+
B–
A
0 V or 3 V
CE and DE/RE
at 2 V, WRAP1 and WRAP2 at 0.8 V
R1 = 165
R2 = 165
Figure 1. Driver VOD Test Circuit
B+
A
V
IT+,
V
IT–
,
or
V
ID
V
OH or
V
OL
–IOH, –IOL, or –I
OZ
–II,
–IIH,
or
–I
IL
VI, VIC,
VIH,
or
V
IL
CE at 2 V, DE/RE
and WRAP1 or WRAP2 at 0.8 V (see Note A)
B–
NOTE A: For the IOZ measurement, CE is at 0.8 V .
Figure 2. Receiver Test Circuit and Input Conditions
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
CE and DE/RE
at 2 V, WRAP1 and WRAP2 at 0.8 V (see Note A)
A
B+ B–
V
OD
V
IH
or
V
IL
–I
IH
or
–I
IL
–IOH, –IOL, –IOS, or –I
OZ
VO,
VOH,
or
V
OL
NOTE A: For the IOZ test, the CE input is at 0.8 V .
Figure 3. Driver Test and Input Conditions
GND
RL = 75
50 pF
Output
B+
B–
A
Input
(see Note A)
CE and
DE/RE
at V
CC
5 V
Input
Output
t
d(ODH)
t
d(ODL)
3 V
1.5 V 0 V
90% 90%
0 V
10%10%
t
r
t
f
R1 = 165
R2 = 165
TEST CIRCUIT
VOLTAGE WAVEFORMS
50 pF
Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V , PRR of 1 MHz, 50% duty cycle,
tr and tf < 6 ns, and ZO = 50 .
Figure 4. Driver Propagation Delay Time Test Circuit and Waveforms
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Input
Output
t
PLH
t
PHL
3 V
1.5 V 0 V
V
OH
1.4 V V
OL
90% 90%
10% 10%
t
r
t
f
CE at VCC,
DE/RE
, WRAP1 and
WRAP2 at GND
B–1.5 V
Input
(see Note A)
A
15 pF
Output
TEST CIRCUIT
VOLTAGE WAVEFORMS
B+
Includes probe and jig capacitance.
NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V , PRR
of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 .
Figure 5. Receiver Propagation Delay Time Test Circuit and Waveforms
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
0 V 3 V
S3
74HC241
A
DE/RE
Input
(see Note A)
V
A
CE at VCC,
WRAP1 and WRAP2
at GND
B+
B–
50 pF
50 pF
S1
0 V 5 V
R1 = 165
75
R2 = 165
5 V 0 V
V
OD
S2
Input
V
A
V
OD
Input
V
A
V
OD
3 V
0 V
t
en(RXL)
1.4 V
t
en(TXH)
0 V
3 V
0 V
t
en(RXH)
1.4 V
0 V
t
en(TXL)
S1 to 0 V S2 to 5 V S3 to 3 V
S1 to 5 V S2 to 0 V S3 to 0 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V , PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns,
and ZO = 50 .
Figure 6. Enable Time Test Circuit and Voltage Waveforms
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
400
100
10
4
1
1000
40
0.001 0.004 0.01 0.04 1 4 10
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
f – Frequency – MHz
– Average Supply Current – mA
CC
I
2
9 Unloaded Receivers
9 Unloaded Drivers
Figure 7
– 30
– 40
– 50
– 60
0 0.5 1 1.5 2 2.5 3
– 20
–10
0
3.5 4 4.5
AµI
I
– Input Current –
VI – Input Voltage – V
INPUT CURRENT
vs
INPUT VOLTAGE
VCC = 4.75 V TA = 25°C A, DE/RE
, WRAP1, WRAP2
Figure 8
0
–1
– 3 – 4 – 5
4
– 2
– 20 –16 –12 – 8 – 4 0 4
2
1
3
INPUT CURRENT
vs
INPUT VOLTAGE
5
8 121620
VI – Input Voltage – V
I
I
– Input Current – mA
VCC = 4.75 V TA = 25°C B+ and B–
Figure 9
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
1.6
1.5
1.3
1.2
1.1
2
1.4
0 102030405060
1.8
1.7
1.9
2.1
70 80 90 100
V
OL
– Low-Level Output Voltage – V
IOL – Low-Level Output Current – mA
DRIVER
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VCC = 5 V B+ and B–
Figure 10
DRIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
3.75
3.5
3
2.75
2.5
4.75
3.25
0 102030405060
4.25
4
4.5
5
70 80 90
V
OH
– High-Level Output Voltage – mV
IOH – High-Level Output Current – mA
VCC = 5 V
VCC = 5.25 V
VCC = 4.75 V
B+ and B–
Figure 11
2
1
0
0 102030405060
3
4
5
70 80 90 100
– Differential Output Voltage – V
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
IO – Output Current – mA
OD
V
TA = 25°C
VCC = 5 V
VCC = 5.25 V
VCC = 4.75 V
Figure 12
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 13
50
40
20
10
0
30
2 2.5 3 3.5 4 4.5 5
70
60
80
DRIVER
LOW-LEVEL OUTPUT CURRENT
vs
SUPPLY VOLTAGE
5.5
VCC – Supply Voltage – V
I
OL
– Low-Level Output Current – mA
B+ and B–
– 40
DRIVER
HIGH-LEVEL OUTPUT CURRENT
vs
SUPPLY VOLTAGE
VCC – Supply Voltage – V
I
OH
– High-Level Output Current – mA
B+ and B–
– 30
– 60
– 70
– 80
– 50
–10
– 20
0
2 2.5 3 3.5 4 4.5 5 5.5
Figure 14
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH – High-Level Output Current – mA
V
OH
– High-Level Output Voltage – V
2.5 2
1
0.5 0
4.5
1.5
0 –10 – 20 – 30 – 40 – 50 – 60
3.5 3
4
5
–70
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
5.5
Figure 15
RECEIVER
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL – Low-Level Output Current – mA
V
OL
– Low-Level Output Voltage – V
2
1
0.5
0
1.5
0 102030405060
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
Figure 16
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
0.4
0.2
0
160 165 170
0.6
0.8
1
– Differential Output Voltage – V
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
OD
V
175
B+ and B–
Figure 18
26
RECEIVER
PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
t
pd
– Propagation Delay Time – ns
VCC = 4.75 V
26.5
25
24.5
24
25.5
010203040506070
VCC = 5.25 V
TA – Free-Air Temperature – °C
19
DRIVER
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
t
pd
– Propagation Delay Time – ns
VCC = 4.75 V
20
17
16
15
18
010203040506070
VCC = 5.25 V
TA – Free-Air Temperature – °C
22
23
21
Figure 19
SN75LBC978 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
function tables
Table 1. Channel Configuration for
T otem Pole Circuit
B–
B+
A
DE/RE
CE is high,
WRAP1 or WRAP2 is low
Totem Pole
INPUTS OUTPUTS
L
L H H
DE/RE
B+
L H X X
H L X X
B–
AB+
L
H
Z Z
Z Z L H
Z Z H L
B–
A
X X L
H
H = high level L = low level X = irrelevant Z = high impedance
An H in this column represents a voltage 200 mV higher than the other bus input. An L represents a voltage 200 mV lower than the other bus input. Any voltage less than 200 mV results in an indeterminate receiver output.
Table 2. Channel Configuration for
Emitter Follower Circuit
CE is high,
WRAP1 or WRAP2 is high
Emitter Follower
B–
B+
A
DE/RE
Open Collector
INPUTS OUTPUTS
L
L H H
DE/RE
B+
L
H
X X
H L X X
B–
AB+
L H H H
Z
Z H H
Z Z L L
B–
H = high level L = low level X = irrelevant Z = high impedance
SN75LBC978
9-CHANNEL DIFFERENTIAL TRANSCEIVER
SLLS134E – APRIL 1992 – REVISED MA Y 1997
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MECHANICAL INFORMATION
DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040048/C 03/97
48 PIN SHOWN
56
0.730
(18,54)
0.720
(18,29)
4828
0.370
(9,40)
(9,65)
0.380
Gage Plane
DIM
0.420 (10,67)
0.395 (10,03)
A MIN
A MAX
0.006 (0,15) NOM
PINS **
0.630
(16,00)
(15,75)
0.620
0.010 (0,25)
Seating Plane
0.020 (0,51)
0.040 (1,02)
25
24
0.008 (0,203)
0.012 (0,305)
48
1
0.008 (0,20) MIN
A
0.110 (2,79) MAX
0.299 (7,59)
0.291 (7,39)
0.004 (0,10)
M
0.005 (0,13)
0.025 (0,635)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-118
IMPORTANT NOTICE
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Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (“Critical Applications”).
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Copyright 1998, Texas Instruments Incorporated
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