Texas Instruments SN75C189D, SN75C189DR, SN75C189N, SN75C189NS, SN75C189AD Datasheet

SN75C189, SN75C189A

QUADRUPLE LOW-POWER LINE RECEIVERS

SLLS041G – OCTOBER 1988 – REVISED JANUARY 2000

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Meet or Exceed the Requirements of
TIA/EIA-232-F and ITU Recommendation
V.28

D

Low Supply Current ...420 µA Typ

D

Preset On-Chip Input Noise Filter

D

Built-in Input Hysteresis

D

Response and Threshold Control Inputs

D

Push-Pull Outputs

D

Functionally Interchangeable and
Pin-to-Pin Compatible With
T exas Instruments SN75189/SN75189A and
Motorola MC1489/MC1489A

D

Package Options Include Plastic
Small-Outline (D) and Shrink Small-Outline
(DB) Packages, and Standard Plastic (N)
DIP

description

The SN75C189 and SN75C189A are low-power , bipolar, quadruple line receivers that are used to interface data
terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices have been designed
to conform to TIA/EIA-232-F.

The SN75C189 has a 0.33-V typical hysteresis, compared with 0.97 V for the SN75C189A. Each receiver has
provision for adjustment of the overall input threshold levels. This is achieved by choosing external series
resistors and voltages to provide bias levels for the response-control pins. The output is in the high logic state
if the input is open circuit or shorted to ground.

These devices have an on-chip filter that rejects input pulses of less than 1-µs duration. An external capacitor
can be connected from the control pins to ground to provide further input noise filtering for each receiver.

The SN75C189 and SN75C189A have been designed using low-power techniques in a bipolar technology . In
most applications, these receivers interface to single inputs of peripheral devices such as UARTs, ACEs, or
microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of
the input signals. If this is not the case, or for other uses, it is recommended that the SN75C189 and SN75C189A
outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN75C189 and SN75C189A are characterized for operation from 0°C to 70°C.

Copyright  2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1
2
3
4
5
6
7

14
13
12
11
10

9
8

1A

1 CONT

1Y
2A

2 CONT

2Y

GND

V

CC

4A
4 CONT
4Y
3A
3 CONT
3Y

D, DB, OR N PACKAGE

(TOP VIEW)

SN75C189, SN75C189A
QUADRUPLE LOW-POWER LINE RECEIVERS

SLLS041G – OCTOBER 1988 – REVISED JANUARY 2000

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

1

1A

2

1 CONT

4

2A

5

2 CONT

10

3A

9

3 CONT

13

4A

12

4 CONT

1Y

3

2Y

6

3Y

8

4Y

11

THRESHOLD

ADJUST

logic diagram (each receiver)

Response

Control

A

Y

schematic of inputs and outputs

ESD

Protection

Input

3.4 kΩ

1.5 kΩ

530 Ω

V

CC

Output

EQUIVALENT OF EACH INPUT

‡

EQUIVALENT OF EACH OUTPUT

Response

Control

ESD

Protection

‡

All resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

§

Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI –30 V to 30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, V

O

–0.3 V to VCC+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

§

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to network GND.

2. The package thermal impedance is calculated in accordance with JESD 51.

SN75C189, SN75C189A

QUADRUPLE LOW-POWER LINE RECEIVERS

SLLS041G – OCTOBER 1988 – REVISED JANUARY 2000

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions

MIN NOM MAX UNIT

V

CC

Supply voltage 4.5 5 6 V

V

I

Input voltage (see Note 3) –25 25 V

I

OH

High-level output current –3.2 mA

I

OL

Low-level output current 3.2 mA
Response-control current ±1 mA

T

A

Operating free-air temperature 0 70 °C

NOTE 3: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic

levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage.

electrical characteristics over recommended free-air temperature range, VCC = 5 V ±10% (unless
otherwise noted) (see Note 4)

PARAMETER TEST CONDITIONS MIN

TYP

†

MAX UNIT

p

’C189

1 1.5

V

IT+

Positive-going input threshold voltage

’C189A

See Figure 1

1.6 2.25

V

p

’C189

0.75 1.25

V

IT–

Negative-going input threshold voltage

’C189A

See Figure 1

0.75 1 1.25

V

p

’C189

0.15 0.33

V

hys

Input hysteresis voltage (V

IT+

–

V

IT–

)

’C189A

See Figure 1

0.65 0.97

V

V

= 4.5 V to 6 V, V

= 0.75 V ,

p

CC

,

IOH = –20 µA

I

,

3.5

VOHHigh-level output voltage

VCC = 4.5 V to 6 V,
IOH = –3.2 mA

VI = 0.75 V ,

2.5

V

p

V

= 4.5 V to 6 V, V

= 3 V,

VOLLow-level output voltage

CC

,

IOL = 3.2 mA

I

,

0.4 V

p

VI = 25 V 3.6 8.3

IIHHigh-level input current

See Figure 2

VI = 3 V 0.43 1

mA

p

VI = –25 V –3.6 –8.3

IILLow-level input current

See Figure 2

VI = –3 V –0.43 –1

mA

I

OS

Short-circuit output current See Figure 3 –35 mA

I

CC

Supply current

VI = 5 V,
See Figure 2

No load,

420 700 µA

†

All typical values are at TA = 25°C.

NOTE 4: All characteristics are measured with response-control terminal open.

switching characteristics, VCC = 5 V ±10%, TA = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

PLH

Propagation delay time, low- to high-level output 6 µs

t

PHL

Propagation delay time, high- to low-level output 6 µs

t

TLH

Transition time, low- to high-level output

‡

RL = 5 kΩ, CL = 50 pF, See Figure 4

500 ns

t

THL

Transition time, high- to low-level output

‡

300 ns

t

w(N)

Duration of longest pulse rejected as noise

§

1 6 µs

‡

Measured between 10% and 90% points of output waveform

§

The receiver ignores any positive- or negative-going pulse that is less than the minimum value of t

w(N)

and accepts any postive- or negative-going

pulse greater than the maximum of t

w(N)

.

SN75C189, SN75C189A
QUADRUPLE LOW-POWER LINE RECEIVERS

SLLS041G – OCTOBER 1988 – REVISED JANUARY 2000

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Open Unless

Otherwise Specified

C

C

–V

C

R

C

V

C

R

C

Response

Control

VIT, V

1

V

CC

I

OL

–I

OH

NOTE A: Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

V

OL

V

OH

Figure 1. VT+, V

IT–

, VOH, V

OL

–I

IL

V

I

I

IH

V

CC

I

CC

Open

NOTE A: Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

Response Control

Open

Figure 2. IIH, IIL, I

CC

–I

OS

NOTE A: Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

V

CC

Response Control

Open

Figure 3. I

OS