SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
D
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU Recommendation
DW OR N PACKAGE
(TOP VIEW)
V.28
D
Single Chip With Easy Interface Between
UART and Serial-Port Connector
D
Less Than 9-mW Power Consumption
D
Wide Driver Supply Voltage . . . 4.5 V to
13.2 V
D
Driver Output Slew Rate Limited to
30 V/µs Max
D
Receiver Input Hysteresis ...1100 mV Typ
D
Push-Pull Receiver Outputs
D
On-Chip Receiver 1-µs Noise Filter
D
Functionally Interchangeable With Texas
V
DD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
Instruments SN75185
D
Operates Up to 120 kbit/s Over a 3-Meter
Cable (See
Conditions)
Application Information
for
description
The SN75C185 is a low-power BiMOS device containing three independent drivers and five receivers that are
used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). Typically, the
SN75C185 replaces one SN75188 and two SN75189 devices. This device conforms to TIA/EIA-232-F. The
drivers and receivers of the SN75C185 are similar to those of the SN75C188 and SN75C189A, respectively.
The drivers have a controlled output slew rate that is limited to a maximum of 30 V/µs, and the receivers have
filters that reject input noise pulses that are shorter than 1 µs. Both these features eliminate the need for external
components.
The SN75C185 uses the low-power BiMOS technology. In most applications, the receivers contained in this
device interface to single inputs of peripheral devices such as ACEs, UARTS, or microprocessors. By using
sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not
the case, or for other uses, it is recommended that the SN75C185 receiver outputs be buffered by single Schmitt
input gates or single gates of the HCMOS, ALS, or 74F logic families.
The SN75C185 is characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2000, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
logic symbol
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
†
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
logic diagram (positive logic)
RY1RA1
RY2RA2
RY3RA3
DA1DY1
DA2DY2
RY4RA4
DA3DY3
RY5RA5
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
equivalent schematics of inputs and outputs
EQUIVALENT DRIVER INPUT EQUIVALENT DRIVER OUTPUT
SN75C185
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
V
DD
V
DD
Input
GND
Input
RA
DA
EQUIVALENT RECEIVER INPUT
ESD
Protection
ESD
Protection
3.4 kΩ
1.5 kΩ
530 kΩ
Internal
1.4-V Ref
to GND
160 Ω
74 Ω
V
SS
EQUIVALENT RECEIVER OUTPUT
72 Ω
Output
V
CC
Output
DY
GND
V
SS
RY
All resistor values are nominal.
GND
GND
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN75C185
VIInput voltage (see Note 3)
V
Drivers
Receivers
IDDSupply current from V
,
A
ISSSupply current from V
,
A
ICCSupply current from V
A
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, VDD (see Note 1) 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, VSS –13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
: Driver VSS to V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD
Receiver –30 V to 30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO: Driver VSS– 6 V to VDD + 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver –0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. The package thermal impedance is calculated in accordance with JESD 51.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions
MIN NOM MAX UNIT
V
DD
Supply voltage
p
V
High-level input voltage
IH
V
Low-level input voltage
IL
I
High-level output current
OH
I
High-level output current
OL
T
Operating free-air temperature 0 70 °C
A
NOTE 3: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage.
V
SS
V
CC
Drivers VSS+2 V
Receivers –25 25
4.5 12 13.2 V
–4.5 –12 –13.2 V
4.5 5 6 V
DD
2 V
0.8 V
–1 mA
3.2 mA
supply currents
4
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
pp
pp
pp
DD
SS
CC
No load,
All inputs at 2 V or 0.8 V
No load,
All inputs at 2 V or 0.8 V
No load
All inputs at 0 or 5 V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VDD = 5 V, VSS = –5 V 115 200
VDD = 12 V, VSS = –12 V 115 200
VDD = 5 V, VSS = –5 V –115 –200
VDD = 12 V, VSS = –12 V –115 –200
VDD = 5 V, VSS = –5 V 750
VDD = 12 V, VSS = –12 V 750
µ
µ
µ
VOHHigh-level output voltage
IL
,
L
,
V
V
g
IH
,
L
,
V
,
I
g
I
,
O O SS,
5–12–19.5
mA
I
I
,
OODD
,
4.51219.5
mA
R
3 kΩ to 7 kΩ
C
2500 pF
SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
DRIVER SECTION
electrical characteristics over operating free-air temperature range, V
= 5 V ±10% (unless otherwise noted)
V
CC
PARAMETER TEST CONDITIONS MIN
V
p
OL
I
IH
I
IL
OS(H)
OS(L)
r
o
†
All typical values are at TA = 25°C.
NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
Low-level output voltage V
(see Note 3)
High-level input current VI = 5 V, See Figure 2 1 µA
Low-level input current VI = 0, See Figure 2 –1 µA
High-level short-circuit V
output current (see Note 4)
Low-level short-circuit V
output current (see Note 4)
Output resistance
levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage.
4. Not more than one output should be shorted at one time.
5. Test conditions are those specified by TIA/EIA-232-F.
= 0.8 V, R
See Figure 1
= 0.8 V, R
See Figure 1
= 0.8 V,
See FIgure 1
= 2 V, V
See Figure 1
VDD = VSS = VCC = 0,
See Note 5
= 3 kΩ,
= 3 kΩ,
VO = 0 or VO = V
= 0 or V
VDD = 5 V, VSS = –5 V 4 4.5
VDD = 12 V VSS = –12 V 10 10.8
VDD = 5 V, VSS = –5 V –4.4 –4
VDD = 12 V VSS = –12 V –10.7 –10
SS
= V
,
VO = – 2 V to 2 V,
= 12 V, VSS = –12 V,
DD
†
TYP
–4.
300 400 Ω
MAX UNIT
switching characteristics, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10%, TA = 25°C (unless otherwise
noted) (see Figure 3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
t
PHL
t
TLH
t
THL
t
TLH
t
THL
S
R
NOTES: 6. t
Propagation delay time,
low- to high-level output (see Note 6)
Propagation delay time,
high- to low-level output (see Note 6)
Transition time, low- to high-level output 0.53 2 3.2 µs
Transition time, high- to low-level output 0.53 2 3.2 µs
Transition time, low- to high-level output (see Note 7)
Transition time, high- to low-level output (see Note 7)
Output slew rate (see Note 7) RL = 3 kΩ to 7 kΩ, CL = 15 pF 4 10 30 V/µs
and t
PHL
7. Measured between 3-V and –3-V points of output waveform TIA/EIA-232-F conditions), and all unused inputs are tied either high
or low.
include the additional time due to on-chip slew rate and are measured at the 50% points.
PLH
RL = 3 kΩ to 7 kΩ, CL = 15 pF
=
L
,
=
L
p
1.2 3 µs
2.5 3.5 µs
1 µs
1 µs
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN75C185
VOHHigh-level output voltage
V
I
V
IIHHigh-level input current
mA
IILLow-level input current
mA
R
C
pF
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
RECEIVER SECTION
electrical characteristics over operating free-air temperature range, V
= 5 V ±10% (unless otherwise noted)
V
CC
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
V
V
V
I
OS(H)
I
OS(L)
†
All typical values are at TA = 25°C.
NOTE 8: If the inputs are left unconnected, the receiver interprets this as an input low, and the receiver outputs remain in the high state.
Positive-going input threshhold
IT+
voltage
Negative-going input threshhold
IT–
voltage
Input hysteresis voltage
hys
(V
– V
IT–
)
p
p
p
IT+
Low-level output voltage VI = 3 V, IOL = 3.2 mA, See Figure 5 0.17 0.4 V
OL
Short-circuit output at high level VI = 0.75 V, VO = 0, See Figure 4 –8 –15 mA
Short-circuit output at low level VI = VCC, VO = VCC, See Figure 4 13 25 mA
See Figure 5 1.6 2.1 2.55 V
See Figure 5 0.65 1 1.25 V
VI = 0.75 V, IOH = –20 µA, See Figure 5 and Note 8 3.5
=
= 0.75 V,
IOH = –1 mA,
See Figure 5
VI = 3 V 0.43 0.55 1
VI = 25 V 3.6 4.6 8.3
VI = –3 V –0.43 –0.55 –1
VI = –25 V –3.6 –5.0 –8.3
VCC = 4.5 V 2.8 4.4
VCC = 5 V 3.8 4.9
VCC = 5.5 V 4.3 5.4
= 12 V, VSS = –12 V,
DD
600 1100 mV
switching characteristics, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10%, TA = 25°C (unless otherwise
noted) (see Figure 6)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
Propagation delay time, low- to high-level output 3 4 µs
PLH
t
Propagation delay time, high- to low-level output
PHL
t
Transition time, low- to high-level output
TLH
t
Transition time, high- to low-level output 100 300 ns
THL
Duration of longest pulse rejected as noise
t
w(N)
(see Note 9)
NOTE 9: The receiver ignores any postive- or negative-going pulse that is less than the minimum value of t
negative-going pulse greater than the maximum of t
w(N)
.
= 5 kΩ,
L
RL = 5 kΩ, CL = 50 pF 1 4 µs
= 50
L
p
w(N)
3 4 µs
300 450 ns
and accepts any positive- or
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
I
OS(L)
VDD or GND
–I
OS(H)
VSS or GND
V
I
V
O
Figure 1. Driver Test Circuit
for VOH, VOL, I
I
IH
OS(H)
RL = 3 kΩ
(for VOH and VOL tests only)
, and I
OS(L)
V
V
Figure 2. Driver Test Circuit for IIH and I
Input
Pulse
Generator
(See Note B)
TEST CIRCUIT VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
R
L
Output
C
L
(see Note A)
Figure 3. Driver Test Circuit and Voltage Waveforms
I
–I
IL
I
IL
3 V
Input
Output
1.5 V 1.5 V
t
PHL
t
THL
90%
50%
10%
10%
50%
t
PLH
90%
t
TLH
0 V
V
V
OH
OL
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
–I
OS(H)
Pulse
Generator
(See Note B)
V
I
Figure 4. Receiver Test Circuit for I
VIT, V
I
V
OL
Figure 5. Receiver Test Circuit for VIT, VOH, and V
Input
Input
Output
C
R
L
TEST CIRCUIT VOLTAGE WAVEFORMS
L
(see Note A)
Output
I
OS(L)
and I
OS(H)
V
I
OL
OH
OS(L)
–I
OH
OL
50% 50%
t
PHL
t
THL
90%
50%
10%
10%
50%
t
PLH
90%
t
TLH
4 V
0 V
V
OH
V
OL
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
Figure 6. Receiver Propagation and Transition Times
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
APPLICATION INFORMATION
10
9
8
7
6
5
4
3
2
1
–12 V
R1
DTR
CTS
TX
RTS
RX
DSR
DCD
5
9
TIA/EIA-232-F
DB9S
Connector
6
1
12 V
TL16C450
ACE
RI
DTR
CTS
SO
RTS
SI
DSR
DCD
43
37
40
13
36
11
41
42
5 V
11
12
13
14
15
16
17
18
19
20
GND
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
V
CC
SN75C185
V
SS
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
V
DD
Figure 7. Typical Connection
The SN75C185 supports data rates up to 120 kbit/s over a 3-meter cable. Laboratory experiments show that,
with CL= 500 pF and R
= 3 kΩ (minimum RS-232 input resistance load), the device can support this data rate.
L
The 500-pF load approximates a typical 3-meter cable because the maximum RS-232 specification is 2500 pF
(or about 15 meters). Figure 8 shows the test circuit used. Temperature was varied from 0°C to 70°C for the
experiment.
V
DD
Input
V
CC
Pulse
Generator
(See Note A)
R
L
C
Output
L
V
SS
NOTES: A. The pulse generator has the following characteristics: PRR = 60 kHz (120 kbit/s), ZO = 50 Ω.
B. VCC = 5 V, VDD = 12 V, VSS = –12 V.
Figure 8. Data-Rate Test Circuit
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
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