Meet or Exceed Standards TIA/EIA-422-B
and ITU Recommendation V.11
D
BiCMOS Process Technology
D
Low Supply-Current Requirements:
9 mA Max
D
Low Pulse Skew
D
Receiver Input Impedance...17 kΩ Typ
D
Receiver Input Sensitivity...±200 mV
D
Receiver Common-Mode Input Voltage
Range of –7 V to 7 V
D
Operate From Single 5-V Power Supply
D
Glitch-Free Power-Up/Power-Down
Protection
D
Receiver 3-State Outputs Active-Low
Enable for SN75C1167 Only
D
Improved Replacements for the MC34050
and MC34051
description
The SN75C1167 and SN75C1168 dual drivers
and receivers are monolithic integrated circuits
designed for balanced transmission lines. The
devices meet TIA/EIA-422-B and ITU
recommendation V.11.
SN75C1167 ...N OR NS† PACKAGE
SN75C1168 ...N OR NS† PACKAGE
†
The NS package is only available left-ended taped and
reeled (order device SNx5C1 16xNSLE).
1B
1A
1R
RE
2R
2A
2B
GND
1B
1A
1R
1DE
2R
2A
2B
GND
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
(TOP VIEW)
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
10
9
V
CC
1D
1Y
1Z
DE
2Z
2Y
2D
V
CC
1D
1Y
1Z
2DE
2Z
2Y
2D
The SN75C1167 combines dual 3-state differential line drivers and 3-state differential line receivers, both of
which operate from a single 5-V power supply . The driver and receiver have active-high and active-low enables,
respectively, which can be connected externally together to function as direction control. The SN75C1168
drivers have individual active-high enables.
The SN75C1167 and SN75C1168 are characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright 1998, Texas Instruments Incorporated
1
SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
Function Tables
EACH DRIVER
INPUTENABLE
DDE
HHHL
LHLH
XLZZ
SN75C1167, EACH RECEIVER
DIFFERENTIAL INPUTS
A – BRER
VID ≥ 0.2 VLH
–0.2 V < VID < 0.2 VL?
VID ≤ –0.2 VLL
XHZ
OpenLH
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
OUTPUTS
YZ
ENABLE OUTPUT
logic symbol
1DE
2DE
†
These symbols are in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
†
SN75C1167
12
DE
4
RE
15
1D
3
1R
9
2D
5
2R
414
15
1D
3
1R
12
9
2D
5
2R
EN1
EN2
2
2
SN75C1168
EN
EN
1
1
1
1
14
13
2
1
10
11
6
7
13
2
1
10
11
6
7
1Y
1Z
1A
1B
2Y
2Z
2A
2B
1Y
1Z
1A
1B
2Y
2Z
2A
2B
logic diagram (positive logic)
SN75C1167
12
DE
4
RE
15
1D
3
1R
9
2D
5
2R
SN75C1168
4
1DE
15
1D
3
1R
12
2DE
9
2D
5
2R
14
13
10
11
14
13
10
11
1Y
1Z
2
1A
1
1B
2Y
2Z
6
2A
7
2B
1Y
1Z
2
1A
1
1B
2Y
2Z
6
2A
7
2B
2
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schematics of inputs
V
CC
SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
EQUIVALENT OF A OR B INPUTEQUIVALENT OF DRIVER ENABLE INPUT
V
CC
Input
GND
schematics of outputs
V
CC
Output
Input
288 kΩ
GND
TYPICAL OF EACH RECEIVER OUTPUTTYPICAL OF EACH DRIVER OUTPUT
NOM
VCC (A)
GND (B)
17 kΩ
NOM
or
1.7 kΩ
NOM
1.7 kΩ
NOM
V
CC
Output
GND
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GND
3
SN75C1167, SN75C1168
High-level output current, I
mA
Low-level output current, I
mA
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Input voltage range, V
Differential input voltage range, V
Output voltage range, V
Clamp current range, I
Output current range, I
Supply current, I
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values except differential input voltage are with respect to the network GND.
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.
Supply voltage, V
Common-mode input voltage, VIC (see Note 3)Receiver±7V
Differential input voltage, V
High-level input voltage, V
Low-level input voltage, V
Operating free-air temperature, T
NOTE 3: Refer to TIA/EIA-422-B for exact conditions.
CC
ID
IH
IL
p
p
OH
OL
A
Receiver±7V
Except A, B2V
Except A, B0.8V
Receiver–6
Driver–20
Receiver6
Driver20
4.555.5V
070°C
4
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R
100 Ω
See Figure 1 and Note 3
I
Output current with power off (see Note 3)
V
V
IOZHigh-impedance-state output current
A
ICCSupply current (total package)
,
mA
,
,
R
1
R
2
Ω,
R
3
500Ω,
C
C
C
40 pF
S1 i
C
C
C
S1 i
C
1
C
2
C
3
S1 is closed
SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
V
IK
V
OH
V
OL
|V
|V
∆|VOD|
V
OC
∆|VOC|
O(OFF)
I
IH
I
IL
I
OS
C
i
†
All typical values are at VCC = 5 V and TA = 25°C.
NOTES: 3. Refer to TIA/EIA-422-B for exact conditions.
Change in magnitude of differential
output voltage
Common-mode output voltage
Change in magnitude of common-mode
output voltage
p
p
High-level input currentVI = VCC or V
Low-level input currentVI = GND or V
Short-circuit output currentVO = VCC or GND,See Note 4–30–150mA
pp
Input capacitance6pF
4. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
5. This parameter is measured per input, while the other inputs are at VCC or GND.
p
p
p
=
L
CC
VO = 2.5 V20
VO = 5 V–20
No load,
Enabled
= 0
,
VO = 6 V100µA
VO = –0.25 V–100µA
IH
IL
VI = VCC or GND46
VI = 2.4 or 0.5 V, See Note 559
±0.4V
±0.4V
±3V
µ
1µA
–1µA
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
t
t
t
t
t
t
t
t
t
†
All typical values are at VCC = 5 V and TA = 25°C.
Propagation delay time, high- to low-level output
PHL
Propagation delay time, low- to high-level output
PLH
Pulse skew
sk(p)
Rise time
r
Fall time
f
Output enable time to high level
PZH
Output enable time to low level
PZL
Output disable time from low level
PHZ
Output disable time from high level
PLZ
R
= R
= 50 Ω
50
C1 = C2 = C3 = 40 pF,
See Figure 2
R1 = R2 = 50 Ω,
=
=
1
2
See Figure 3
R1 = R2 = 50 Ω,
=
=
1
2
See Figure 4
R1 = R2 = 50 Ω,
=
=
See Figure 4
=
3
= 40 pF,
3
= 40 F,
p
p
p
R
S1 is open,
R3 = 500 Ω,
,
R3 = 500 Ω,
R3 = 500 Ω,
= 500 Ω
p
s open,
s closed,
712ns
712ns
0.54ns
510ns
510ns
1019ns
1019ns
,
716ns
716ns
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5
SN75C1167, SN75C1168
IILine input current
Other input at 0 V
mA
See Figure 5
V
0 V
See Figure 5
R
See Figure 6
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
Enable input current, RESN75C1167 VI = VCC or GND±1µA
I
r
Input resistanceVIC = –7 V to 7 V,Other input at 0 V417kΩ
i
I
Supply current (total package)No load, Enabled
CC
†
All typical values are at VCC = 5 V and TA = 25°C.
‡
The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only .
IT+
– V
)60mV
IT–
SN75C1167 VO = VCC or GND±0.5±5µA
p
VI = 10 V1.5
VI = –10 V–2.5
VI = VCC or GND46
VIH = 2.4 V or 0.5 V,
See Note 5
–0.2
‡
0.2V
59
V
mA
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 6)
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
t
Propagation delay time, low- to high-level output
PLH
t
Propagation delay time, high- to low-level output
PHL
t
Transition time, low- to high-level output
TLH
t
Transition time, high- to low-level output
THL
t
Output enable time to high level1322ns
PZH
t
Output enable time to low level
PZL
t
Output disable time from high level
PHZ
t
Output disable time from low level1322ns
PLZ
†
All typical values are at VCC = 5 V and TA = 25°C.
NOTE 6: Measured per input while the other inputs are at VCC or GND
=
IC
= 1 kW,
L
,
91727ns
91727ns
49ns
49ns
1322ns
1322ns
6
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SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
PARAMETER MEASUREMENT INFORMATION
R
L
2
V
OD2
R
L
V
2
OC
Figure 1. Driver Test Circuit, VOD and V
Y
Input
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns.
C1
See Note A
C2
C3
TEST CIRCUIT
R1
R2
R3
S1
Z
Figure 2. Driver Test Circuit and Voltage Waveforms
Input
C1
C2
C3
V
OD
R1
R2
R3
S1
(see Note B)
1.5 V
(see Note B)
1.5 V
Differential
A
t
PLH
Y
Z
t
PHL
Input
Output
OC
50%
t
sk(p)
1.3 V
1.3 V
1.3 V
50%
1.3 V
VOLTAGE WAVEFORMS
90%
10%
50%
1.3 V
1.3 V
90%
10%
t
t
50%
t
PHL
sk(p)
PLH
3 V
0 V
V
V
V
V
OH
OL
OH
OL
3 V
0 V
See Note A
TEST CIRCUIT
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns.
Figure 3. Driver Test Circuit and Voltage Waveforms
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t
r
VOLTAGE WAVEFORMS
t
f
7
SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
PARAMETER MEASUREMENT INFORMATION
R1
0 V
or
3 V
Pulse
Generator
See Note B
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns.
DE
50 Ω
C1
See Note A
TEST CIRCUIT
C2
C3
R3
R2
Figure 4. Driver Test Circuit and Voltage Waveforms
V
A Input
B Input
CC
Device
Under
Test
S1
R
L
CL = 50 pF
(see Note A)
Input DE
1.5 V
S1
Output
(see Note B)
B Input
A Input = 0 V
Output
Output
t
PLH
t
PLZ
t
TLH
t
PHZ
10%
1.5 V1.3 V
VOL – 0.3 V
VOLTAGE WAVEFORMS
90%
50%
50%
0.8 VVOL + 0.3 V
2 V
90%
10%
t
t
PZL
t
t
PHL
PZH
THL
3 V
0 V
1.5 V
V
OL
V
OH
1.5 V
V
OH
V
OL
2.5 V
0 V
– 2.5 V
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns.
Figure 5. Receiver Test Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
SN75C1167, SN75C1168
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS159C – MARCH 1993 – REVISED APRIL 1998
PARAMETER MEASUREMENT INFORMATION
V
CC
RE
Input
Device
VID = –2.5 V
or 2.5 V
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tf ≤ 6 ns.
Under
Test
TEST CIRCUIT
S1
R
L
CL = 50 pF
(see Note A)
Figure 6. Receiver Test Circuit and Voltage Waveforms
RE Input
Output
Output
t
PLZ
t
PHZ
1.3 V1.3 V
0.5 V
t
, t
PZL
t
PZH
Measurement: S1 to V
PLZ
, t
Measurement: S1 to GND
PHZ
0.5 V
CC
VOLTAGE WAVEFORMS
t
PZL
50%
t
PZH
50%
3 V
0 V
V
CC
V
OL
V
OH
GND
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POST OFFICE BOX 1443
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9
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MA Y INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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