Texas Instruments SN75ALS193D, SN75ALS193DR, SN75ALS193J, SN75ALS193N Datasheet

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS008D – JUNE 1986 – REVISED MA Y 1995
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Meets or Exceeds ANSI Standard EIA/TIA-422-B and EIA/TIA-423-A and ITU Recommendations V.10 and V.11
D
Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments
D
3-State Outputs
D
Common-Mode Input Voltage Range –7 V to 7 V
D
Input Sensitivity...±200 mV
D
Input Hysteresis...120 mV Typ
D
High Input Impedance...12 kΩ Min
D
Operates from Single 5-V Supply
D
Low Supply Current Requirement 35 mA Max
D
Improved Speed and Power Version of the AM26LS32A
description
The SN75ALS193 is a monolithic quadruple line receiver with 3-state outputs designed using advanced low-power Schottky technology. This technology provides combined improvements in bar design, tooling production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits much higher data throughput than other designs. This device meets the specifications of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-A and ITU Recommendations V.10 and V.11. It features 3-state outputs that permit direct connection to a bus-organized system with a fail-safe design that ensures the outputs will always be high if the inputs are open.
The device is optimized for balanced multipoint bus transmission at rates up to 20 megabits per second. The input features high input impedance, input hysteresis for increased noise immunity , and an input sensitivity of ± 200 mV over a common-mode input voltage range of –7 to 7 V. It also features active-high and active-low enable functions that are common to the four channels. The SN75ALS193 is designed for optimum performance when used with the ’ALS192 quadruple differential line driver.
The SN75ALS193 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
ENABLES
OUTPUT
DIFFERENTIAL INPUTS
A–B
G G
OUTPUT
Y
VID 0.2 V
H X
X L
H H
–0.2 V < VID < 0.2 V
H X
X L
? ?
VID –0.2 V
H X
X L
L L
X L HZ
Open
H X
X L
H H
H = high level, L = low level, X = irrelevant, ? = indeterminate, Z = high impedance (off)
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN75ALS193 . . . D, J OR N PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10
9
1B 1A 1Y
G 2Y 2A 2B
GND
V
CC
4B 4A 4Y G 3Y 3A 3B
SN75ALS193 QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS008D – JUNE 1986 – REVISED MA Y 1995
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
1A
2
1B
1
2A
6
2B
7
3A
10
3B
9
4A
14
4B
15
3
1Y
5
2Y
11
3Y
13
4Y
4
G
12
G
EN
1
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
4Y
3Y
2Y
1Y
13
11
5
3
4
4B
4A
3B
3A
2B
2A
1B
1A
15
14
9
10
7
6
1
2
12
G G
schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT EQUIVALENT OF G OR G INPUTS EQUIVALENT OF ALL OUTPUTS
GND
V
CC
V
CC
Input
GND
3 k
NOM
18 k
NOM
300 k NOM
2 k NOM
VCC (A)
or
GND (B)
22 k
NOM
Output
50 k
NOM
V
CC
Input
GND
SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS008D – JUNE 1986 – REVISED MA Y 1995
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
(A or B) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, I
OL
50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds 300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditons is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential-input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
J 1025 mW 8.2 mW/°C 656 mW
N 1150 mW 9.2 mW/°C 736 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
CC
4.75 5 5.25 V
Common-mode input voltage, V
IC
±7 V
Differential input voltage, V
ID
±12 V
High-level input voltage, V
IH
2 V
Low-level input voltage, V
IL
0.8 V
High-level output current, I
OH
–400 µA
Low-level output current, I
OL
16 mA
Operating free-air temperature, T
A
0 70 °C
SN75ALS193 QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS008D – JUNE 1986 – REVISED MA Y 1995
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended range of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS
MIN TYP‡MAX UNIT
V
IT+
Positive-going input threshold voltage 200 mV
V
IT–
Negative-going input threshold voltage –200
§
mV
V
hys
Hysteresis voltage (V
IT+
–V
IT–
) 120 mV
V
IK
Enable-input clamp voltage VCC = MIN, II = – 18 mA –1.5 V
p
V
= MIN,
VID = 200 mV ,
VOHHigh-level output voltage
CC
,
IOH = –400 µA,
ID
See Figure 1
2.5
3.6
V
p
VCC = MIN,
IOL = 8 mA 0.45
VOLLow-level output voltage
V
ID
= –
200 mV
,
See Figure 1
IOL = 16 mA 0.5
V
p
p
VO = 2.4 V
20
IOZHigh-impedance-state output current
V
CC
=
MAX
VO = 0.4 V
–20
µ
A
p
Other input at 0,
VCC = MIN, VI = 15 V
0.7 1.2
IILine input current
,
See Note 3
VCC = MIN, VI = –15 V
–1.0 –1.7
mA
p
VIH = 2.7 V
20
IIHHigh-level enable-input current
V
CC
=
MAX
VIH = MAX 100
µ
A
I
IL
Low-level enable-input current VCC = MAX, VIL = 0.4 V –100 µA Input resistance 12 18 k
I
OS
Short-circuit output current
VCC = MAX, VO = 0,
VID = 3 V, See Note 4
–15 –78 –130 mA
I
CC
Supply current VCC = MAX, Outputs disabled 22 35 mA
For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions.
All typical values are at VCC = 5 V, TA = 25°C.
§
The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
NOTES: 3. Refer to ANSI Standard EIA/TIA-422-B and EIA/TIA-423-A for exact conditions.
4. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output
V
= –2.5 V to 2.5 V ,
15 22
t
PHL
Propagation delay time, high-to-low-level output
ID
,
CL = 15 pF, See Figure 2
15 22
t
PZH
Output enable time to high level
p
13 25
t
PZL
Output enable time to low level
C
L
= 15 pF,
See Figure 3
11 25
ns
t
PHZ
Output disable time from high level
p
13 25
t
PLZ
Output disable time from low level
C
L
= 5 pF,
See Figure 3
15 22
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