SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meets TIA/EIA-422-B, TIA/EIA-485-A, and
CCITT Recommendations V.11 and X.27
D
Low Supply-Current Requirements
30 mA Max
D
Driver Output Capacity...±60 mA
D
Thermal Shutdown Protection
D
Driver Common-Mode Output Voltage
Range of –7 V to 12 V
D
Receiver Input Impedance...12 kΩ Min
D
Receiver Input Sensitivity...±200 mV
D
Receiver Input Hysteresis...60 mV Typ
D
Receiver Common-Mode Input Voltage
Range of ±12 V
D
Operates From Single 5-V Supply
D
Glitch-Free Power-Up and Power-Down
Protection
description
The SN75ALS181 is a differential driver and receiver pair designed for bidirectional data communication on
multipoint bus transmission lines. The design provides for balanced transmission lines and meets
TIA/EIA-422-B and TIA/EIA-485-A, and CCITT recommendations V.10, V.11, X.26, and X.27.
The SN75ALS181 combines a 3-state differential line driver and a differential-input line receiver that operate
from a single 5-V power supply . The driver and receiver have active-high and active-low enables, respectively ,
that can be externally connected together to function as a direction control. The driver differential outputs and
the receiver differential inputs are connected to separate pins for greater flexibility and are designed to offer
minimum loading to the bus when the driver is disabled or V
CC
= 0. These ports feature wide positive and
negative common-mode voltage changes, making the device suitable for party-line applications.
The SN75ALS181 is characterized for operation from 0°C to 70°C.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
R
RE
DE
D
GND
GND
V
CC
V
CC
A
B
Z
Y
NC
N OR NS† PACKAGE
(TOP VIEW)
NC – No internal connection
†
The NS package is only available in left-end taped
and reeled (order device SN75ALS181NSLE).
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Function Tables
EACH DRIVER
INPUT ENABLE
OUTPUTS
D DE
Y Z
H H H L
L H L H
X L Z Z
EACH RECEIVER
DIFFERENTIAL
ENABLE OUTPUT
A – B RE Y
VID ≥ 0.2 V L H
–0.2 V < VID < 0.2 V L ?
VID ≤ – 0.2 V L L
X H Z
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic symbol
†
EN1
EN2
2
1
1
9
10
12
11
4
5
3
2
DE
D
RE
R
Y
Z
A
B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
4
5
3
2
9
10
12
11
DE
D
RE
R
Y
Z
A
B
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs
TYPICAL OF RECEIVER INPUT
V
CC
NOM
288 kΩ
GND
Input
VCC (A)
or
GND (B)
17 kΩ
NOM
NOM
1.7 kΩ
NOM
1.7 kΩ
EQUIVALENT OF EACH DRIVER INPUT
Input
V
CC
35 kΩ
NOM
schematics of outputs
TYPICAL OF DRIVER OUTPUT TYPICAL OF RECEIVER OUTPUT
Output
V
CC
70 Ω
NOM
Output
V
CC
GND
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, DE, RE
, and D inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, driver –9 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, receiver –14 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver differential input voltage range (see Note 2) –14 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
N 1150 mW 9.2 mW/°C 736 mW
NS 625 mW 4.0 mW/° C 445 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
CC
4.75 5 5.25 V
Common-mode output voltage, VOC (see Note 3) Driver –7 12 V
Common-mode input voltage, VIC (see Note 3) Receiver –12 12 V
High-level input current, V
IH
D, DE, and RE 2 V
Low-level input current, V
IL
D, DE, and RE 0.8 V
Differential input voltage, V
ID
±12 V
p
Driver –60 mA
High-level output current, I
OH
Receiver –400 µA
p
Driver 60 mA
Low-level output current, I
OL
Receiver 8 mA
Operating free-air temperature, T
A
0 70 °C
NOTE 3: The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this table for common-mode
output voltage level only .
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
IK
Input clamp voltage II = –18 mA –1.5 V
V
O
Output voltage IO = 0 0 6 V
|V
OD1
| Differential output voltage IO = 0 1.5 6 V
p
V
= 5 V,
1/2 V
OD1
|V
OD2
|
Differential output voltage
CC
,
RL = 100 Ω
See Figure 1
2
V
|V
OD2
| Differential output voltage RL = 54 Ω 1.5 2.3 5
|V
OD3
| Differential output voltage V
test
= –7 V to 12 V, See Figure 2 1.5 5 V
∆|VOD|
Change in magnitude of differential output
voltage (see Note 4)
±0.2 V
p
3
VOCCommon-mode output voltage
R
L
=
54 Ω or 100 Ω
,
See Figure 1
–1
V
∆|VOC|
Change in magnitude of common-mode
output voltage (see Note 4)
±0.2 V
I
OZ
High-impedance-state output current VO = –7 V to 12 V, See Note 5 ±100 µA
I
IH
High-level input current VIH = 2.4 V 20 µA
I
IL
Low-level input current VIL = 0.4 V –100 µA
VO = –7 V –250
p
VO = V
CC
250
IOSShort-circuit output current
VO = 12 V 250
mA
VO = 0 V –150
pp
p
Outputs enabled 21 30
ICCSupply current (total package)
No load
Outputs disabled 14 21
mA
NOTES: 4. ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high
level to a low level.
5. This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
t
dD
Differential output delay time, t
dDH
or t
dDL
9 13 20
t
sk(p)
Pulse skew (|t
dDH
– t
dDL
|)
RL = 54 Ω, CL = 50 pF, See Figure 3
1 8
ns
t
t
Differential output transition time 3 10 16
t
PZH
Output enable time to high level RL = 110 Ω, See Figure 4 36 53 ns
t
PZL
Output enable time to low level RL = 110 Ω, See Figure 5 39 56 ns
t
PHZ
Output disable time from high level RL = 110 Ω, See Figure 4 20 31 ns
t
PLZ
Output disable time from low level RL = 110 Ω, See Figure 5 9 20 ns
†
All typical values are at VCC = 5 V and TA = 25°C.
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage, common-mode input
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
T+
Positive-going threshold voltage,
differential input
VO = 2.7 V, IO = –0.4 mA 0.2 V
V
T–
Negative-going threshold voltage,
differential input
VO = 0.5 V, IO = 8 mA See Note 8 –0.2 V
V
hys
Input hysteresis (VT+ – VT–) 60 mV
V
IK
Input clamp voltage, RE II = –18 mA –1.5 V
V
OH
High-level output voltage VID = 200 mV , IOH = –400 µA, See Figure 6 2.7 V
V
OL
Low-level output voltage VID = –200 mV, IOL = 8 mA, See Figure 6 0.45 V
I
OZ
High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA
p
Other input at 0 V ,
VI = 12 V 1
IILine input current
,
See Note 5
VI = –7 V –0.8
mA
I
IH
High-level input current, RE VIH = 2.7 V 20 µA
I
IL
Low-level input current, RE VIL = 0.4 V –100 µA
r
i
Input resistance 12 kΩ
I
OS
Short-circuit output current VID = 200 mV , VO = 0 V –15 –85 mA
pp
p
Outputs enabled 21 30
ICCSupply current (total package)
No load
Outputs disabled 14 21
mA
NOTE 5: This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 15 pF (unless otherwise noted) (see Figure 7)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
t
PHL
Propagation delay time, high-to-low-level output VID = –1.5 V to 1.5 V 10 16 25 ns
t
PLH
Propagation delay time, low-to-high-level output VID = –1.5 V to 1.5 V 10 16 25 ns
t
sk(p)
Pulse skew (|t
PLH
– t
PHL
|) VID = –1.5 V to 1.5 V 1 8 ns
t
PZH
Output enable time to high level 7 15 ns
t
PZL
Output enable time to low level 9 19 ns
t
PHZ
Output disable time from high level 18 27 ns
t
PLZ
Output disable time from low level 10 15 ns
†
All typical values are at VCC = 5 V and TA = 25°C.
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
V
OD2
V
OC
R
L
2
R
L
2
Figure 1. Driver Test Circuit, VOD and V
OC
V
OD3
V
test
375 Ω
375 Ω
60 Ω
Figure 2. Driver Circuit, V
OD3
0 V
3 V
t
f
10%
90%
t
r
1.5 V
t
dDH
50%
Output
Input
TEST CIRCUIT VOLTAGE WAVEFORMS
t
dDL
RL =
54 Ω
CL = 50 pF
(see Note B)
3 V
Generator
(see Note A)
50 Ω
1.5 V 1.5 V
50%
≈ 2.5 V
≈ – 2.5 V
Output
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO=50Ω.
B. CL includes probe and jig capacitance.
Figure 3. Driver Differential-Output Delay and Transition Times
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
1.5 V
V
OH
t
PHZ
t
PZH
0 V
3 V
1.5 V
2.3 V
Output
Input
Output
S1
0 V or 3 V
(see Note B)
CL= 50 pF
110 Ω
RL =
50 Ω
(see Note A)
Generator
V
off
≈ 0 V
0.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 4. Driver Enable and Disable Times
TEST CIRCUIT VOLTAGE WAVEFORMS
V
OL
t
PLZ
t
PZL
5 V
0.5 V
2.3 V
0 V
3 V
1.5 V1.5 V
5 V
Output
Input
Output
S1
0 V or 3 V
(see Note B)
CL= 50 pF
50 Ω
(see Note A)
Generator
RL = 110 Ω
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 5. Driver Enable and Disable Times
–I
OH
V
OH
+I
OL
V
OL
V
ID
Figure 6. Receiver, VOH and V
OL
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
V
OL
V
OH
3 V
0 V
t
PHL
t
PLH
Output
Input
1.5 V
1.3 V
1.5 V
1.3 V
51 Ω
(see Note B)
CL = 15 pF
Output
0 V
1.5 V
(see Note A)
Generator
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7. Receiver Propagation-Delay Times
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152A – DECEMBER 1992 – REVISED JUNE 1998
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT
VOLTAGE WAVEFORMS
2 kΩ
S2
5 V
S3
1N916 or Equivalent5 kΩ
(see Note B)
CL = 15 pF
50 Ω
S1
1.5 V
– 1.5 V
t
PZL
1.5 V
1.5 V
3 V
0 V
V
OL
S1 to – 1.5 V
S2 Closed
S3 Open
t
PZH
1.5 V
1.5 V
Input
0 V
3 V
Output
0 V
V
OH
V
OL
0.5 V
1.5 V
0 V
3 V
S1 to – 1.5 V
S2 Closed
S3 Closed
t
PLZ
V
OH
t
PHZ
3 V
0 V
1.5 V
0.5 V
Input
Output
≈ 1.3 V
Input
Output
Input
Output
≈ 4.5 V
≈ 1.3 V
S1 to 1.5 V
S2 Open
S3 Closed
S1 to 1.5 V
S2 Open
S3 Closed
(see Note A)
Generator
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 8. Receiver Output Enable and Disable Times
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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performed, except those mandated by government requirements.
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Copyright 1998, Texas Instruments Incorporated
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