SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meets or Exceeds the Requirements of
ANSI EIA/TIA-422-B, EIA/TIA-423-B, and
RS-485
D
Meets or Exceeds the Requirements of ITU
Recommendations V.10, V.11, X.26, and
X.27
D
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
D
3-State Outputs
D
Common-Mode Input Voltage Range of
–12 V to 12 V
D
Input Sensitivity...±200 mV
D
Input Hysteresis...50 mV Typ
D
High Input Impedance...12 kΩ Min
D
Operates From Single 5-V Supply
D
Low Supply-Current Requirement
27 mA Max
description
The SN75ALS173 is a monolithic quadruple differential line receiver with 3-state outputs. It is designed to meet
the requirements of ANSI Standards EIA/TIA-422-B, EIA/TIA-423-B, RS-485, and several ITU
recommendations. Advanced low-power Schottky technology provides high speed without the usual power
penalty . The four receivers have an ORed pair of enables in common. Either G high or G
low enables all of the
receivers. The device features high input impedance, input hysteresis for increased noise immunity , and input
sensitivity of ±200 mV over a common-mode input voltage range of –12 V to 12 V.
The SN75ALS173 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
ENABLES
OUTPUT
A – B
G G
Y
H X H
V
ID
≥ 0.2
V
X LH
HX?
–
0
.
2
V
<
V
ID
< 0.2
V
X L?
HXL
V
ID
≤ –0.2
V
X LL
X LHZ
p
HXH
Open
Circ
u
it
XLH
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
V
CC
4B
4A
4Y
G
3Y
3A
3B
N OR NS† PACKAGE
(TOP VIEW)
†
The NS package is only available left-end taped and
reeled (order device SN75ALS173 NSLE).
SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
4B
4A
3B
3A
2B
2A
1B
1A
G
G
4Y
3Y
2Y
1Y
13
11
5
3
15
14
9
10
7
6
1
2
12
4
EN
≥ 1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
4Y
3Y
2Y
1Y
13
11
5
3
15
14
9
10
7
6
1
2
12
4
4B
4A
3B
3A
2B
2A
1B
1A
G
G
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTSEQUIVALENT OF G OR G ENABLE INPUTEQUIVALENT OF EACH A OR B INPUT
70 Ω
GND
Output
V
CC
GND
Input
V
CC
V
CC
288 kΩ
NOM
GND
Input
VCC (A)
or
GND (B)
17 kΩ
NOM
17 kΩ
NOM
17 kΩ
NOM
SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
(A or B inputs) ±14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2) ±14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, I
OL
50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
N 1150 mW 9.2 mW/°C 736 mW
NS 625 mW 5.0 mW/°C 400 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
CC
4.75 5 5.25 V
Common-mode input voltage, V
IC
±12 V
Differential input voltage, V
ID
±12 V
High-level input voltage, V
IH
G, G 2 V
Low-level input voltage, V
IL
G, G 0.8 V
High-level output current, I
OH
–400 µA
Low-level output current, I
OL
8 mA
Operating free-air temperature, T
A
0 70 °C
SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted) (see Note 3)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
IT+
Positive-going input threshold
voltage
200 mV
V
IT–
Negative-going input threshold
voltage
–200
‡
mV
V
hys
Hysteresis voltage (V
IT+
– V
IT–
) 50 mV
V
IK
Input clamp voltage G, G II = –18 mA –1.5 V
V
OH
High-level output voltage VID = 200 mV , IOH = –400 µA, See Figure 1 2.7 V
V
OL
Low-level output voltage VID = –200 mV, IOL = 8 mA, See Figure 1 0.45 V
I
OZ
High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA
p
p
VI = 12 V 1
IILine input current
Other input at 0 V
VI = –7 V –0.8
mA
I
IH
High-level input current G, G VIH = 2.7 V 20 µA
I
IL
Low-level input current G, G VIL = 0.4 V –100 µA
r
i
Input resistance 12 kΩ
I
OS
Short-circuit output current See Note 4 –15 –85 mA
pp
p
No load, Outputs enabled 16 24
ICCSupply current (total package)
No load, Outputs disabled 18 27
mA
†
All typical values are at VCC = 5 V and TA = 25°C.
‡
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltage
levels only.
NOTES: 3. Refer to ANSI Standard RS-485 for exact conditions.
4. The duration of the short circuit should not cause the maximum package power dissipation to be exceeded.
switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PHL
Propagation delay time, high- to low-level output
V
= –2.5 V to 2.5 V ,
9 18 27 ns
t
PLH
Propagation delay time, low- to high-level output
ID
,
See Figure 2
9 18 27 ns
t
PZH
Output enable time to high level See Figure 3 4 12 18 ns
t
PZL
Output enable time to low level See Figure 4 6 13 21 ns
t
PHZ
Output disable time from high level See Figure 3 10 21 27 ns
t
PLZ
Output disable time from low level See Figure 4 8 15 25 ns
PARAMETER MEASUREMENT INFORMATION
V
OH
(–)
I
OH
(+)
I
OL
V
ID
V
OL
2 V
Figure 1. VOH, V
OL
SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
V
OL
V
OH
– 2.5 V
2.5 V
Output
Input
1.3 V1.3 V
t
PHL
t
PLH
0 V0 V
2 V
Output
CL = 15 pF
(see Note B)
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
Generator
(see Note A)
Figure 2. Test Circuit and Voltage Waveforms
See Note D
≈ 0
S1 Open
S1 Closed
1.3 V1.3 V
t
PHZ
t
PZH
0.5 V
See Note C
V
CC
2 kΩ
S1
5 kΩ
2.5 V
CL
(see Note B)
Output
2 V
1.3 V
Input
Output
3 V
0 V
V
OH
≈ 1.4 V
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
Generator
(see Note A)
Figure 3. Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G
, ground G and apply an inverted input waveform to G.
SN75ALS173
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS132C – SEPTEMBER 1991 – REVISED MA Y 1995
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
S2
0 V
3 V
S2 Closed
t
PLZ
S2 Open
t
PZL
V
OL
Output
Input
1.3 V
2 V
Output
CL
(see Note B)
2.5 V
See Note C
0.5 V
1.3 V 1.3 V
See Note D
50 Ω
5 kΩ
2 kΩ
V
CC
≈ 1.4 V
TEST CIRCUIT VOLTAGE WAVEFORMS
Generator
(see Note A)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G
, ground G and apply an inverted input waveform to G.
Figure 4. Test Circuit and Voltage Waveforms
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Loading...