SN55ALS161 . . . 59 mW Max Per Channel
SN75ALS161 . . . 46 mW Max Per Channel
D
Fast Propagation Times:
SN55ALS161 . . . 25 ns Max
SN75ALS161 . . . 20 ns Max
D
High-Impedance pnp Inputs
D
Receiver Hysteresis:
SN55ALS161 . . . 550 mV Typ
SN75ALS161 . . . 650 mV Typ
D
Bus-Terminating Resistors Provided on
Driver Outputs
D
No Loading of Bus When Device Is
Powered Down (VCC = 0)
D
Power-Up/Power-Down Protection
(Glitch Free)
description
GPIB
I/O Ports
†
SN55ALS161 . . . J OR W PACKAGE
SN75ALS161 . . . DW OR N PACKAGE
(TOP VIEW)
TE
20
19
18
17
16
15
14
13
12
11
CC
V
V
CC
REN
IFC
NDAC
NRFD
DAV
EOI
ATN
SRQ
DC
REN
18
17
16
15
14
IFC
NDAC
NRFD
DAV
EOI
TE
1
REN
NDAC
NRFD
DAV
SRQ
GND
SN55ALS161 . . . FK PACKAGE
NDAC
NRFD
DAV
EOI
ATN
2
IFC
3
4
5
6
7
EOI
8
ATN
9
10
(TOP VIEW)
IFC
REN
3212019
4
5
6
7
8
910111213
Terminal
I/O Ports
The SN55ALS161 and SN75ALS161
eight-channel general-purpose interface bus
transceivers are high-speed, advanced
low-power Schottky-process devices designed to
provide the bus-management and data-transfer
signals between operating units of a
single-controller instrumentation system. When
combined with the SN55ALS160 and
SN75ALS160 octal bus transceivers, these
devices provide a complete 16-wire interface for
the IEEE 488 bus.
The SN55ALS161 and SN75ALS161 devices
feature eight driver-receiver pairs connected in a
front-to-back configuration to form input/output
CHANNEL-IDENTIFICATION TABLE
NAMECLASSIDENTITY
DC
TE
ATN
SRQ
REN
IFC
EOI
DAV
NDAC
NRFD
Direction Control
Talk Enable
Attention
Service Request
Remote Enable
Interface Clear
End or Identify
Data Valid
Not Data Accepted
Not Ready for Data
SRQ
GND
DC
SRQ
ATN
Control
Bus
Management
Data
Transfer
(I/O) ports at both the bus and terminal sides. The
direction of data through these driver-receiver
pairs is determined by the direction-control (DC)
and talk-enable (TE) signals.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
The transceivers are suitable for IEEE Standard 488 applications to the extent of the operating conditions and characteristics specified in this
data sheet. Certain limits contained in the IEEE specification are not met or cannot be tested over the entire military temperature range.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN55ALS161, SN75ALS161
RTR
RRTRR
TRT
TTRTT
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS019E – JUNE 1986 – REVISED NOVEMBER 1999
description (continued)
The driver outputs general-purpose interface bus (GPIB I/O ports) feature active bus-terminating resistor
circuits designed to provide a high impedance to the bus when VCC = 0. The drivers are designed to handle
sink-current loads up to 48 mA. Each receiver features pnp transistor inputs for high input impedance and
hysteresis of 400 mV on the commercial part, 250 mV on the military part, minimum, for increased noise
immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled.
The SN55ALS161 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN75ALS161 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
RECEIVE/TRANSMIT
CONTROLS
DCTEATN†ATN†SRQRENIFCEOIDAVNDACNRFD
HHH
HHL
LLH
LLL
HLXRTRRRRTT
LHXTRTTTTRR
H = high level, L = low level, R = receive, T = transmit, X = irrelevant
Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving
is from the bus side to the terminal side.
Data transfer is noninverting in both directions.
†
ATN is a normal transceiver channel that functions additionally as an internal direction control or talk
enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite
states, the ATN channel functions as an independent transceiver only.
BUS-MANAGEMENT CHANNELSDATA-TRANSFER CHANNELS
(CONTROLLED BY DC)(CONTROLLED BY TE)
T
R
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55ALS161, SN75ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS019E – JUNE 1986 – REVISED NOVEMBER 1999
11
1
13
19
18
15
17
16
†
EN1/G4
EN2/G5
≥ 1
5
4
1
11
11
2
2
2
EN3
8
1
11
3
13
1
1
1
1
2
1
2
1
2
1
ATN
714
EOI
912
SRQ
2
REN
3
IFC
6
DAV
4
NDAC
5
NRFD
logic symbol
DC
TE
ATN
EOI
SRQ
REN
IFC
DAV
NDAC
NRFD
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
11
DC
1
TE
13
ATN
14
EOI
12
SRQ
19
REN
18
IFC
15
DAV
8
ATN
7
EOI
9
SRQ
2
REN
3
IFC
6
DAV
NDAC
NRFD
17
16
4
5
NDAC
NRFD
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN55ALS161, SN75ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS019E – JUNE 1986 – REVISED NOVEMBER 1999
schematics of inputs and outputs
EQUIVALENT OF ALL CONTROL INPUTSTYPICAL OF SRQ, NDAC, AND NRFD GPIB I/O PORT
V
CC
9 kΩ
NOM
Input
GND
Input/Output Port
Circuit inside dashed lines is on the driver outputs only.
TYPICAL OF ALL I/O PORTS EXCEPT SRQ, NDAC, NRFD GPIB I/O PORTS
1.7 kΩ
NOM
4 kΩ
NOM
10 kΩ
NOM
R
(eq)
4 kΩ
NOM
Input/Output Port
Driver output R
Receiver output R
R
= equivalent resistor
(eq)
Circuit inside dashed lines is on the driver outputs only.
= 30 Ω NOM
(eq)
= 110 Ω NOM
(eq)
1.7 kΩ
NOM
4 kΩ
NOM
10 kΩ
NOM
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
High-level output current, I
Low-level output current, I
mA
SN55ALS161, SN75ALS161
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS019E – JUNE 1986 – REVISED NOVEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Lead temperature 1,6 mm (1/16 inch) from the case for 60 seconds: J or W package 300°C. . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds: DW or N package 260°C. . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51.
Bus and terminal at TA = 25°C to 125°C2
Bus and terminal at TA = –55°C2.1
TE and DC at TA = –55°C to 125°C0.8
Bus and terminal at TA = 25°C to –55°C0.8
Bus and terminal at TA = 125°C0.7
Bus ports with pullups active (VCC = 5 V)–5.2mA
Terminal ports–800µA
Bus ports48
Terminal ports16
MINNOMMAXUNIT
4.7555.25V
V
V
–55125°C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
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