Texas Instruments SN75ALS085DW, SN75ALS085DWR, SN75ALS085NT Datasheet

SN75ALS085

LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Meets or Exceeds the Requirements of IOS

8802.3:1989 and ANSI/IEEE Std 802.3-1988

D

Interdevice Loop-Back Paths for System
Testing

D

Squelch Function Implemented on the
Receiver Inputs

D

Drivers Will Drive a Balanced 78-Ω Load

D

Transformer Coupling Not Required in
System

D

Power-Up/Power-Down Protection (Glitch
Free)

D

Isolated Ground Pins for Reduced Noise
Coupling

D

Fault-Condition Protection Built into the
Device

D

Driver Inputs Are Level-Shifted ECL
Compatible

description

The SN75ALS085 is a monolithic, high-speed, advanced low-power Schottky, dual-channel driver/receiver
device designed for use in the AUI of ANSI/IEEE Std 802.3-1988. The two drivers on the device drive a 78-Ω
balanced, terminated twisted-pair transmission line up to a maximum length of 50 meters. In the off (idle) state,
the drivers maintain minimal differential output voltage on the twisted-pair line and, at the same time, remain
within the required output common-mode range.

With the driver enable (TXEN) high, upon receiving the first falling edge into the driver input, the differential
outputs will rise to full-amplitude output levels within 25 ns. The output amplitude is maintained for the remainder
of the packet. After the last positive packet edge is transmitted into the driver, the driver will maintain a minimum
of 70% full differential output for a minimum of 200 ns, then decay to a minimum level for the reset (idle) condition
within 8 µs. Disabling the driver by taking the driver enable low will also force the output into the idle condition
after the normal 8-µs timeout. While operating, the drivers are able to withstand a set of fault conditions and not
suffer damage due to the faults being applied. The drivers power up in the idle state to ensure that no activity
is placed on the twisted-pair cable that could be interpreted as network traffic.

The line receiver squelch function interfaces to a differential twisted-pair line terminated external to the device.
The receiver squelch circuit allows differential receive signals to pass through as long as the input amplitude
and pulse duration are greater than the minimum squelch threshold. This ensures a good signal-to-noise ratio
while the data path is active and prevents system noise from causing false data transitions during line shutdown
and line-idle conditions. The RXO outputs default to a high level and the RXEN outputs default to a low level
while the squelch function is blocking the data path through the receiver (idle). The line receiver squelch will
become active within 50 ns when the input squelch threshold is exceeded. RXEN will be driven high when the
squelch circuit is allowing data to pass through the receiver. The receiver squelch circuit can also withstand a
set of fault conditions while operating without causing permanent damage to the device.

Copyright  1995, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DW OR NT PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

TXI1

TXEN1

LOOP

1

GND

RXEN1

RXO1
RXO2

RXEN2

GND

LOOP

2

TXEN2

TXI2

TXO1
TXO

1

V

CC

RXI1
RXI1
GND
GND
RXI2
RXI

2

V

CC

TXO2
TXO2

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

The purpose of the loop functions is to provide a means by which system data path verification can be done
to isolate faulty interfaces and assist in network diagnosis. The LOOP pins are TTL compatible and must be
held high for normal operation. When LOOP1

is taken low, the output of driver 1 (TXO1) immediately goes into
the idle state. Also, the input to receiver 1 is ignored and a path from TXI1 to RXO1 is established. When LOOP1
is taken back high, driver 1 and receiver 1 revert back to their normal operation. When LOOP2 is taken low , a
similar data path is established between TXI1 and RXO2. TXEN1 must be high for the loop functions to operate
and TXEN1 can be used to gate the loop function if desired. During loop operation, the respective receiver
enable output (RXEN) will reflect the status of TXEN1.

Function Tables

RECEIVER – LOOP = H

OUTPUTS

RXI PREVIOUS RXEN RXEN RXO

VID = 1315 mV to –175 mV , tw < 25 ns L L H
VID = –275 mV to –1315 mV , tw > 50 ns X H L
VID = 318 mV to 1315 mV , tw < 142 ns H H H
VID = 318 mV to 1315 mV , tw > 187 ns X L H

H = high level, L = low level, X = don’t care

DRIVER – LOOP

= H

TXI

TXEN PREVIOUS TXO OUTPUT TXO

L L Idle Idle

H L Idle Idle

↓ H Idle L
L H Active L

H < 260 µs H Active H

H > 8 µs H Active Idle

L L > 8 µs Active Idle
H < 260 ns L > 8 µs Active Idle
H < 260 ns L < 260 ns Active H

H > 8 µs L < 260 ns Active Idle

L L < 260 ns Active L

H = VI ≥ VT max, L = VI ≤ VT min

SN75ALS085

LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function Tables (continued)

LOOP

INPUTS

OUTPUTS

LOOP1 LOOP2 TXI1 TXEN1 RXI1 RXI2 RXO1 RXO2 RXEN1 RXEN2 TXO1

L L L H X X L L H H Idle
L LHHXXHH H H Idle
L LXLXXHH L L Idle
L H L H X Normal L Normal H Normal Idle
L H H H X Normal H Normal H Normal Idle
L H X L X Normal H Normal L Normal Idle
H L L H Normal X Normal L Normal H Idle
H L H H Normal X Normal H Normal H Idle
H L X L Normal X Normal H Normal L Idle
H H Normal Normal Normal Normal Normal Normal Normal Normal Normal

H = high level, L = low level, X = don’t care

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

150 ns

5

RXEN1

RXO1

6

1
1

X1

TXO1
TXO1

23

24

1

1

X1

250 ns

4 µS

ECL/TTL

Noise

Filter

+–

225 mV

RX11

20

RX11

21

LOOP1

3

TXI1

1

TXEN1

2

LOOP2

10

7

RXO2

150 ns

RXEN2

8

14
13

TXO

2

TXO2

4 µS

250 ns

Noise

Filter

ECL/TTL

225 mV

–+

RXI2

17
16

12

TXI2

11

TXEN2

RXI2

SN75ALS085

LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

schematics of inputs and outputs

50 Ω

5 kΩ

RXO

and

RXEN

ESD

V

CC

20 kΩ

LOOP

and

TXEN

V

CC

ESD

RXI

ESD

–

+

1 kΩ

3 kΩ

4 kΩ

4 kΩ

4 kΩ4 kΩ

4 kΩ

RXI

ESD

V

CC

TXI

V

CC

200 Ω

50 kΩ

ESD

RXI AND RXI INPUTS LOOP AND TXEN INPUTS

RXO AND RXEN OUTPUTSTXI INPUTS

SN75ALS085
LAN ACCESS UNIT INTERFACE DUAL DRIVER/RECEIVER

SLLS054B – APRIL 1989 – REVISED MA Y 1995

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC (see Note 1) 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TXI and LOOP

input voltage, VI 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TXO and TXO

output voltage, VO 16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RXI and RXI

input voltage, VI 16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RXO and RXEN output voltage, V

O

5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

A

0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

– 65 °C to 150 °C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NOTE 1: Voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

DW 1350 mW 10.8 mW/°C 864 mW

NT 1250 mW 10.0 mW/°C 800 mW

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, V

CC

4.75 5 5.25 V

Common-mode voltage at RXI inputs, V

IC

1 4.2 V

Differential voltage between RXI inputs, V

ID

±318 ±1315 mV

High-level input voltage, LOOP and TXEN, V

IH

2 V

Low-level input voltage, LOOP and TXEN, V

IL

0.8 V

High-level output current, RXO and RXEN, I

OH

– 0.4 mA

Low-level output voltage, RXO and RXEN, I

OL

16 mA

Setup time, driver mode, TXEN high before TXI↓, t

su1

(see Figure 7) 10 ns

Setup time, loop mode, LOOP low before TXEN↑, t

su2

(see Figure 9) 15 ns

Setup time, loop mode, TXEN high before TXI↓, t

su3

(see Figure 9) 10 ns
Hold time, loop mode, TXEN high after TXI↑, th1 (see Figure 8) 10 ns
Hold time, loop mode, LOOP low after TXEN↓, th2 (see Figure 8) 15 ns
Operating free-air temperature, T

A

0 70 °C