Texas Instruments SN75ALS057DWR, SN75ALS057N, SN75ALS056DW, SN75ALS056DWR, SN75ALS056N Datasheet

SN75ALS056, SN75ALS057

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SLLS028G – AUGUST 1987 – REVISED JUNE 1998

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Suitable for IEEE Standard 896
Applications

†

D

SN75ALS056 is an Octal Transceiver

D

SN75ALS057 is a Quad Transceiver

D

High-Speed Advanced Low-Power Schottky
(ALS) Circuitry

D

Low Power Dissipation:

52.5 mW/Channel Max

D

High-Impedance pnp Inputs

D

Logic-Level 1-V Bus Swing Reduces Power
Consumption

D

Trapezoidal Bus Output Waveform Reduces
Noise Coupling to Adjacent Lines

D

Power-Up/Power-Down Protection
(Glitch Free)

D

Open-Collector Driver Outputs Allow
Wired-OR Connections

D

Designed to Be a Faster, Lower-Power
Functional Equivalent of National DS3896,
DS3897

description

The SN75ALS056 is an eight-channel,
monolithic, high-speed, advanced low-power
Schottky (ALS) device designed for two-way data
communication in a densely populated
backplane. The SN75ALS057 is a four-channel
version with independent driver-input (Dn) and
receiver-output (Rn) pins and a separate driver
disable for each driver (En).

These transceivers feature open-collector driver outputs with series Schottky diodes to reduce capacitive
loading to the bus. By using a 2-V pullup termination on the bus, the output signal swing is approximately 1 V ,
which reduces the power necessary to drive the bus load capacitance. The driver outputs generate trapezoidal
waveforms that reduce crosstalk between channels. The drivers are capable of driving an equivalent dc load
as low as 18.5 Ω. The receivers have internal low-pass filters to further improve noise immunity.

The SN75ALS056 and SN75ALS057 are characterized for operation from 0°C to 70°C.

Copyright  1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

A1
A2
A3
A4

V

CC

A5
A6
A7
A8

CS

B1
B2
B3
B4
GND
B5
B6
B7
B8
T/R

SN75ALS057 . . . DW OR N PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12

11

D1
R1
D2
R2

V

CC

D3
R3
D4
R4
TE

B1
E1
B2
E2
GND
B3
E3
B4
E4
RE

SN75ALS056 . . . DW OR N PACKAGE

(TOP VIEW)

†

The transceivers are suitable for IEEE Standard 896 applications to the extent of the operating conditions and characteristics specified in this
data sheet.

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SLLS028G – AUGUST 1987 – REVISED JUNE 1998

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

SN75ALS056

SN75ALS057

4

3

2

1

11

A4

A3

A2

A1

T/R

B4

B3

B2

B1

17

18

19

20

3EN1 (A-B)
3EN2 (B-A)

1

2

10

CS

G3

8

7

A7

A6

A5

B7

B6

B5

13

14

615

9

A8 B8

12

14

6

4

17

3

2

19

1

11

10

E3

D3

R2

E2

D2

R1

E1

D1

RE

TE

B3

B2

B1

15

18

20

EN1 (D-B)
EN2 (B-R)

1

2

B4

13

&

9

12

8

7

R4

E4

D4

R3

†

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

SN75ALS056, SN75ALS057

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SLLS028G – AUGUST 1987 – REVISED JUNE 1998

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

SN75ALS057

T/R

11
10

CS

1

A1

B1

20

Xmit

9

A8

B8

12

Rcv

B1

20

Rcv

Xmit

TE

10

RE

11

D1

1

E1

19

2

R1

9

12

8

R4

E4

D4

B4

13

SN75ALS056

†

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SLLS028G – AUGUST 1987 – REVISED JUNE 1998

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function Tables

SN75ALS056

TRANSMIT/RECEIVE

CONTROLS

CHANNELS

CS T/R A ↔ B

L H T(A B)
L L R(B A)
H X D

SN75ALS057

TRANSMIT/RECEIVE

CONTROLS

CHANNELS

TE RE En D B B R

L L L D R
L LH T R
LHL D D

LHH T D
HLX D R
HHX D D

H = high level, L = low level, R = receive, T = transmit,
D = disable, X = irrelevant

Direction of data transmission is from An to Bn for the SN75ALS056 and from Dn to Bn for the SN75ALS057.
Direction of data reception is from Bn to An for the SN75ALS056 and from Bn to Rn for the SN75ALS057. Data
transfer is inverting in both directions.

SN75ALS056, SN75ALS057

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS

SLLS028G – AUGUST 1987 – REVISED JUNE 1998

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

schematics of inputs and outputs

ESD

Protect

DRIVER OUTPUT RECEIVER INPUT CONTROL INPUTS

RECEIVER OUTPUT DRIVER INPUT

GND

Bn

V

CC

GND

40 µA

V

CC

GND

48 Ω 20 kΩ

An

or

Rn-Dn

SN75ALS057

Only

En

All resistor values shown are nominal.

17.5 kΩ

TE

/RE

Input

15 kΩ

2.5 kΩ

V

CC

ESD

Protect

ESD

Protect

ESD

Protect

ESD

Protect

†

†

Additional ESD protection is on the SN75ALS057, which has separate receiver-output and driver-input pins.

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

‡

Supply voltage, V

CC

(see Note 1) 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Control input voltage, V

I

5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Driver input voltage, V

I

5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Driver output voltage, V

O

2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receiver input voltage, V

I

2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receiver output voltage, V

O

5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package 260 °C. . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: Voltage values are with respect to network ground terminal.