TEXAS INSTRUMENTS SN75971B Technical data
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000
D
Provides High-Voltage Differential SCSI
From Single-Ended Controller When Used
With the SN75970B Control Transceiver
D
Meets or Exceeds the Requirements of EIA
Standard RS-485 and ISO-8482 Standards
D
ESD Protection on Bus Pins to 12 kV
D
Packaged in Shrink Small-Outline Package
with 25 mil Terminal Pitch and Thin
Small-Package with 20 mil Terminal Pitch
D
Low Disabled-Supply Current 32 mA Typ
D
Thermal Shutdown Protection
D
Positive- and Negative-Current Limiting
D
Power-Up/-Down Glitch Protection
D
Open-Circuit Failsafe Receivers
description
The SN75971B SCSI differential converter-data is a
9-channel RS-485 transceiver. When used in conjunction with its companion control transceiver, the
SN75970B, the resulting chip set provides the superior
electrical performance of differential SCSI from a
single-ended SCSI bus or controller. A 16-bit
Ultra-SCSI (or Fast-20) SCSI bus can be implemented
with just three devices (two data and one control) in the
space efficient, 56-pin, shrink small-outline package
(SSOP) or thin shink small outline package (TSSOP)
and a few external components. An 8-bit SCSI bus
requires only one data and one control transceiver.
The SN75971B is available in a B2 (20 Mxfer)
version and a B1 (10 Mxfer) version.
In a typical differential SCSI node, the SCSI controller
provides an enable for each external RS-485
transceiver channel. This could require as many as 27
extra terminals for a 16-bit differential bus controller or relegate a 16-bit, single-ended controller to only an 8-bit
differential bus. Using the standard nine SCSIcontrol signals, the SN75970B control transceiver decodes the
state of the bus and enables the SN75971B data transceiver to transmit the single-ended SCSI input signals
(A side) differentially to the cable or receive the differential cable signals (B side) and drive the single-ended
outputs to the controller.
DGG OR DL PACKAGE
(TOP VIEW)
SDB
DRVBUS
GND
ADBP–
ADB7–
ADB6–
ADB5–
GND
GND
GND
GND
GND
ABD4–
ADB3–
ADB2–
ADB1–
ADB0–
Pins 13 – 17 and 40 – 44 are connected
together to the package lead frame and
to signal ground.
NC – No internal connection
V
V
NC
NC
NC
NC
CC
CC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
DSENS
RESET
GND
BDBP–
BDBP+
BDB7–
BDB7+
BDB6–
BDB6+
BDB5–
BDB5+
V
CC
GND
GND
GND
GND
GND
V
CC
BDB4–
BDB4+
BDB3–
BDB3+
BDB2–
BDB2+
BDB1–
BDB1+
BDB0–
BDB0+
SN75971B
A reset function, which disables all outputs and clears internal latches, can be accomplished from two external
inputs and two internally-generated signals. RESET
(reset) and DSENS (differential sense) are available to
external circuits for a bus reset or to disable all outputs should a single-ended cable be inadvertently connected
to a differential connector . Internally-generated power-up and thermal-shutdown signals have the same affect
when the supply voltage is below approximately 3.5 V or the junction temperature exceeds 175°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1
SN75971B
I/O
DESCRIPTION
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000
description (continued)
The SCSI, differential, converter-data chip operates in two modes depending on the state of the DRVBUS input.
With DRVBUS low , a bidirectional latch circuit sets the direction of data transfer. Each data bit has its own latch,
and each bit’s direction is independent of all other bits. When neither the single-ended nor the differential sides
are asserted, the latch disables both A- and B-side output drivers. When the input to either side is asserted, the
latch enables the opposite side’s driver and sets data flow from the asserted input to the opposite side of the
device. When the input deasserts, the latch maintains the direction until the receiver on the enabled driver
detects a deassertion. The latch then returns to the initial state. No parity checking is done by this device; the
parity signal passes through the device like other data signals do.
When DRVBUS is high, direction is determined by the SDB signal. However , a change in SDB does not always
immediately change the direction. When DRVBUS first asserts, the direction indicated by SDB is latched and
takes effect immediately . When SDB changes while DRVBUS is high, the drivers that were on immediately turn
off. However , the other driver set does not turn on until the receivers sense a deasserted state on all nine data
lines. This is done to prevent the active drivers from turning on until all other drivers are off and the terminators
pull the lines to a deasserted state.
The single-ended SCSI bus interface consists of CMOS, bidirectional inputs and outputs. The drivers are rated
to ±16 mA of output current. The receiver inputs are pulled high with approximately 4 mA to eliminate the need
for external pullup resistors for the open-drain outputs of most single-ended SCSI controllers. The single-ended
side of the device is not intended to drive the SCSI bus directly.
The differential SCSI bus interface consists of bipolar , bidirectional inputs and outputs that meet or exceed the
requirements of EIA-485 and ISO 8482-1982/TIA TR30.2 referenced by American National Standard of
Information Systems (ANSI) X3.131-1994 Small Computer System Interface-2 (SCSI-2) and SCSI-3 Fast-20
Parallel Interface (Fast-20) X3.277:1996.
The SN75971B is characterized for operation over the temperature range of 0°C to 70°C.
Terminal Functions
TERMINAL
NAME NO.
ADBn–, where
n = {0,1,2,3,4,5,6,7,P}
BDBn+, where
n = {0,1,2,3,4,5,6,7,P}
BDBn–, where
n = {0,1,2,3,4,5,6,7,P}
DRVBUS 2 Input, TTL levels,
DSENS 56 Input, TTL levels,
RESET 55 Input, TTL levels,
SDB 1 Input, TTL levels,
4, 6, 8, 10, 19,
21, 23, 25, 27
29, 31, 33, 35,
37, 46, 48, 50, 52
30, 32, 34, 36,
38,47, 49, 51, 53
I/O, Single-ended
SCSI voltage levels,
Strong pullup
I/O, RS-485,
Weak pulldown
I/O, RS-485,
Weak pulldown
Weak pulldown
Weak pullup
Weak pullup
Weak pulldown
Bidirectional I/O for data and parity bits to and from the single-ended SCSI
controller. As outputs, these terminals can source or sink 16 mA. As inputs,
they are pulled up with about 4-mA to eliminate external resistors.
Bidirectional I/O for data and parity to and from the differential SCSI bus.
Bidirectional I/O for the complement of data and parity to and from the
differential SCSI bus.
A high-level logic signal from the control transceiver enables either the
single-ended or differential drivers as directed by SDB.
A low-level input initializes the internal latches and disables all drivers.
A low-level input initializes the internal latches and disables all drivers.
A high-level logic signal from the control transceiver sends data from the
differential bus to the single-ended bus. A low-level signal reverses the
flow.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
ADBP–
ADB7–
ADB0–
4
6
27
SN75971B
Control
Latch
Control
Latch
Control
Latch
SN75971B
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000
53
BDBP–
52
BDBP+
51
BDB7–
50
BDB7+
(6 Identical Channels
Not Shown)
30
BDB0–
29
BDB0+
Power-Up
and Thermal
Shut-Down
Circuits
Steering and
Control Logic
2 1 55 56
DRVBUS
RESET
SDB
DSENS
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3
SN75971B
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000
schematics of inputs and outputs
Input
100 kΩ
(B– Pin Only)
Input
100 kΩ
(B+ Pin Only)
, AND DSENS
RESET
200 Ω
B+ AND B– Inputs
18 kΩ
B+ AND B– Outputs
22 kΩ
12 kΩ
V
CC
3 kΩ
V
1 kΩ
CC
SDB AND DRVBUS
V
CC
Input
Input
200 Ω
50 kΩ
A
4 mA
200 Ω
A
V
CC
V
CC
V
CC
B+
B–
Output
18 kΩ
Output
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75971B
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential bus voltage range (B side) –10 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single-ended bus voltage range (A side and control inputs) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation (see Note 2) Internally Limited (see Dissipation Rating Table). . . . . . . . . .
Electrostatic discharge (see Note 3): Class 2 A (all pins) 4 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class 2 B (all pins) 400 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class 3 A (B-side and GND) 12 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class 3 B (B-side and GND) 400 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range, T
65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
3. This absolute maximum rating is tested in accordance with MIL-STD-883C, Method 3015.7.
PACKAGE
DGG 3333 mW 26.7 mW/°C 2133 mW
DL 3709 mW 29.7 mW/°C 2374 mW
‡
This is the inverse of the traditional junction-to-case thermal resistance (R
High-K (per JEDEC) PCB installations.
POWER RATING
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
DISSIPATION RATING TABLE
TA ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
‡
TA = 70°C
POWER RATING
θJA
) for
†
recommended operating conditions
Supply voltage, V
High-level input voltage, V
Low-level input voltage, V
Voltage at any bus terminal (separately or common-mode), VO or V
High-level output current, I
Low-level output current, I
Operating case temperature, T
Operating free-air temperature, T
CC
IH
IL
OH
OL
C
A
MIN NOM MAX UNIT
4.75 5 5.25 V
A side and control 2 V
A side and control 0.8 V
I
B side
A side –16 mA
A side 16 mA
0 125 °C
0 70 °C
12
–7
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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