Single Chip With Easy Interface Between
UART and Serial Port Connector of IBM
PC/AT and Compatibles
D
Three Drivers and Five Receivers Meet or
Exceed the Requirements of TIA/EIA-232-F
and ITU v.28 Standards
D
Designed to Support Data Rates Up To
120 kbps
D
ESD Protection Meets or Exceeds 10 kV on
RS-232 Pins and 5 kV on All Other Pins
(Human-Body Model)
D
Pinout Compatible With the SN75C185
DW OR N PACKAGE
(TOP VIEW)
V
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
V
SS
V
CC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
description
The SN75185 combines three drivers and five receivers from TI trade-standard SN75188 and SN75189 bipolar
quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the SN75C185
to decrease the part count, reduce the board space required, and allow easy interconnection of the UART and
serial-port connector of IBM PC/A T and compatibles. The bipolar circuits and processing of the SN75185
provides a rugged low-cost solution for this function at the expense of quiescent power and external passive
components relative to the SN75C185.
The SN75185 complies with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) v .28 standards.
These standards are for data interchange between a host computer and peripheral at signaling rates up to
20 kbit/s. The switching speeds of the SN75185 are fast enough to support rates up to 120 kbit/s with lower
capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be assured unless the
designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling
rates to 120 kbit/s, use of TIA/EIA-423-B (ITU v .10) and TIA/EIA-422-B (ITU v.1 1) standards are recommended.
The SN75185 is characterized for operation over the temperature range of 0°C to 70°C.
logic symbol
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
IBM and PC/AT are trademarks of IBM Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
†
2
3
4
5
6
7
8
9
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
19
18
17
16
15
14
13
12
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
logic diagram (positive logic)
Copyright 1998, Texas Instruments Incorporated
RY1RA1
RY2RA2
RY3RA3
DA1DY1
DA2DY2
RY4RA4
DA3DY3
RY5RA5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
schematic of drivers
To Other Drivers
V
DD
Input DAx
GND
V
SS
Resistor values shown are nominal.
ESD
ESD
4.2 kΩ
To Other
Drivers
ESD
schematic (each receiver)
10.4 kΩ
To Other Drivers
9.4 kΩ11.6 kΩ
75.8 Ω
9 kΩ5 kΩ
68.5 Ω3.3 kΩ
320 Ω
To Other Receivers
ESD
1.66 kΩ
ESD
ESD
V
CC
RYx Output
DYx Output
Input RAx
Resistor values shown are nominal.
ESD
3.8 kΩ
2 kΩ
10 kΩ
GND
To Other Receivers
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
High-level output current, I
mA
Low-level output current, I
mA
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
Supply voltage, V
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
3. RS-232 pins are tested with respect to ground and each other.
Propagation delay time, low-to-high-level output107500ns
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
Transition time, high-to-low-level output1660ns
CL = 50 pF,RL = 5 kΩ
See Figure 6
PARAMETER MEASUREMENT INFORMATION
I
OS(L)
V
DD
V
CC
V
I
V
O
V
SS
–I
OS(H)
RL = 3 kΩ
VDD or GND
VSS or GND
I
IH
V
I
–I
IL
V
I
175525ns
V
DD
V
CC
V
SS
42150ns
Figure 1. Driver Test Circuit for
V
OH
, VOL, I
OS(H)
, and I
OS(L)
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Figure 2. Driver Test Circuit for IIH and I
IL
5
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
PARAMETER MEASUREMENT INFORMATION
t
THL
1.5 V
90%
t
PHL
50%
10%
VOLTAGE WAVEFORMS
V
DD
Input
V
CC
Pulse
Generator
(see Note A)
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
R
L
V
SS
C
L
(see Note B)
Input
Output
Figure 3. Driver Test Circuit and Voltage Waveforms
1.5 V
50%
10%
t
PLH
90%
t
TLH
3 V
0 V
V
V
OH
OL
V
DD
V
CC
V
I
V
SS
VT, V
V
DD
V
CC
I
V
OL
V
SS
I
OL
Figure 4. Receiver Test CircuitFigure 5. Receiver Test Circuit
for I
OS
t
THL
50%
90%
50%
VOLTAGE WAVEFORMS
V
DD
Input
Pulse
Generator
(see Note A)
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
V
CC
R
L
V
SS
TEST CIRCUIT
C
L
(see Note B)
Input
Output
for VT, VOH, and V
t
PHL
10%
OL
50%
50%
10%
–I
TLH
OH
4 V
0 V
V
V
OH
OL
V
OH
t
PLH
90%
t
Figure 6. Receiver Propagation and Transition Times
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ОООООО
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
TYPICAL CHARACTERISTICS
DRIVER SECTION
OUTPUT CURRENT
vs
VOLTAGE TRANSFER CHARACTERISTICS
12
VDD = 12 V, VSS = –12 V
9
VDD = 9 V, VSS = –9 V
6
VDD = 6 V, VSS = –6 V
3
20
16
12
8
4
VDD = 9 V
VSS = –9 V
TA = 25°C
OUTPUT VOLTAGE
VOL(VI = 1.9 V)
0
–3
O
V
VO – Output Voltage – V
–6
–9
–12
0
12
9
6
3
RL = 3 kΩ
TA = 25°C
VI – Input Voltage – V
Figure 7
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
I
(VI = 1.9 V)
OS(L)
0
–4
–8
O
I
IO – Output Current – mA
–12
–16
1.81.61.41.210.80.60.40.2
2
–20
–16
VOH(VI = 0.8 V)
VO – Output Voltage – V
3-kΩ
Load Line
12840–4–8–12
16
Figure 8
SLEW RATE
vs
LOAD CAPACITANCE
1000
µs
100
VDD = 9 V
VSS = – 9 V
RL = 3 kΩ
TA = 25°C
OS
IOS – Short-Circuit Output Current – mA
I
–3
–6
–9
–12
0
0
VDD = 9 V
VSS = –9 V
VO = 0
I
(VI = 0.8 V)
OS(H)
TA – Free-Air Temperature – ° C
Figure 9
10
SR – Slew Rate – V/
1
70605040302010
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
10
1000100
CL – Load Capacitance – pF
Figure 10
10000
7
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
TYPICAL CHARACTERISTICS
RECEIVER SECTION
2.4
2.2
2
1.8
1.6
1.4
1.2
Input Threshold Voltage – V
0.8
0.6
0.4
6
5
4
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
VT +
VT –
TA – Free-Air Temperature – ° C
Figure 11
NOISE REJECTION
VCC = 5 V
TA = 25°C
See Note A
CC = 300 pF
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
2
1.8
1.6
1.4
1.2
1
0.8
0.6
Input Threshold Voltage – V
0.4
0.2
706050403020100
0
2
VCC – Supply Voltage – V
VT +
VT –
9876543
10
Figure 12
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
16
14
12
3
Amplitude – V
NOTE A: This figure shows the maximum amplitude of a
CC = 12 pF
2
CC = 100 pF
1
0
10
positive-going pulse that, starting from 0 V, will not cause
a change in the output level.
40100400 10004000
tw – Pulse Duration – ns
CC = 500 pF
10000
Figure 13
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
10
8
6
CC
V
VCC– – Supply Voltage – V
4
2
0
0
RL ≥ 3 kΩ (from each output to GND)
70605040302010
TA – Free-Air Temperature – ° C
Figure 14
SN75185
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS181A – DECEMBER 1994 – REVISED NOVEMBER 1998
APPLICATION INFORMATION
Diodes placed in series with the V
and VSS leads protect the SN75185 in the fault condition in which the device
DD
outputs are shorted to ±15 V and the power supplies are at low and provide low-impedance paths to ground (see
Figure 15).
V
DD
V
Output
±15 V
SN75185SN75185
DD
V
SS
V
SS
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F
10
9
8
7
6
5
4
3
2
1
–12 V
R1
DTR
CTS
TX
RTS
RX
DSR
DCD
12 V
C1
5
9
†
C3
TIA/EIA-232-F
†
C2
†
1
DB9S
Connector
6
TL16C450
ACE
43
RI
37
DTR
40
CTS
13
SO
36
RTS
11
SI
41
DSR
42
DCD
5 V
11
12
13
14
15
16
17
18
19
20
GND
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
V
CC
SN75185
V
SS
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
V
DD
†
See Figure 10 to select the correct values for the loading capacitors (C1, C2, and C3), which are required to meet the RS-232 maximum
slew-rate requirement of 30 V/µs. The value of the loading capacitors required depends upon the line length and desired slew rate, but typically
is 330 pF.
Figure 16. Typical Connection
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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